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clocks Datasheet PDF File

For clocks Found Datasheets File :: 21238 Search Time::4.172ms
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				XILINX INC Xilinx, Inc.
Part No.	XCR3512XL XCR3064XL-7CPG56C XCR3064XL-10CPG56C XCR3032XL-7CSG48C XCR3128XL-6CSG144C XCR3032XL-5CSG48C XCR3032XL-10CSG48I XCR3064XL-6CSG48C XCR3128XL-10CSG144C XCR3064XL-6CPG56C XCR3128XL-7CSG144C XCR3064XL-7CSG48I XCR3128XL-10CSG144I XCR3064XL-7CPG56I XCR3128XL-7CSG144I XCR3032XL-10CSG48C XCR3064XL-10CPG56I XCR3032XL-7CSG48I XCR3064XL-7CSG48C XCR3384XL-10FTG256C XCR3384XL-12FTG256C XCR3256XL-12CSG280I XCR3256XL-12PQG208C XCR3128XL-7VQG100I XCR3384XL-10FTG256I XCR3384XL-7PQG208C XCR3256XL-7CSG280C XCR3128XL-7TQG144C XCR3256XL-12CSG280C XCR3512XL-10FTG256C XCR3064XL XCR3256XL XCR3032XL XCR3384XL
OCR Text	...nous clocking - 16 product term clocks and four local control term clocks per function block - Four global clocks and one universal control term clock per device Excellent pin retention during design changes * * * * * * * * * ...
Description	CoolRunner XPLA3 CPLD XCR3512XL-10FTG256C XCR3256XL-12CSG280C - NEW PRODUCT XCR3128XL-7TQG144C EE PLD, 7.5 ns, PQFP144 XCR3256XL-7CSG280C EE PLD, 7.5 ns, PBGA280 XCR3384XL-7PQG208C EE PLD, 7.5 ns, PQFP208 XCR3384XL-10FTG256I EE PLD, 10 ns, PBGA256 XCR3128XL-7VQG100I EE PLD, 7.5 ns, PQFP100 XCR3256XL-12PQG208C - NOT RECOMMENDED for NEW DESIGN EE PLD, 12 ns, PQFP208 XCR3256XL-12CSG280I - NEW PRODUCT EE PLD, 12 ns, PBGA280 XCR3384XL-12FTG256C EE PLD, 12 ns, PBGA256 XCR3384XL-10FTG256C EE PLD, 10 ns, PBGA256 XCR3064XL-7CSG48C EE PLD, 7.5 ns, PBGA48 32 MCELL 3 VOLT ZERO POWER ISP CPLD EE PLD, 7.5 ns, PBGA48 XCR3064XL-10CPG56I EE PLD, 10 ns, PBGA56 XCR3128XL-7CSG144I EE PLD, 7.5 ns, PBGA144 XCR3064XL-7CPG56I EE PLD, 7.5 ns, PBGA56 XCR3128XL-10CSG144I EE PLD, 10 ns, PBGA144 XCR3064XL-7CSG48I EE PLD, 7.5 ns, PBGA48 128 MACROCELL 3.3 VOLT ISP CPLD EE PLD, 7.5 ns, PBGA144 XCR3064XL-6CPG56C - NOT RECOMMENDED for NEW DESIGN EE PLD, 6 ns, PBGA56 128 MACROCELL 3.3 VOLT ISP CPLD EE PLD, 10 ns, PBGA144 XCR3064XL-6CSG48C EE PLD, 6 ns, PBGA48 32 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN EE PLD, 10 ns, PBGA48 XCR3032XL-5CSG48C - NOT RECOMMENDED for NEW DESIGN EE PLD, 5 ns, PBGA48 XCR3128XL-6CSG144C EE PLD, 6 ns, PBGA144 XCR3032XL-7CSG48C EE PLD, 7.5 ns, PBGA48 XCR3064XL-10CPG56C EE PLD, 10 ns, PBGA56 XCR3064XL-7CPG56C EE PLD, 7.5 ns, PBGA56
File Size	155.27K / 12 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	IMIFS782 IMIFS784
OCR Text	...ency range modulates external clocks including crystals, crystal oscillators, or ceramic resonators programmable modulation with simple r-c external loop filter (lf) center spread modulation 3v-5v power supply ttl-/cmos-compatib...
Description	(IMIFS781/82/84) Low EMI Spectrum Spread Clock
File Size	204.82K / 11 Page	View it Online	Download Datasheet

				ON Semiconductor
Part No.	P3P623S09B P3P623S05BG-08TR P3P623S09A P3P623S05A
OCR Text	... to distribute timing-safe? clocks with pea k emi reduction. p3p623s05 is an eight-pin version, accepts one reference input and drives out five low -skew timing-safe? clocks. p3p623s09 accepts one referenc e input and drives...
Description	Timing-Safe Peak EMI Reduction IC Timing-Safe?Peak EMI Reduction IC
File Size	190.68K / 11 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1522KV18
OCR Text	...666 mhz) at 333 mhz two input clocks (k and k ) for precise ddr timing ? sram uses rising edges only two input clocks for output data (c and c ) to minimize clock skew and flight time mismatches echo clocks (cq and cq ) simplify data ca...
Description	72-Mbit DDR II SIO SRAM 2-Word Burst Architecture
File Size	626.25K / 31 Page	View it Online	Download Datasheet


Part No.	MT16VR12816AG-745B1
OCR Text	... high-speed 356 mhz and 400 mhz clocks with 2x data rates ? 1.6 gb/s peak i/o bandwidth ? rambus ? signaling level (rsl) using differential 356 mhz and 400 mhz transmit and receive clocks ? packet-oriented rambus protocol transmitted in 8-...
Description	128M X 16 RAMBUS MODULE, 45 ns, DMA84
File Size	181.72K / 8 Page	View it Online	Download Datasheet

				Samsung semiconductor
Part No.	K7K1618U2C K7K1636U2C
OCR Text	...o reduce current. ? two input clocks(k and k ) for accurate ddr timing at clock rising edges only. ? two echo clocks (cq and cq ) to enhance output data traceability. ? data valid pin(qvld) supported ? single address bus. ? ...
Description	512Kx36 & 1Mx18 DDRII CIO b2 SRAM
File Size	454.05K / 19 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CYRS1542AV18 CYRS1544AV18
OCR Text	...nsferred at 500 mhz) two input clocks (k and k ) for precise ddr timing ? sram uses rising edges only echo clocks (cq and cq ) simplify data capture in high speed systems single multiplexed address input bus latches address inputs for bo...
Description	72-Mbit QDR II SRAM Two-Word Burst Architecture
File Size	422.24K / 33 Page	View it Online	Download Datasheet


Part No.	IBM041841QLAD-6
OCR Text	...ycle times. dual differential k clocks are used to initiate the read/write operation, and all internal operations are self-timed. at the rising edge of the k clock, all addresses, write-enables, sync select, and data ins are registered inte...
Description	256K X 18 STANDARD SRAM, 3 ns, PBGA119
File Size	171.10K / 23 Page	View it Online	Download Datasheet

				ANALOG DEVICES INC
Part No.	AD9940BSTZ
OCR Text	... control for all the high speed clocks necessary for ccd imaging systems. the precision timing core allows adjustment of high speed clocks with a resolution of 0.37 ns. output buffers are also included, providing drive strength for pcb ...
Description	SPECIALTY CONSUMER CIRCUIT, PQFP48
File Size	202.18K / 20 Page	View it Online	Download Datasheet

For clocks Found Datasheets File :: 21238 Search Time::4.172ms
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