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Integrated Device Technology, Inc.
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| Part No. |
23S08E-2HDCI 23S08E-4DC8 23S08E-4DCI8 23S08E-2HDC8 23S08E-2HDCI8
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| OCR Text |
...utput bank ? external feedback (fbk) pin is used to synchronize the outputs to the clock input ? output skew <200 ps ? low jitter <200 ps cycle-to-cycle ? 1x, 2x, 4x output options (see table): ? idt23s08e-1 1x ? idt23s08e-2 1x, 2x ? idt2... |
| Description |
23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 SOIC-16
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| File Size |
77.06K /
11 Page |
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Alliance Semiconductor ...
ALSC[Alliance Semiconductor Corporation]
ON Semiconductor
Alliance Semiconductor, Corp.
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| Part No. |
ASM5I2304A-1H-08-SR ASM5I2304A-2-08-ST ASM5I2304A-5H-08-SR ASM5I2304A-1-08-SR ASM5I2304A-1-08-ST ASM5I2304A-1H-08-ST ASM5I2304A-2-08-SR ASM5I2304A-2H-08-SR ASM5I2304A-2H-08-ST ASM5I2304A-5H-08-ST ASM5I2304AF-1-08-SR ASM5I2304AF-1-08-ST ASM5I2304AF-1H-08-SR ASM5I2304AF-1H-08-ST ASM5I2304AF-2-08-SR ASM5P2304AG-2H-08-ST ASM5I2304AF-2-08-ST ASM5I2304AF-2H-08-SR ASM5I2304AF-2H-08-ST ASM5I2304AG-1-08-SR ASM5I2304AG-1-08-ST ASM5I2304AG-1H-08-SR ASM5I2304AG-1H-08-ST ASM5I2304AG-2-08-SR ASM5I2304AG-2-08-ST ASM5I2304AG-2H-08-SR ASM5I2304AG-2H-08-ST ASM5P2304A ASM5P2304A-1-08-SR ASM5P2304A-1-08-ST ASM5P2304A-1H-08-SR ASM5P2304A-1H-08-ST ASM5P2304A-2-08-SR ASM5P2304A-2-08-ST ASM5P2304A-2H-08-SR ASM5P2304A-2H-08-ST ASM5P2304A-5H-08-SR ASM5P2304A-5H-08-ST ASM5P2304AF-1-08-SR ASM5P2304AF-1-08-ST ASM5P2304AF-1H-08-SR ASM5P2304AF-1H-08-ST ASM5P2304AF-2-08-SR ASM5P2304AF-2-08-ST ASM5P2304AF-2H-08-SR ASM5P2304AF-2H-08-ST ASM5P2304AG-1-08-SR ASM5P2304AG-1-08-ST ASM5P2304AG-1H-08-SR ASM5P2304AG-1H-08-ST ASM5P2304AG-2-08-SR ASM5P2304AG-2-08-ST ASM5P2304AG-2H-08-SR
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| OCR Text |
...djustable by capacitive load on fbk input. Multiple configurations - Refer "ASM5P2304A Configurations Table". Input frequency range: 15MHz to 133MHz Multiple low-skew outputs. Output-output skew less than 200pS. Device-device skew less than... |
| Description |
CONNECTOR ACCESSORY
EMI FILTER 470PF 50V SMD
2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 0.150 INCH, SOIC-8
3.3 V Zero Delay Buffer 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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| File Size |
305.46K /
15 Page |
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Pericom Semiconductor, Corp.
天津新技术产业园区管理委员会
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| Part No. |
PI6C2308A-4L PI6C2308A-3L
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| OCR Text |
...djustable by capacitive load on fbk input multiple configurations, see ?available pi6c2308a configurations? table input to output delay, less than 150ps multiple low skew outputs - output-output skew less than 200ps - device-device skew ... |
| Description |
16-Bit Byte Wide, Low Glitch Multiplying DAC with 4-Quadrant Resistors; Package: PDIP; No of Pins: 24; Temperature Range: 0°C to 70°C 八分布式输出时钟驱动
Eight Distributed-Output Clock Driver 八分布式输出时钟驱动
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| File Size |
357.02K /
10 Page |
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Integrated Device Technology, Inc.
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| Part No. |
MPC962308EF-1R2
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| OCR Text |
...able by the capacitive load on fbk input ? multiple configurations, see table 11. available mpc962308 configurations ? multiple low-skew outputs ? 200 ps max output-output skew ? 700 ps max device-device skew ? two banks of four outputs,... |
| Description |
962308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 SOIC-16
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| File Size |
192.58K /
7 Page |
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Motorola Mobility Holdings, Inc.
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| Part No. |
MPC962308D-1R2 MPC962308D-2R2 MPC962308D-3R2
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| OCR Text |
...able by the capacitive load on fbk input multiple configurations, see ?available mpc962308 configurations? table multiple low-skew outputs ? 200 ps max output-output skew ? 700 ps max device-device skew ? two banks of four outputs, out... |
| Description |
3.3 V Zero Delay Buffer PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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| File Size |
445.68K /
12 Page |
View
it Online |
Download Datasheet |
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