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				STMicroelectronics
Part No.	ST1S09IPUR ST1S09PUR ST1S0910 ST1S09APUR
OCR Text	...5 50 75 100 125 150 175 t [c] v fbk [mv] v o @1.2v v i =5v, i o =10ma 760 770 780 790 800 810 820 830 840 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] v fbk [mv] v o @1.2v v i =5v, i o =10ma -60 40 140 240 340 440 540 640 740 840 -75 -50 -2...
Description	2 A, 1.5 MHz PWM step-down switching regulator with synchronous rectification
File Size	357.41K / 18 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. INTEGRATED DEVICE TECHNOLOGY INC
Part No.	IDT23S08E-3DC IDT23S08E-3DCI IDT23S08E-5HPGI IDT23S08E-5HDC IDT23S08E-5HDCI IDT23S08E-2HDCI IDT23S08E-4DC IDT23S08E-4DCI IDT23S08E-1HDC IDT23S08E-1HDCI IDT23S08E-2DCI
OCR Text	...utput bank ? external feedback (fbk) pin is used to synchronize the outputs to the clock input ? output skew <200 ps ? low jitter <200 ps cycle-to-cycle ? 1x, 2x, 4x output options (see table): ? idt23s08e-1 1x ? idt23s08e-2 1x, 2x ? idt2...
Description	Dual P-Channel NexFET Power MOSFET 9-DSBGA -55 to 150 3.3V ZERO DELAY CLOCK MULTIPLIER, SPREAD SPECTRUM COMPATIBLE 23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
File Size	61.06K / 10 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY23FP12OXIT CY3672-USB CY23FP12OXC CY23FP12OXCT CY23FP1211 CY23FP1212
OCR Text	...LKA2 CLKA3 REFSEL REF1 REF2 fbk /M /N 100 to 400MHz PLL /1 /2 /3 /4 /X CLKA4 CLKA5 VSSA VDDB CLKB0 CLKB1 CLKB2 CLKB3 Test Logic S[2:1] VSSC Function Selection CLKB4 CLKB5 VSSB Cypress Semiconductor Corporation Document ...
Description	200 MHz Field Programmable Zero Delay Buffer 200 MHz Field Programmable Zero Delay Buffer
File Size	293.47K / 15 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. INTEGRATED DEVICE TECHNOLOGY INC
Part No.	IDT2308A-1HPGG IDT2308A-2HPGI IDT2308A-1HPGI IDT2308A-1HPGGI IDT2308A-2HPGG IDT2308A-2HPGGI IDT2308A-3DC IDT2308A-3DCI IDT2308A-3DCG IDT2308A-4DCG IDT2308A-3DCGI IDT2308A-2HDCI IDT2308A-2HDCGI IDT2308A-3PGI IDT2308A-3PGG IDT2308A-2DCG IDT2308A-1HDCGI IDT2308A-2PGI IDT2308A-4DCGI IDT2308A-1PGI IDT2308A-2DCGI IDT2308A-2DCI IDT2308A-1HDCI IDT2308A-4PGI IDT2308A-1DCI IDT2308A-1PGG IDT2308A-1DCG IDT2308A-2PGG IDT2308A-1PGGI
OCR Text	...utput bank ? external feedback (fbk) pin is used to synchronize the outputs to the clock input ? output skew <200 ps ? low jitter <200 ps cycle-to-cycle ? 1x, 2x, 4x output options (see table): ? idt2308a-1 1x ? idt2308a-2 1x, 2x ? idt230...
Description	3.3V ZERO DELAY CLOCK MULTIPLIER 3.3零延迟时钟倍频 3.3V ZERO DELAY CLOCK MULTIPLIER 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
File Size	68.85K / 10 Page	View it Online	Download Datasheet

				Pericom Semiconductor C... Pericom Semiconductor, Corp. Pericom Semiconductor Corp.
Part No.	PI6C2308A-6W PI6C2308A-2WI PI6C2308A-6WI PI6C2308A-6LII PI6C2308A-3WI PI6C2308A-3LI PI6C2308A-1LI PI6C2308A-1WI PI6C2308A-4WI PI6C2308A-1HW PI6C2308A-2L PI6C2308A4L PI6C2308A-6 PI6C2308A3L
OCR Text	...djustable by capacitive load on fbk input multiple configurations, see ?available pi6c2308a configurations? table input to output delay, less than 150ps multiple low skew outputs - output-output skew less than 200ps - device-device skew ...
Description	BUZZER MAGNETIC 5.0V 13MM SMD 3.3零延时缓冲器 3.3V Zero-Delay Buffer 3.3零延时缓冲器
File Size	386.73K / 10 Page	View it Online	Download Datasheet

				Analog Devices
Part No.	AD605
OCR Text	...+in ?n gain control and scaling fbk ad605 features two independent linear-in-db channels input noise at maximum gain: 1.8 nv/ hz , 2.7 pa/ hz bandwidth: 40 mhz (C3 db) differential input absolute gain range programmable: C14 db to +34 db ...
Description	Accurate, Low Noise, Dual Channel Linear-In-dB Variable Gain Amplifier, Optimized For Any Application Requiring High Performance
File Size	192.43K / 12 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY23FP12-00211 CY3672-USB CY23FP12OXC-002 CY23FP12OXC-002T
OCR Text	...efsel is asserted/deasserted. fbk m n 100 to 400mhz pll clka1 clka3 clka2 ref2 refsel clka4 clka5 clkb1 clkb3 clkb2 clkb4 clkb5 vdda vssa vddb v ss b 2 3 4 x clka0 vddc vssc 1 lock detect test logic ref1 clkb0 s [ 2:1...
Description	200-MHz Field Programmable Zero Delay Buffer
File Size	405.94K / 14 Page	View it Online	Download Datasheet

				Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
Part No.	CY2308SI-1HT CY2308ZI-1HT CY2308SXI-5HT CY2308SXI-3T CY2308-5H CY2308-1H CY2308SI-1T CY2308SXI-1T CY2308SXI-4T CY2308SI-4T CY2308-3 CY2308ZXC-1HT CY2308SC-2T CY2308SI-2T CY2308SXI-2T CY2308SXC-2T CY2308SC-5HT CY2308SXC-4T
OCR Text	...justable by capacitive load on fbk input multiple configurations, see ?available cy2308 configura- tions? on page 3 multiple low skew outputs two banks of four outputs, three-stateable by two select inputs 10 mhz to 133 mhz operati...
Description	3.3V Zero Delay Buffer 3.3零延迟缓冲器 3.3V Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
File Size	246.47K / 15 Page	View it Online	Download Datasheet

				Pericom Technology Pericom Semiconductor, Corp. Pericom Semiconductor Corp.
Part No.	PI6C2308-1HL PI6C2308-1HW PI6C2308-1LI PI6C2308-4W PI6C2308-4WI PI6C2308-3W PI6C2308-3WI PI6C2308-6W PI6C2308-2WI PI6C2308-6WI PI6C2308-1HWI PI6C2308-1WI PI6C2308-1HLI
OCR Text	... by external capacitive load on fbk input multiple configurations, see ?available pi6c2308 configurations? table input to output delay, less than 200ps multiple low skew outputs - output-output skew less than 200ps - device-device skew l...
Description	3.3V Zero-Delay Buffer 3.3零延时缓冲器 LENS OPTICAL 3.8MM 650NM
File Size	503.28K / 10 Page	View it Online	Download Datasheet

				Rectron Semiconductor
Part No.	NB2308AC1DTR2 NB2308AC1HD NB2308AC1DTG NB2308AC1DG NB2308AC1DR2G NB2308AC1HDG NB2308AC1HDR2 NB2308AC1HDT NB2308AI2HDR2G NB2308AI1DG NB2308AI1HDG NB2308AI5HDG NB2308AI4DTG NB2308AI3DR2G
OCR Text	...ack is required to be driven to fbk pin, and can be obtained from one of the outputs. the input--to--output propagation delay is guaranteed to be less than 250 ps, and the output--to--output skew is guaranteed to be less than 200 ps. the nb...
Description	3.3V Eight Output Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 3.3V Eight Output Zero Delay Buffer; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 3.3 V Zero Delay Clock Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
File Size	189.31K / 12 Page	View it Online	Download Datasheet

For fbk Found Datasheets File :: 210 Search Time::1.609ms
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