cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 1/10 mtb5d0n10rh8 cystek product specification n-channel enhancement mode power mosfet mtb5d0n10rh8 features ? single drive requirement ? low on-resistance ? fast switching characteristic ? pb-free lead plating and halogen-free package symbol outline ordering information device package shipping MTB5D0N10RH8-0-T6-G dfn 5 6 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel dfn5 6 mtb5d0n10rh8 g gate d drain s source bv dss 100v i d @v gs =10v, t c =25 c 54a i d @v gs =10v, t a =25 c 18a v gs =10v, i d =30a 5.5m r dson(typ) v gs =4.5v, i d =20a 6.7m environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t6 : 3000 pcs / tape & reel,13? reel product rank, zero for no rank products product name pin 1 s s s g d d d d s s s g d d d d pin 1
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 2/10 mtb5d0n10rh8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol 10s steady state unit drain-source voltage v ds 100 gate-source voltage v gs 20 v continuous drain current @ t c =25 c, v gs =10v (note 1) 54 continuous drain current @ t c =100 c, v gs =10v (note 1) i d 34.2 continuous drain current @ t a =25 c, v gs =10v (note 2) 18 12 continuous drain current @ t a =70 c, v gs =10v (note 2) 14.5 9.6 continuous drain current @ t a =85 c, v gs =10v (note 2) i dsm 13 8.7 pulsed drain current (note 3) i dm 216 *1 avalanche current @ l=0.1mh (note 3) i as 90 a avalanche energy @ l=1mh, i d =36a, v dd =50v (note 4) e as 648 repetitive avalanche energy @ l=0.05mh (note 3) e ar 5 *2 mj t c =25 (note 1) 50 t c =100 (note 1) p d 20 t a =25 c (note 2) 5.7 2.5 t a =70 c (note 2) 4.0 1.8 total power dissipation t a =85 c (note 2) p dsm 3.6 1.6 w operating junction and storage temperature range tj, tstg -55~+150 c thermal data parameter symbol typical maximum unit t 10s 18 22 thermal resistance, junction-to-ambient (note 2) steady state r ja 42 50 thermal resistance, junction-to-case r jc 2.2 2.5 c/w note : 1 . the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and is more useful in setting the upper dissi pation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user?s specific board design. 3 . repetitive rating, pulse width limited by junction temperature t j(max) =150 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c. 4.100% te sted by conditions of l=0.1mh, i as =30a, v gs =10v, v dd =50v
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 3/10 mtb5d0n10rh8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v gs =0v, i d =250 a v gs(th) 1 - 2.5 v v ds = v gs , i d =250 a g fs *1 - 46.9 - s v ds =10v, i d =20a i gss - - 100 na v gs = 20v, v ds =0v - - 1 v ds =80v, v gs =0v i dss - - 25 a v ds =80v, v gs =0v, tj=125 c - 5.5 7.5 v gs =10v, i d =30a r ds(on) *1 6.7 9.3 m v gs =4.5v, i d =20a dynamic ciss - 6629 - coss - 380 - crss - 8 - pf v gs =0v, v ds =50v, f=1mhz qg *1, 2 - 101 - qgs *1, 2 - 20.5 - qgd *1, 2 - 14.7 - nc v ds =80v, v gs =10v, i d =30a t d(on) *1, 2 - 31.6 - tr *1, 2 - 23 - t d(off) *1, 2 - 94 - t f *1, 2 - 13.4 - ns v dd =50v, i d =30a, v gs =10v, r g =1 rg - 1.4 - f=1mhz source-drain diode i s *1 - - 54 i sm *3 - - 216 a v sd *1 - 0.81 1.2 v i s =20a, v gs =0v trr - 45.5 - ns qrr - 86.7 - nc i f =20a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature.
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 4/10 mtb5d0n10rh8 cystek product specification typical characteristics typical output characteristics 0 20 40 60 80 100 120 140 160 180 200 0246810 v ds , drain-source voltage(v) i d , drain current (a) 10v, 9v, 8v,7v,6v,5v v gs =3v 3.5v 4v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 02468101214161820 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 5 10 15 20 0246810 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =30a drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =30a r ds( on) @tj=25c : 5.5m typ.
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 5/10 mtb5d0n10rh8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 1 10 100 1000 10000 0 5 10 15 20 25 30 35 40 45 50 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =10v v ds =15v gate charge characteristics 0 2 4 6 8 10 0 20 40 60 80 100 120 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =30a v ds =20v, 50v, 80v from left to right maximum safe operating area 0.1 1 10 100 1000 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) t c =25c, tj=150c v gs =10v, r jc =2.5c/w single pulse dc r dson limited 1ms 100 s 10ms 100ms maximum drain current vs case temperature 0 10 20 30 40 50 60 70 25 50 75 100 125 150 175 200 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, tj(max)=150c, r jc =2.5c/w
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 6/10 mtb5d0n10rh8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 20 40 60 80 100 120 140 160 180 200 012345 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse power rating, junction to case 0 100 200 300 400 500 600 700 800 900 1000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) power (w) t j(max) =150c t c =25c r jc =2.5c/w transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =2.5c/w
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 7/10 mtb5d0n10rh8 cystek product specification recommended soldering footprint & stencil design unit : mm
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 8/10 mtb5d0n10rh8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 9/10 mtb5d0n10rh8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c029h8 issued date : 2018.02.02 revised date : page no. : 10/10 mtb5d0n10rh8 cystek product specification dfn5 6 dimension millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.90 1.10 0.035 0.043 e2 3.38 3.78 0.133 0.149 a1 0.00 0.05 0.000 0.002 e 1.27 bsc 0.050 bsc b 0.33 0.51 0.013 0.020 h 0.41 0.61 0.016 0.024 c 0.20 0.30 0.008 0.012 k 1.10 - 0.043 - d1 4.80 5.00 0.189 0.197 l 0.51 0.71 0.020 0.028 d2 3.61 3.96 0.142 0.156 l1 0.06 0.20 0.002 0.008 e 5.90 6.10 0.232 0.240 8 12 8 12 e1 5.70 5.80 0.224 0.228 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: date code device name b5d0 n10r 8-lead dfn5 6 plastic package cys package code : h8
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