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  radiation hardended ultra low dropout IRUH330118Ap fixed positive linear regulator +3.3v in to +1.8v out @3.0a www.irf.com 1 features silicon on insulator (soi) cmos regulator ic, cmos latch-up immune, inherently rad hard  total dose capability up to 300krads(si) (condition a); tested to 500krad (si) eldrs up to 100krad(si) (condition d)  seu immune up to let = 80 mev*cm 2 /mg  space level screened  fast transient response  timed latch-off over-current protection  internal thermal protection  on/off control via shutdown pin, power sequencing easily implemented isolated hermetic 8-lead flat pack ensures higher reliability this part is also available in mo-078 package as iruh330118bk / iruh330118bp the iruh330118 is a space qualified, ultra low dropoutlinear regulator designed specifically for applications requiring high reliability, low noise and radiation hardness. 05/18/12 8-lead flat pack description IRUH330118Ak ab so l u t e m ax i mum r a ti ngs parameter s y mbol min. max. units power dissipation @ t c = 125c p d -2 5w maximum output current @ maximum power dissipation with no derating non-operating input voltage v in -0.3 +8.0 operating input voltage v in 2.9 6.4 ground gnd -0.3 0.3 shutdown pin voltage v shdn -0.3 v in + 0.3 output pin voltage v out -0.3 v in + 0.3 operating case temperature range t o -55 +140 storage temperature range t s -65 +150 maximmum junction temperature t j -+ 1 5 0 lead temperature (soldering 10sec) t l -+ 3 0 0 pass transistor thermal resistance, junction to case r thjc -1 . 0 c / w c i o a - see fig 4 v product s ummary part number i o v in v out IRUH330118Ak IRUH330118Ap 3.0a 3.3v 1.8v (5962f1023503k) pd-97530c downloaded from: http:///
2 www.irf.com IRUH330118Ak IRUH330118Apnotes:  connected as shown in fig.1 and measured at the junction of v out and v sense pins.  under normal closed-loop operation. guaranteed by design. not tested in production. electrical characteristics pre-radiation @t c = 25c, v in = 3.3v (unless otherwise specified) parameter test conditions symbol min. typ. max. units 2.8v v in 3.8v, 50ma i out 3.0a 1.773 1.8 1.827 2.8v v in 3.8v, 50ma i out 3.0a, output voltage -55c to +125c v out v 2.8v v in 3.8v, 50ma i out 3.0a, post -rad over-current latching, -55c to +125c, post -rad over-current time-to-latch i o > i latch t latch - 10 - ms maximum shutdown temp.  t latch 125 140 - c f= 120hz, i o = 50ma, -55c to +125c 65 - - f= 120hz, i o = 50ma, post -rad 40 - - v sense pin current  -55c to +125c i sense -1 . 6 -m a minimum shdn pin "on" i source = 200 a, -55c to +125c threshold voltage post -rad maximum shdn pin "off" i source = 200 a, -55c to +125c threshold voltage post -rad r load = 36 ohms, v shdn = 3.3v -55c to +125c, post-rad shdn pin leakage current  v shdn = 3.3v, -55c to +125c,post-rad i shdn -10 - 10 a v shdn = 0.4v -98 - -56 shdn pin pull-up current  v shdn = 0.4v, -55c to +125c i shdn -140 - -30 a v shdn = 0.4v, post-rad -98 - -56 p ower o n r eset th res h o ld  sweep v in and measure output v t-por -1 . 7 -v no load - - 15 full load - - 90 v output voltage at shutdown v out -0.1 - 0.1 v v shdn 1.2 - - v v shdn --0 . 8 current limit ripple rejection  psrr db i latch 3.5 - - i q ma quiescent current  1.746 1.8 1.854 1.737 1.8 1.836 a downloaded from: http:///
www.irf.com 3 IRUH330118Ak IRUH330118Ap notes:  tested to 500krad (si).  see fig. 5. space level screening requirements test/inspection screening level mil-std-883 space method nondestructive bond pull 100% 2023 internal visual 100% 2017 seal 100% 1014 temperature cycle 100% 1010 constant acceleration 100% 2001 mechanical shock 100% 2002 pind 100% 2020 pre burn-in-electrical 100% burn-in 100% 1015 final electrical 100% radiographic 100% 2012 external visual 100% 2009 radiation performance characteristics test conditions min t y pu n i t mil-std-883, method 1019 (condition a) operating bias applied during exposure minimum rated load, vin = 6.4v mil-std-883, method 1019 (condition d) total ionizing dose (gamma) (eldrs) operating bias applied durin g 100 exposure minimum rated load, vin = 6.4v single event effects heavy ions (let) seu, sel, segr, seb operating bias applied during exposure under varying operating conditions 300 total ionizing dose (gamma) neutron fluence mil-std-883, method 1017 84 krads (si) 500 1.0e 11 see  neutrons/cm 2 krads (si) mev*cm 2 /mg downloaded from: http:///
4 www.irf.com IRUH330118Ak IRUH330118Ap application information iruh3301xxxx 0.1uf and 1uf ceramic; two 100uf low esr tantalum v in gnd shdn v sense v out 0.1uf and 1uf ceramic; two 100uf low esr tantalum input voltage output voltage fig. 1. typical regulator circuit; note the shdn pin is hardwired in the on position. the v sense pin is connected as noted in the general layout rules section. over-current & over-temperature protection the iruh3301 series provides over-current protection by means of a timed latch function. drivecurrent to the internal pnp pass transistor is limited by an internal resistor (rb in fig. 3) between the base of the transistor and the control ic drive fet. if an over-current condition forces the voltage across this resistor to exceed 0.5v (nom), the latch feature will be triggered. the time-to- latch (t latch ) is nominally 10ms. if the over-current condition exists for less than t latch , the latch will not be set. if the latch is set the drive current to the pnp pass transistor will be disabled. thelatch will remain set until one of the following actions occur: 1. the shdn pin voltage is brought above 1.2v and then lowered below 0.8v. 2. the v in pin voltage is lowered below 1.7v. if the junction temperature of the regulator ic exceeds 140c nominal, the thermal shutdown circuitwill set the internal latch and disable the drive current to the pnp pass transistor as described above. after the junction temperature falls below a nominal 125c, the latch can be reset using either of the actions described above. under-voltage lock-out the under-voltage lock-out (uvlo) function prevents operation when v in is less than 1.7v (nominal). there is a nominal 100mv hysteresis about this point. input voltage rangeshutdown (shdn) the regulator can be shutdown by applying a voltage of >1.2v to the shdn pin. the regulator will restart when the shdn pin is pulled below the shutdown threshold of 0.8v. if the remote shutdown feature is not required, the shdn pin should be connected to gnd. the device functions fully when v in is greater than 2.8v. it enters into under-voltage lock-out at v in < 1.7v (nominal). when 1.7v (nominal) < v in < 2.8v, v out will track v in and overshoot may occur. a larger output capacitor should be used to slow down the v out rise rate for slow v in ramp applications. downloaded from: http:///
www.irf.com 5 IRUH330118Ak IRUH330118Ap input capacitanceinput bypass capacitors: two (0.1  f and 1  f) ceramics and two 100  f low esr tantalums (avx tps or equivalent), placed very close to the v in pin are required for proper operation. when the input voltage supply capacitance is more than 4 inches from the device, additional inputcapacitance is recommended. larger input capacitor values will improve ripple rejection further improving the integrity of the output voltage. output capacitance output bypass capacitors: two (0.1 f and 1 f) ceramics and two 100 f low esr tantalums (avx tps or equivalent) are required for loop stability. faster transient performance can be achieved with multiple additional 1f ceramic capacitors. ceramic capacitors greater than 1f invalue are not recommended as they can cause stability issues. tantalum capacitor values larger than the suggested value are recommended to improve thetransient response under large load current changes. the upper capacitance value limit is governed by the delayed over-current latch function of the regulator and can be as much as 10,000f without causing the device to latch-off during start-up. general layout rules low impedance connections between the regulator output and load are essential. solid power andground planes are highly recommended. in those cases where the board impedances are not kept very small, oscillations can occur due to the effect of parasitic series resistance and inductance on loop bandwidth and phase margin. the v sense pin must be connected directly to the v out pin using as short a trace as possible with the connection inside the first bypass capacitor (see fig. 2a).connect ceramic output capacitors directly across the v out and gnd pins with as wide a trace as design rules allow (see fig. 2a). avoid the use of vias for these capacitors and avoid loops. fig.2shows the ceramic capacitors tied directly to the regulator output. fig. 2a. layer 1 conductor. ground plane below layer 1 fig. 2b. layer 1 silkscreen the input capacitors should be connected as close a possible to the v in pin. downloaded from: http:///
6 www.irf.com IRUH330118Ak IRUH330118Ap fig. 3. simplified schematic circuit v sense + - error amp gnd thermal shutdown v in shdn vref input undervoltage detect shutdown & over current latch disable latch timing capacitor v out rb maximum output current (a) with no derating at maximum dissipation 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 100 110 120 130 140 150 160 170 mounting surface temperature (c) output current (a) fig. 4.  maximum output current versus mounting surface temperature with no derating at maximum dissipation downloaded from: http:///
www.irf.com 7 IRUH330118Ak IRUH330118Ap vout -0.500% -0.250% 0.000% 0.250% 0.500% 1 10 100 1000 10000 100000 total dose (rad (si)) delta-vout (%) eldrs tid fig. 5. change in output voltage vs. total ionizing dose radiation exposure at both high and low dose rates fig. 6. typical power supply ripple rejection at 100ma and 1.6a using recommended layout and capacitors. results above 10khz are influenced by testing setup and layout. psrr (typical) -5 5 15 25 35 45 55 65 75 85 95 105 0.1 1 10 100 1000 10000 freq (khz) psrr (db) recomended setup without part iout=100ma & 1.6a, 1.8vout, 3.3vin downloaded from: http:///
8 www.irf.com IRUH330118Ak IRUH330118Ap fig 7. case outline and dimensions - 8-lead flat pack (lead form down) pin assi g nment pin # pin description 1g n d 2g n d 3 shutdown 4 v sense 5 v out 6 v out 7 v in 8v i n pin assi g nment pin # pin description 1g n d 2g n d 3 shutdown 4 v sense 5 v out 6 v out 7v in 8v i n note:1) all dimensions are in inches note:1) all dimensions are in inches fig 8. case outline and dimensions - 8-lead flat pack (lead trimmed)  warning: this product contains beo  warning: this product contains beo downloaded from: http:///
www.irf.com 9 IRUH330118Ak IRUH330118Ap part numbering nomenclature ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 ir leominster : 205 crawford st., leominster, massachusetts 01453, usa tel: (978) 534-5776 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . data and specifications subject to change without notice. 05/2012 ir u h3 301 18 a k linear regulator u = ultra low dropout regulator radiation hardening h3 = 300 krads device indicator 301 = 3 amp positive regulator output voltage 18 = 1.8v 25 = 2.5v 33 = 3.3v a1 = adjustable optimized for 3.3 v input a2 = adjustable optimized for 5.0v input lead form options blank = lead form down (fig. 7) b = lead form up c = lead trimmed (fig. 8) screening level p = unscreened. 25c electrical test not for qualification k = class k per mil-prf-38534 package type a = 8 lead flat pack downloaded from: http:///


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