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  for technical support and more information, see inside back cover or visit www.ti.com pt5800 series 18-a 5-v input adjustable integrated switching regulator SLTS171A january 2003 - revised - march 2003 standard application c in = required 820f c out = required 330f ordering information pt5801  = 3.3 volts pt5802  = 2.5 volts pt5803  = 1.8 volts pt5804  = 1.5 volts pt5805  = 1.2 volts pt5806  = 1.0 volts pin function 1v o adjust 2 inhibit* 3 margin dn* 4 margin up* 5v in 6v in 7v in 8 sense(C) 9 gnd 10 gnd 11 gnd 12 gnd 13 gnd 14 v out 15 v out 16 v out 17 v out 18 sense(+) features ? 5v input ? 18a output current ? dsp compatible ? low-profile (8mm) ? >90% efficiency ? output margin control (5%) ? adjustable output voltage ? on/off inhibit function ? pre-bias startup capability pin-out information * denotes negative logic: open = normal operation ground = function active description the pt5800 excalibur? series of integrated switching regulators (isrs) combines outstand- ing power density with a comprehensive list of features. they are an ideal choice for applications where board space is a premium and performance cannot be compromised. these modules provide 18a of output current, yet are housed in a low- profile, 18-pin package that is almost half the size of the previous product generation. the integral copper case construction requires no heatsink, and offers the advantages of solderabil- ity and a small foot print (0.736 in2 for suffix n). both through-hole and surface mount pin con- figurations are available. the pt5800 series operates from a 5-v input bus and provides a convenient point-of-load power source for the industrys latest high-performance dsps and microprocessors. the series includes output voltage options as low as 1.0vdc. other features include external output voltage adjustment, a 5% margin control, on/off inhibit, short circuit protection, thermal shutdown, and a differential remote sense. pt series suffix (pt1234 x ) case/pin order package configuration suffix code vertical n (epp) horizontal a (epq) smd c (eps) (reference the applicable package code draw- ing for the dimensions and pc board layout) ? over-current protection ? over-temperature protection ? small footprint (0.736 in2, suffix n) ? surface mount compatible ? ipc lead free 2 pt5800 v o adjust margin up margin dn v in 9?13 4 118 14?17 5, 6, 7 8 2 l o a d c in 820f (required) + c out 330f (required) + inhibit gnd gnd v out 3 sense(+) sense(?)
for technical support and more information, see inside back cover or visit www.ti.com pt5800 series 18-a 5-v input adjustable integrated switching regulator specifications (unless otherwise stated, t a =25c, v in =5v, c in =820f, c out =330f, and i o =i o max) pt5800 series characteristics symbols conditions min typ max units output current i o v in =5v 0 18 a input voltage range v in over i o range 4.5 5.5 v set-point voltage tolerance v o tol 2 %v o temperature variation ? reg temp C40c SLTS171A january 2003 - revised - march 2003
for technical support and more information, see inside back cover or visit www.ti.com note a: characteristic data has been developed from actual products tested at 25c. this data is considered typical data for the isr. note b: soa curves represent operating conditions at which internal components are at or below manufacturers maximum rated operating t emperatures. efficiency vs output current power dissipation vs output current performance data; v in =5v (see note a) output ripple vs output current pt5800 series 18-a 5-v input adjustable integrated switching regulator pin descriptions vin: the positive supply voltage input for the module with respect to the common ground ( gnd ). vout: this is the regulated output voltage from the mod- ule with respect to the common ground ( gnd ). gnd: the common ground node to which the input, output, and external control signals are referenced. sense(?): provides the regulator with the ability to sense the set-point voltage directly across the load. for opti- mum output voltage accuracy this pin s hould always be connected to gnd , even for applications that demand a relatively light load. sense(+): when used with sense(C) , the regulation circuitry will compensate for voltage drop between the converter and the load. the pin may be left open circuit, but con- necting it to v out will optimize load regulation. inhibit*: this is an open-collector (open-drain) negative logic input, referenced to gnd . pulling this pin to gnd disables the modules output voltage. if inhibit* is left open circuit, the output will be active whenever a valid input source is applied. v o adjust: this pin is used to trim the output voltage over a typical range of 15% of nominal. the adjust- ment method uses an external resistor. the resistor is connected from v o adjust to either the (-)sense or (+)sense , in order to adjust the output either up or down, respec- tively. consult the related application note for the adjust limits of a specific part. margin dn*: when this open-collector (open-drain) input is asserted to gnd , the output voltage is automatically decreased by 5% from the nominal. this feature is used in applications where the load circuit must be tested for operation at the extreme values of its supply voltage tolerance. margin up*: this is an open-collector (open-drain) input. when this is asserted to gnd , the output voltage is automatically increased by 5% from the nominal. typical characteristics 50 60 70 80 90 100 0 3 6 9 12 15 18 iout ( a ) efficiency - % pt5801 pt5802 pt5803 pt5804 pt5805 pt5806 0 10 20 30 40 50 0369121518 iout ( a ) ripple - mv pt5802 pt5801 pt5803 pt5804 pt5805 pt5806 0 1 2 3 4 5 6 0369121518 iout ( a ) pd - watts 20 30 40 50 60 70 80 90 0369121518 iout ( a ) ambient temperature (c) 200lfm 120lfm 60lfm nat conv airflow safe operating curves; v in =5v (see note b) SLTS171A january 2003 - revised - march 2003
application notes for technical support and more information, see inside back cover or visit www.ti.com pt5800 & pt5810 series with the sense leads connected, the difference between the voltage measured at v out and gnd pins, and that measured from sense(+) to sense(C) , is the amount of ir drop being compensated by the regulator. this should be limited to 0.6v. (0.3v maximum between pins 17 & 18, and also between pins 8 & 9). note: the remote sense feature is not designed to compensate for the forward drop of non-linear or frequency dependent components that may be placed in series with the converter output. examples include or-ing diodes, filter inductors, ferrite beads, and fuses. when these components are enclosed by the remote sense connections they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. over-current protection to protect against load faults, the regulators incorporate output over-current protection. applying a load that exceeds the regulators over-current threshold (see data sheet specifications) will cause the regulated output to shut down. following shutdown the isr will periodically attempt to recover by initiating a soft-start power-up. this is often described as a hiccup mode of operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is removed. during this period, the average current flowing into the fault is significantly reduced. once the fault is removed, the converter automatically recovers and returns to nor- mal operation. over-temperature protection an on-board temperature sensor protects the modules internal circuitry against excessively high temperatures. a rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. if the internal temperature exceeds the otp threshold (see data sheet specifications), the regulators inhibit* control is automatically pulled low. this disables the regulator, allowing the output voltage to drop to zero as the exter- nal output capacitors are discharged by the load circuit. the recovery is automatic, and begins with a soft-start power up. it occurs when the the sensed temperature decreases by about 10c below the trip point. note: the over-temperature protection is a last resort mecha- nism to prevent thermal stress to the regulator. operation at or close to the thermal shutdown temperature is not r ecom- mended and will reduce the long-term reliability of the module. always operate the regulator within the specified safe operating area (soa) limits for the worst-case conditions of ambient temperature and airflow. differential remote sense connecting the sense(+) and sense(-) pins to the load circuit allows the regulator to compensate for limited amounts of ir voltage drop. this voltage drop is caused by current flowing through the connection resistance between the regulator and the point of regulation some distance away. leaving the sense pins disconnected will not damage the regulator or load circuitry. an internal 15 ? resistor, connected between each sense pin and its corresponding output node, keeps the output voltage in regulation. however, it is important to connect sense(C) to gnd locally, as this provides a return path for the regulators internal bias currents. operating features and system considerations for the pt5800 & pt5810 regulator series the pt5800 (5-v input) and the pt5810 (3.3-v input) series of integrated switching regulators (isrs) provide step-down voltage conversion for output loads of up to 18a. power up & soft-start timing following either the application of a valid input source voltage, or the removal of a ground signal to the inhihit* control pin (with input power applied), the regulator will initiate a soft-start power up. the soft start slows the rate at which the output voltage rises, and also introduces a short time delay, t d (approx. 2ms). figure 1-1 shows the power-up characteristic of a pt5801 (3.3v) with a 10-a load. vo (2v/div) vin (2v/div) horiz scale: 5ms/div t d figure 1-1
for technical support and more information, see inside back cover or visit www.ti.com application notes startup of the pt5800 & pt5810 series isrs with back-feeding source (pre-bias capability) in complex digital systems an external voltage can sometimes be present at the output of the regulator during power up. for example, this voltage may be backfed through a dual-supply logic component such as an fpga or asic. another path might be via a clamp diode (to a lower supply voltage) as part of a power-up sequencing implementation. although the pt5800 (5-v input) and pt5810 (3.3-v input) series of regulators will sink current under steady- state operating conditions, they will not do so during startup 1 as long as certain conditions are maintained 2 . this feature allows these regulators to start up while an external voltage is simultaneously applied to the output. figure 2-1 is an application schematic that demonstrates this capability. the waveforms in figure 2-2 show the behavior of the circuit as input power is applied. note that the plot of the regulator output current (i o ) is approxi- mately zero up to the timestamp a, even though a voltage is initially backfed to the output via the 3.3-v input supply and diodes d 1 & d 2 . the regulator sources current 3 when it begins raising the output above the back-fed voltage to its nominal regulation value. notes 1. startup includes both the application of a valid input source voltage, or the removal of a ground signal from the inhibit* control (pin 2) with a valid input source applied. the output of the regulator is effectively off (tri-state), during the period that the inhibit* control is held low. vin (1v/div) vo (1v/div) io (5a/div) horiz scale 5ms/div a figure 2-2; power-up waveforms with back-feeding source figure 2-1; schematic demonstrating startup into pre-bias capability pt5812 14 ? 17 9 ? 13 5 ? 7 v in v out gnd c out + c in + (3.3 vdc) com com v in v o (2.5v) 8 18 sense(+) sense( ? ) d 2 i o d 1 2. to ensure that the regulator does not sink current, the input voltage must always be greater or equal to the output voltage thr oughout the power-up and power-down sequence. 3. if an external source backfeeding the regulators output is greater than the nominal regulation voltage, the output will begin sinking current at the end of its soft-start power-up sequence. if this current exceeds the rated output, the module could be overstressed. pt5800 & pt5810 series
application notes for technical support and more information, see inside back cover or visit www.ti.com table 3-1; input/output capacitors capacitor recommendations for the pt5800 & pt5810 step-down regulator series input capacitor: the recommended input capacitance is determined by a 700-ma ripple current rating and the following minimum capacitance requirements. ? pt5800 = 820f minimum capacitance ? pt5810 = 1000f minimum capacitance ripple current and <100m ? equivalent series resistance (esr) values are the major considerations, along with temperature, when designing with different types of capacitors. tantalum capacitors have a recommended minimum voltage rating of twice the maximum dc voltage + ac ripple. this is necessary to ensure reliabil- ity for input voltage bus applications output capacitors the esr of the capacitors is less than 100m ? . electrolytic capacitors have marginal ripple performance at frequen- cies greater than 400khz, but excellent low frequency transient response. above the ripple frequency ceramic capacitors are necessary. ceramic capacitors improve the transient response and reduce any high frequency noise components apparent during high cur rent excursions. preferred low-esr electrolytic capacitor part numbers are identified in table 3-1. pt5800/5810 series tantalum capacitors (optional output capacitors) tantalum type capacitors can be used for the output but only the avx tps series, sprague 593d/594/595 series, or kemet t495/t510 series. these capacitors are rec- ommended over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. as a caution the taj series by avx is not recommended. this series has considerably higher esr, reduced power dissipation, and lower ripple current capability. the taj series is less reliable than the avx tps series when determining power dissipation capa- bility. tantalum or oscon? types are recommended for applications where ambient temperatures fall below 0c. capacitor table table 2-1 identifies the characteristics of capacitors from a number of vendors with acceptable esr and ripple current (rms) ratings. the number of capacitors required at both the input and output buses is identified for each capacitor type. this is not an extensive capacitor list. capacitors from other vendors are available with comparable specifications. those listed are for guidance. the rms ripple current rating and esr (equivalent series resistance at 100khz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. s e i r e s / r o d n e v r o t i c a p a cs c i t s i r e t c a r a h c r o t i c a p a cy t i t n a u q g n i k r o w e g a t l o v ) f ( e u l a vt n e l a v i u q e ) r s e ( e c n a t s i s e r s e i r e s t n e r r u c e l p p i r x a m ) s m r ( i c 5 0 1 @ l a c i s y h p ) m m ( e z i s s u b t u p n is u b t u p t u or e b m u n t r a p r o d n e v c i n o s a n a p ) l a i d a r ( c f ) t m s ( k f v 0 1 v 0 1 v 0 1 v 5 3 0 0 0 1 0 6 5 0 0 0 1 0 7 4 8 6 0 . 0 ? 0 9 0 . 0 ? 0 8 0 0 ? 0 6 0 . 0 ? a m 0 5 0 1 a m 5 5 7 a m 0 5 8 a m 0 0 1 1 0 1 6 1 0 1 5 . 2 1 0 1 2 . 0 1 5 . 2 1 5 . 3 1 1 2 1 2 1 1 1 1 2 0 1 c 1 c f u e e 1 6 5 a 1 c f u e e p 2 0 1 a 1 k f v e e q 1 7 4 v 1 k f v e e n o c - i m e h c d e t i n u s e i r e s v x l / z x l s e i r e s x f v 6 1 v 0 1 v 0 1 0 7 4 0 0 0 1 0 8 6 0 9 0 . 0 ? 8 6 0 . 0 ? 5 1 0 . 0 ? a m 0 6 7 a m 0 5 0 1 a m 5 3 7 4 0 1 5 . 2 1 0 1 6 1 0 1 5 . 0 1 2 1 2 1 1 1 l l 2 1 x 0 1 m 1 7 4 b v 6 1 z x l l l 6 1 x 0 1 m 2 0 1 b v 0 1 z x l m 0 8 6 x f 0 1 n o c i h c i n s e i r e s m p / l p ) t m s ( s e i r e s x n v 0 1 v 6 1 v 0 1 0 0 0 1 0 6 5 0 3 3 5 6 0 . 0 ? 0 8 0 . 0 ? 4 2 0 . 0 ? a m 0 4 0 1 a m 0 2 9 a m 0 7 7 3 5 . 2 1 5 1 5 . 2 1 5 1 0 1 8 1 2 3 1 1 1 6 h h m 2 0 1 a 1 m p u 6 h h m 1 6 5 c 1 m p u s g 1 r c m 0 3 3 a 1 x n p : n o c - s o o y n a s p s ) t m s ( p v s v 0 1 v 0 1 0 7 4 0 6 5 5 1 0 . 0 ? 3 1 0 . 0 ? a m 0 0 5 4 > a m 0 0 2 5 > 0 1 5 . 0 1 1 1 7 . 2 1 2 2 1 1 0 7 4 p s 0 1 m m 0 6 5 p v s 0 1 ) t m s ( s p t m u l a t n a t x v av 0 1 v 0 1 0 7 4 0 7 4 5 4 0 . 0 ? 0 6 0 . 0 ? a m 3 2 7 1 a m 6 2 8 1 l 3 . 7 w 7 . 5 h 1 . 4 2 2 1 1 4 0 0 r 0 1 0 m 7 7 4 e s p t 5 0 6 0 0 r 0 1 0 m 7 7 4 v s p t m u l a t n a t r e m y l o p t e m e k ( s e i r e s 0 3 5 t / 0 2 5 tt m s) v 0 1 v 0 1 0 3 3 0 3 3 0 4 0 . 0 ? 5 1 0 . 0 ? a m 0 0 8 1 a m 0 0 8 3 > 3 . 7 3 . 4 43 3 1 1 s a 0 1 0 m 7 3 3 x 0 2 5 t s a 0 1 0 m 7 3 3 x 0 3 5 t m u l a t n a t e u g a r p s ( s e i r e s d 4 9 5t m s) v 0 10 8 60 9 0 . 0 ? a m 0 6 6 12 . 7 6 1 . 42 1 t 2 r 0 1 0 0 x 7 8 6 d 5 9 5
for technical support and more information, see inside back cover or visit www.ti.com application notes using the inhibit control of the pt5800 & pt5810 series of step-down isrs for applications requiring output voltage on/off control, the pt5800 & pt5810 series of isrs incorporate an inhibit function. this function can be used wherever there is a requirement for the output voltage from the isr to be turned off. the on/off function is provided by the inhibit* control (pin 2). the isr functions normally with pin 2 open-circuit, providing a regulated output whenever a valid source voltage is applied between v in (pins 5C7) and gnd (pins 9C13). when a low-level ground signal is applied to pin 2, the regulator output is turned off 2 . figure 4-1 shows the typical application of the inhibit* function. note the discrete transistor (q 1 ). the inhibit* control has its own internal pull-up to +v in potential. an open-collector or open-drain device is recommended to control this input 1 . the voltage thresholds are given in table 4-1. table 4-1; inhibit control requirements parameter min typ max enable (v ih )v in C 0.5v open disable (v il ) C0.2v +0.8v i il C0.5 ma notes: 1. use an open-collector device with a breakdown voltage of at least 10v (preferably a discrete transistor) for the inhibit* input. a pull-up resistor is not necessary. to disable the output voltage the control pin should be pulled low to less than +0.8vdc. 2. when a ground signal is applied to the inhibit* control (pin 2) the module output is turned off (tri-state). the output voltage decays to zero as the load impedance discharges the output capacitors. figure 4-1 turn-on time: in the circuit of figure 4-1, turning q 1 on applies a low-voltage to the inhibit* control (pin 2) and disables the output of the regulator 2 . if q 1 is then turned off, the isr executes a soft-start power up. power up consists of a short delay (approx. 2msec), followed by a period in which the output voltage rises to its full regu- lation voltage. the module produces a regulated output voltage within 10msec. figure 4-2 shows the typical rise in both the output voltage and input current for a pt5812 (2.5v), following the turn-off of q 1 . the turn off of q 1 corresponds to the rise in the waveform, q 1 v ds . the waveforms were measured with a 3.3vdc input voltage, and 10-a load. figure 4-2 vo (1v/div) iin (5a/div) q1 vds (2v/div) horiz scale: 2ms/div pt5800 & pt5810 series pt5812 v in 9 ? 13 4 118 14 ? 17 5, 6, 7 8 2 c in 1,000f + c out 330f + 1 =inhibit gnd gnd v out 3 output sense (+) output sense ( ? ) q 1 bss138
application notes for technical support and more information, see inside back cover or visit www.ti.com pt5800 & pt5810 series adjusting the output voltage of the pt5800 & pt5810 step-down series of regulators using margin up/ margin down the margin up* (pin 4) and margin dn* (pin 3) control inputs allow the output voltage to be easily adjusted by up to 5% of the nominal set-point voltage. to activate, simply connect the appropriate control input to the sense(C) (pin 8), or the local starpoint ground. either a logic level mosfet or a p-channel jfet is recommended for this purpose. for further information see the related applica- tion note on this feature. using the ? v o adjust ? control for a more permanent and precise adjustment, use the vo adjust control (pin 1). the v o adjust control allows adjustment in any increment by up to 10% of the set- point. the adjustment method requires the addition of a single external resistor. table 5-1 gives the allowable adjustment range for each model of the series as v a (min) and v a (max). the value of the external resistor can either be calculated using the formulas given below, or simply selected from the range of values provided in table 5-2. refer to figure 5-1 for the placement of the required resistor. use the resistor r 1 to adjust up, and the resistor (r 2 ) to adjust down. adjust up: an increase in the output voltage is obtained by adding a resistor r 1 , between v o adjust (pin 1) and sense(C) (pin 8). see figure 5-1. adjust down: add a resistor (r 2 ) , between v o adjust (pin 1) and sense(+) (pin 18). see figure 5-1. figure 5-1; v o adjust resistor placement v o adjust resistor calculations the values of r 1 [adjust up] and (r 2 ) [adjust down] can also be calculated using the following formulas. again, use figure 5-1for the placement of the required resistor; either r 1 or (r 2 ) as appropriate. r 1 = v r r o C 24.9 k ? v a C v o (r 2 ) = r o (v a C v r ) C 24.9 k ? v o C v a where: v o = original output voltage v a = adjusted output voltage v r = the reference voltage in table 5-1 r o = the resistance constant in table 5-1 table 5-1 isr output voltage adjustment range and formula parameters series pt. no. 5.0v bus pt5801 pt5802 pt5803 pt5804 pt5805 pt5806 3.3v bus n/a pt5812 4 pt5813 pt5814 pt5815 pt5816 v o (nom) 3.3v 2.5v 1.8v 1.5v 1.2v 1.0v v a (min) 2.6v 2.0v 1.52v 1.31v 1.1v 0.94v v a (max) 3.63v 2.8v # 2.1v 1.82v 1.52v 1.32v v r 0.8v 0.8v 0.8v 0.8v 0.8v 0.8v r o (k ? ? ? ? ? ) 10.2 10.7 10.2 9.76 10.0 10.2 # the pt5812 should not be adjusted higher than its nominal output voltage of 2.5v. see note 4. notes: 1. use a 1% (or better) tolerance resistor in either the r 1 or (r 2 ) location. place the resistor as close to the isr as possible. 2. never connect capacitors from v o adjust to either gnd or v out . any capacitance added to the v o adjust pin will affect the stability of the isr. 3. if the remote sense feature is not being used, the adjust resistor (r 2 ) can be connected to v out , (pins 14-17) instead of sense (+) . pt5800/5810 9 ? 13 1 18 14 ? 17 8 c out 330f + gnd v out sense (+) [note 3] sense ( ? ) (r 2 ) adj down v o adj gnd sense(+) sense( ? ) v out r 1 adjust up 4. the pt5812 may not be adjusted higher than the nominal output voltage of 2.5v. there is insufficient input voltage between v in and v out to accommodate an increase in the output voltage.
for technical support and more information, see inside back cover or visit www.ti.com application notes continued v a (req.d) 2.100 2.3k ? 2.050 7.7k ? 2.000 15.9k ? 1.950 29.5k ? 1.900 56.7k ? 1.850 138.0k ? 1.800 1.1k ? 1.750 (169.0)k ? 6.3k ? 1.700 (66.9)k ? 14.1k ? 1.650 (32.9)k ? 27.2k ? 1.600 (15.9)k ? 53.2k ? 1.550 (5.7)k ? 131.0k ? 1.500 1.8k ? 1.475 (239.0)k ? 4.2k ? 1.450 (102.0)k ? 7.1k ? 1.425 (56.4)k ? 10.7k ? 1.400 (33.7)k ? 15.1k ? 1.375 (20.0)k ? 20.8k ? 1.350 (10.9)k ? 28.4k ? 1.325 (4.4)k ? 39.1k ? 1.300 55.1k ? 2.3k ? 1.275 81.8k ? 4.8k ? 1.250 135.0k ? 7.7k ? 1.225 295.0k ? 11.4k ? 1.200 15.9k ? 1.175 (125.0)k ? 21.7k ? 1.150 (45.1)k ? 29.5k ? 1.125 (18.4)k ? 40.4k ? 1.100 (5.1)k ? 56.7k ? 1.075 83.9k ? 1.050 138.0k ? 1.025 302.0k ? 1.000 0.975 (46.5)k ? 0.950 (5.7)k ? pt5800 & pt5810 series table 5-2 isr adjustment resistor values series pt. no. 5.0v bus pt5801 pt5802 pt5803 pt5804 pt5805 pt5806 3.3v bus n/a pt5812 pt5813 pt5814 pt5815 pt5816 v o (nom) 3.3v 2.5v 1.8v 1.5v 1.2v 1.0v v a (req.d) 3.60 2.3k ? 3.55 7.7k ? 3.50 15.9k ? 3.45 29.5k ? 3.40 56.7k ? 3.35 138.0k ? 3.30 3.25 (475.0)k ? 3.20 (220.0)k ? 3.15 (135.0)k ? 3.10 (92.4)k ? 3.05 (66.9)k ? 3.00 (49.9)k ? 2.95 (37.5)k ? 2.90 (28.6)k ? 2.85 (21.6)k ? 2.80 (15.9)k ? 3.6k ? 2.75 (11.3)k ? 9.3k ? 2.70 (7.4)k ? 17.9k ? 2.65 (4.1)k ? 32.2k ? 2.60 (1.3)k ? 60.7k ? 2.550 [note 4 ] 146.0k ? 2.500 2.450 (321.0)k ? 2.400 (146.0)k ? 2.350 (85.7)k ? 2.300 (55.3)k ? 2.250 (37.2)k ? 2.200 (25.0)k ? 2.150 (16.4)k ? 2.100 (9.9)k ? 2.050 (4.8)k ? 2.000 (0.8)k ? r 1 = black r 2 = (blue)
application notes for technical support and more information, see inside back cover or visit www.ti.com using the margin up/down controls on the pt5800 & pt5810 regulator series the pt5800 & pt5810 series of integrated switching regulator modules incorporate margin up* (pin 4) and margin dn* (pin 3) control inputs. these controls allow the output voltage set point to be momentarily adjusted 1 , either up or down, by a nominal 5%. this provides a convenient method for dynamically testing the load circuits power supply voltage over its operating margin or range. note that the 5% change is also applied to any adjustment of the output voltage, if made, using the v o adjust (pin 1). the 5% adjustment is made by driving the appropriate margin control input directly to the ground reference at sense(-) (pin 8) 2 . an low-leakage open-drain device, such as a mosfet or a p-channel jfet is recommended for this purpose. adjustments of less than 5% can also be accom- modated by adding series resistors to the control inputs (see figure 6-1). the value of the resistor can be selected from table 6-1, or calculated using the following formula. resistor value calculation to reduce the margin adjustment to something less than 5%, series padding resistors are required (see r d and r u in figure 6-1). for the same amount of adjustment, the resistor value calculated for r u and r d will be the same. the formulas is as follows. r u /r d = 499 C 99.8 k ? ? % where ? % = the desired amount of margin adjust in percent. notes: 1. the margin up* and margin dn* controls were not intended to be activated simultaneously. if they are their affects on the output voltage may not completely cancel, resulting in a slight shift in the output voltage set point. 2. when possible use the sense(-) (pin 8) as the ground reference. this will produce a more accurate adjustment of the output voltage at the load circuit terminals. gnd (pins 9-13) can be used if the sense(-) pin is connected to gnd near the regulator. c out + c in +5v gnd margdn l o a d q 2 sense( ? ) +v out gnd pt5800 18 14 ? 17 8 29 ? 13 5, 6, 7 v out v in gnd sns(+) sns( ? ) inhibit* q 1 4 3 marg dn* marg up* + margup 0v +v o r d r u 0v figure 6-1; margin up/down application schematic table 6-1; margin up/down resistor values padding resistor values % adjust r u / r d 5 0.0k ? 4 24.9k ? 3 66.5k ? 2 150.0k ? 1 397.0k ? pt5800 & pt5810 series
package option addendum www.ti.com 2-feb-2014 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples pt5804n obsolete sip module epp 18 tbd call ti call ti pt5806a obsolete sip module epq 18 tbd call ti call ti (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
package option addendum www.ti.com 2-feb-2014 addendum-page 2
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