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  TLE7189F 3-phase bridge driver ic data sheet, rev. 2.2, jan. 2016 automotive power
data sheet 2 rev. 2.2, 2016-01-28 TLE7189F table of contents table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment TLE7189F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 default state of inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 description and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1 mosfet driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1.1 output stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1.2 operation at vs<12v - integrated c harge pumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.3 sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 protection and diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2.1 short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2.2 dead time and shoot through protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2.3 under voltage shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2.4 over voltage shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2.5 over temperature warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2.6 vcc check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2.7 err pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2.8 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.3 shunt signal conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3.1 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6 application description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.1 layout guide lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table of contents
pg-vqfn-48 type package marking TLE7189F pg-vqfn-48 TLE7189F data sheet 3 rev. 2.2, 2016-01-28 3-phase bridge driver ic TLE7189F 1overview features ? compatible to very low ohmic normal level input n-channel mosfets ? pwm frequency up to 30khz ? fulfils specification down to 5.5v supply voltage ? short circuit protection with adjustable detection level ? three integrated current sense amplifiers ? 0 to 100% duty cycle ? low emc sensitivity and emission ? control inputs with ttl characteristics ? separate input for each mosfet ? separate source connection for each mosfet ? integrated minimum dead time ? shoot through protection ? disable function and sleep mode ? detailed diagnosis ? over temperature warning ? vqfn-48 package with exposed pad for excellent cooling ? green product (rohs compliant) ? aec (automotive electron ics council) qualified ? sil3 supporting features: ? vcc check: over- and under voltage check of 5v c supply ? test functions for short circuit detection and vcc check ? high voltage rated inputs description the TLE7189F is a driver ic dedicated to control the 6 to 12 external mosfets forming the converter for high current 3 phase motor drives in the automotive sector. it in corporates features like short circuit detection, diagnosis and high output performance and combines it with typical automotive specific requirem ents like full functionality even at low battery voltages. its 3 high side and 3 low side output stages are powerful enough to drive mosfets with 400nc gate charge with approx. 150ns fall and rise times.
TLE7189F block diagram data sheet 4 rev. 2.2, 2016-01-28 2 block diagram figure 1 block diagram vs err1 ena vdh isp1 vct sh1 gh1 sl1 gl1 sh2 gh2 sl2 gl2 sh3 gh3 sl3 gl3 cl1 charge pump 1 under voltage det. ch1 cb1 cl2 charge pump 2 under voltage det. ch2 cb2 floating hs driver short circuit detection floating ls driver short circuit detection floating hs driver short circuit detection floating ls driver short circuit detection floating hs driver short circuit detection floating ls driver short circuit detection l e v e l s h i f t e r diagnostic logic under voltage over voltage overtemperature short circuit reset vcc failure inh err2 3x current sense opamp bias reference buffer vri vro vo1 agnd il1 ih1 il2 ih2 il3 ih3 input control shoot through protection dead time isn1 isp2 isn2 vo2 scdl vcc voltage check gnd1 isp3 isn3 vo3 vs_oa vs_oa gnd2 gnd3
data sheet 5 rev. 2.2, 2016-01-28 TLE7189F pin configuration 3 pin configuration 3.1 pin assignment TLE7189F figure 2 pin configuration 37 38 39 40 41 42 43 44 45 46 47 48 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 gnd3 tle 7189 f topview ch2 cl2 ch1 cl1 cb1 vs vdh err1 err2 sl1 gl1 gh3 sh3 gh2 sh2 gl2 sl2 gnd1 cb2 gh1 sh1 gnd2 gl3 sl3 isn3 vo3 isp2 isn2 vo2 vro vri isp1 isn1 vo1 ih3 ena agnd isp3 ih2 il2 ih1 il1 scdl vct inh il3 vs_oa
TLE7189F pin configuration data sheet 6 rev. 2.2, 2016-01-28 3.2 pin definitions and functions pin symbol function 1 sl3 connection to source low side switch 3 2 vs_oa voltage supply i-dc link opamps and voltage reference buffer / input for vcc check 3 vo1 output of opamp 1 for shunt signal amplification 4 isn1 - input of opamp 1 for shunt signal amplification 5 isp1 + input of opamp 1 for shunt signal amplification 6 vri input of bias reference amplifier 7 vro output of bias reference amplifier 8 vo2 output of opamp 2 for shunt signal amplification 9 isn2 - input of opamp 2 for shunt signal amplification 10 isp2 + input of opamp 2 for shunt signal amplification 11 vo3 output of opamp 3 for shunt signal amplification 12 isn3 - input of opamp 3 for shunt signal amplification 13 isp3 + input of opamp 3 for shunt signal amplification 14 agnd analog ground especially for the current sense opamps 15 inh inhibit pin (active low) 16 vct input pin for vcc check test 17 scdl input pin to adjust short circuit detection level 18 ena enable pin (active high) 19 il3 input for low side switch 3 (active high) 20 ih3 input for high side switch 3 (active low) 21 il1 input for low side switch 1 (active high) 22 ih1 input for high side switch 1 (active low) 23 il2 input for low side switch 2 (active high) 24 ih2 input for high side switch 2 (active low) 25 err1 error signal 1 26 err2 error signal 2 27 ch2 + terminal for pump capacitor of charge pump 2 28 ch1 + terminal for pump capacitor of charge pump 1 29 cl1 - terminal for pump capacitor of charge pump 1 30 vs voltage supply 31 cl2 - terminal for pump capacitor of charge pump 2 32 gnd3 logic and power ground 33 cb1 buffer capacitor for charge pump 1 34 vdh connection to drain of high side switches for short circuit detection 35 gl1 output to gate low side switch 1 36 sl1 connection to source low side switch 1 37 gnd1 logic and power ground 38 sh1 connection to source high side switch 1 39 gh1 output to gate high side switch 1
data sheet 7 rev. 2.2, 2016-01-28 TLE7189F pin configuration 40 cb2 buffer capacitor for charge pump 2 41 gl2 output to gate low side switch 2 42 sl2 connection to source low side switch 2 43 gh2 output to gate high side switch 2 44 sh2 connection to source high side switch 2 45 gh3 output to gate high side switch 3 46 sh3 connection to source high side switch 3 47 gnd2 logic and power ground 48 gl3 output to gate low side switch 3 pin symbol function
TLE7189F general product characteristics data sheet 8 rev. 2.2, 2016-01-28 4 general product characteristics 4.1 absolute maximum ratings absolute maximum ratings 1) -40 c tj 150 c; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max. voltages 4.1.1 supply voltage v s1 -4.0 45 v with 10 and 1f 4.1.2 supply voltage v s2 -0.3 45 v ? 4.1.3 supply voltage v s3 -0.3 47 v t p <200ms 4.1.4 voltage range at ihx, ilx, ena, vct v dp1 -0.3 18 v ? 4.1.5 voltage range at errx, vox, vri, vro, scdl v dp2 -0.3 6.0 v ? 4.1.6 voltage range at errx, vri, scdl v dp3 -0.3 18 v with 10k 2) 4.1.7 voltage range at vox v vo -0.3 18.0 v with 1k 2) 4.1.8 voltage range at inh v inh -0.3 18.0 v ? 4.1.9 voltage range at vs_oa v vs_oa -0.3 18.0 v ? 4.1.10 voltage range at slx v sl -7 7 v ? 4.1.11 voltage range at shx v sh -7 45 v ? 4.1.12 voltage range at glx v gl -7 18 v ? 4.1.13 voltage range at ghx v gh -7 55 v ? 4.1.14 voltage difference gxx-sxx v gs -0.3 15 v ? 4.1.15 voltage range at vdh v vdh1 -0.3 55 v ? 4.1.16 voltage range at vdh v vdh2 -7.0 55 v with 100 200ms; 10x 4.1.17 voltage range at vdh v vdh3 -9.0 55 v with 100 1ms; 10x 4.1.18 voltage range at vdh v vdh4 -0.3 20 v v inh =low 4.1.19 voltage range at vdh v vdh5 -7.0 28 v v inh =low with 100 200ms; 10x 4.1.20 voltage range at vdh v vdh6 -9.0 28 v v inh =low with 100 200ms; 10x 4.1.21 voltage range at vdh v vdh7 -0.3 28 v v inh =low; 5min; 3x 4.1.22 voltage range at cl1 v cl1 -0.3 25 v ? 4.1.23 voltage range at ch1, cb1 v ch1 -0.3 25 v ? 4.1.24 voltage difference ch1-cl1 v cp1 -0.3 25 v ? 4.1.25 voltage range at cl2 v cl2 -0.3 25 v ? 4.1.26 voltage range at ch2, cb2 v ch2 -0.3 55 v ?
data sheet 9 rev. 2.2, 2016-01-28 TLE7189F general product characteristics note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. 4.2 functional range 4.1.27 voltage difference ch2-cl2 v cp2 -0.3 25 v ? 4.1.28 dc voltage difference between vdh and vs 3) v vdhvs -2 +2 v ? 4.1.29 voltage rang e at ispx, isnx v isi -5 5 v ? 4.1.30 output curr ent range at vox i vox -10 10 ma ? external components 4.1.31 gate resistor r g 2? ? 4.1.32 min. voltage ra ting of cb2 capacitor v ccb2a -20 20 v ? 4.1.33 min. voltage ra ting of cb2 capacitor v ccb2b -31 +31 v v s > 20v; v inh =low temperatures 4.1.34 junction temperature t j -40 150 c? 4.1.35 storage temperature t stg -55 150 c? 4.1.36 lead soldering temperature (1/16?? from body) t sol ?260 c? 4.1.37 peak reflow soldering temperature 4) t ref ?260 c? thermal resistance 4.1.38 junction to case r thjc ?5k/w? esd susceptibility 4.1.39 esd resistivity 5) v esd -2 2 kv 4.1.40 esd resistivity (charge device model) 6) v esd ?750v 1) not subject to production test, specified by design. 2) after 50h the chip must be replaced; resistor in series 3) high frequent transient ringing above 1mhz exceeding the +/-2v is allowed 4) reflow profile ipc/jedec j-std-020c 5) esd susceptibility hbm according to eia/jesd 22-a 114b 6) esd susceptibility cdm according to eia/jesd 22-c 101 pos. parameter symbol limit values unit conditions min. max. 4.2.1 supply voltage 1) v s1 5.5 20 v dc 4.2.2 supply voltage 1) v s2 5.5 28 t a =25c; t <1min absolute maximum ratings (cont?d) 1) -40 c tj 150 c; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max.
TLE7189F general product characteristics data sheet 10 rev. 2.2, 2016-01-28 note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical characteristics table. note: if the voltage difference between cb2 and shx is smaller than 2v during normal operation, there is a risk that the high side output can switch on and off without a corresponding input signal. as soon as this supply voltage recovers and the input signal changes, the out put stage is automatically aligned to the input again. 4.2.3 duty cycle 2) d 0100 % ? 4.2.4 pwm frequency f pwm 0 25 khz total gate charge 400nc 4.2.5 quiescent current 3) i q ?30a v s , v vdh <20 v 4.2.6 quiescent current into vdh i q_vdh ?30a v vdh <20v; v s pin open 4.2.7 supply current at vs i vs ? ? 110 110 90 90 ma f pwm =20khz v s =170nc: v s = 5.5v v s = 14v v s = 18v v s = 20v 4.2.8 supply current at vs (device disabled by ena) i vs(o) ?60 40 ma v s =5.5v... 20v v s =20v... 28v 4.2.9 supply current at vs_oa i vs_oa ?30ma v vs_oa =4.8 ... 5.2v 4.2.10 current flowing into vdh pin (device not in sleep mode) i vdh1 ?1.5ma v s =5.5v... 20v; v shx =0v 4.2.11 current flowing into vdh pin (device not in sleep mode) i vdh2 150 650 a v s =5.5v... 20v; v s = v vdh = v shx ; v ihx =low 4.2.12 voltage difference cb2-vdh v cb2vdh -0.3 20 v operation mode 4.2.13 junction temperature t j -40 150 c 1) for proper start up minimum vs=6.5v is required 2) duty cycle is referred to the high side i nput command (ihx); the duty cycles can be dr iven continuously an d fully operational 3) total current consumption from power net (vs and vdh) pos. parameter symbol limit values unit conditions min. max.
data sheet 11 rev. 2.2, 2016-01-28 TLE7189F general product characteristics 4.3 default state of inputs table 1 default state of inputs note: the load condition ?c=22nf; r load =1 ? in the paragraph ?electrical charac teristics / dynami c characteristic? means that r load is connected between the output gxx and th e positive terminal of the c. the negative terminal of the c is connected to gnd and the correspon ding sxx. the voltage is measured at the positive terminal of the c. note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. characteristic state remark default state of ilx (if ilx left open -pull down) low low side mosfets off default state of ihx (if ihx left open - pull up) high high side mosfets off default state of ena (if ena left open - pull down) low device/outputs disabled default state of vct (if vct left open - pull up) high device/outputs disabled default state of inh (if inh left open - pull down) low sleep mode, i q < 30 a default state of scdl (if scdl left open - internal voltage divider) typ. 1.4v ? default state of sense amplifier output vox (ispx=isnx=0v) zero ampere equivalent ? status of the device and the outputs when ena=inh=high & vct=low 1) device active and outputs functional 5.5....28v; no vcc check failure 1) no special start up procedure is required
TLE7189F description and electrical characteristics data sheet 12 rev. 2.2, 2016-01-28 5 description and electr ical characteristics 5.1 mosfet driver 5.1.1 output stages the 3 low side and 3 high side powerful push-pull output stages of the TLE7189F are al l floating blocks, each with its own source pin. this allows the direct connection of the output stag e to the source of each single mosfet, allowing a perfect control of each gate-source voltage ev en when 200a are driven in the bridge with rise and fall times clearly below 1s. all 6 output stages have the same output power and than ks to the used charge pu mp principle they can be switched all up to 30khz. its output stages are powerful enough to drive mosfets with 400nc gate charge with approx. 150ns fall and rise times or even to run 12 mosfets with 200nc each with fall and rise times of approx. 150ns. maximum allowed power dissipatio n, max. junction temperat ure and the capabilities of the charge pump limit the use for higher frequencies. each output stage has its own short circuit detection bl ock. for more details about short circuit detection see chapter 5.2.1 . figure 3 block diagram of driver stages including short circuit detection cb2 ghx shx vdh v scp + - level shifter floating hs driver 3x glx slx v scp + - level shifter floating ls driver 3x cb1 charge pump 1 charge pump 2 cb2 cb1 cl2 ch2 ch1 cl1 under voltage lock out inh vs error logic reset power on reset under voltage over voltage over temperature short circuit+disable err1 err2 ena short circuit filter scd scd scd input logic shoot through protection dead time lock / unlock ih1 il1 ih2 il2 ih3 il3 on / off on / off uvlo gnd scdl +3.3v r1 r2 to vbat shuntx p-gnd scd scd 100
data sheet 13 rev. 2.2, 2016-01-28 TLE7189F description and electrical characteristics 5.1.2 operation at vs<12v - integrated charge pumps the TLE7189F provides a feature tailored to the requireme nts in 12v automotive applications. often the operation of an application has to be assured even at 9v supply volt age or lower. normally bridge driver ics provide in such conditions clearly less than 9v to the gate of the external mosfets, increasing their r dson and the associated power dissipation. the TLE7189F has two charge pump circuitries for external capacitors. the operation of the charge pumps is indepen dent upon the pulse pattern of the mosfets. the output of the charge pumps are regulated. the first charge pump doubles the supply voltage as long as it is below 8v. at 8v supply voltage and above, charge pump 1 regulates its output to 15v typically. above 15v supply voltage, the output voltage of char ge pump 1 will increase linearly. ye t, the output will not exceed 25v. charge pump 2 is regulated as well but it is pumped to the voltage on vs. normally vdh and vs are in the same voltage range. the driver is not designed to have significan t different voltages at vdh compared to vs. this would lead to reduced supply voltages for the high side output stages. charge pump 1 supplies the low side mosfets and out put stages for the low side mosfets with sufficient voltage to assure 10v at the mosfets gate even if the supply voltage is below 10v. charge pump 2 supplies the output stages for the high side mosfets with suffi cient voltage to assure 10v at the mosfets gate. in addition, the charge pump 1 supplies most of the internal ci rcuits of the driver ic, in cluding charge pump 2. output of charge pump 1 is the buffer capacit or cb1 which is referenced to gnd. charge pump 2 supplies the high side mosfets and the output stages for the high side mosfets with sufficient voltage to assure 10v at the high side mosfet gate. ou tput of charge pump 2 is buffer capacitor cb2 which is referenced to vdh. this concept allows to drive all exte rnal mosfets in the complete duty cycle range of 0 to 100% without taking care about recharging of any bootstrap capacitors. this simplifies the use in all app lications especially in motor dr ives with block wise commutation. the charge pumps are only deactivated when the device is put into sleep mode via inh. the size of the charge pump capacito rs (pump capacitors cpx as well as buffer capacitors cbx) can be varied between 1f and 4.7f. yet, larger capac itor values result in higher charge pump voltages and less voltage ripple on the charge pump buffer capacitors cbx (which supply the internal circuits as well as the external mosfets, pls. see above). besides the capacit ance values the esr of the buffer capacitors cbx determines the voltage ripple as well. it is recommended to use bu ffer capacitors cbx that have small esr. pls. see also chapter 5.1.3 for capacitor selection. 5.1.3 sleep mode when the inh pin is set to low, the driver will be set to sleep mode. the inh pin switches off the comp lete supply structure of the device and leads finally to an under volt age shut down of the complete driver. enabling the device with the inh pin means to switch on th e supply structure. the device will ru n through power on reset during wake up. it is recommended to perform a reset by ena afte r wake up to remove possi ble err signals; reset is performed by keeping ena pin low until the charge pump voltages have ramped up. enabling and disabling with the inh pin is not very fa st. for fast enable / disable the ena pin is recommended. when the TLE7189F is in inh mode (inh is low) or when the supply voltage is not available on the vs pin, then the driver ic is not suppli ed, the charge pumps are inactive and the c harge pump capacitors are discharged. pin cb2 (+ terminal of buffer capacitor 2) will decay to gnd. when the battery voltage is st ill applied to vdh (- terminal of buffer capacitor 2) the buffer ca pacitor 2 will slowly charged to batter y voltage, yet with reversed polarity compared to the polarity during regular operation. hence, it is important to use a buffer capacitor 2 (cb2) that can withstand both, +25 v during operation mode and -v bat during inh mode, e.g. a ceramic capacitor. in case of load dump during inh mode, the negative voltage across cb2 will be clamped to -31 v (cb2 referenced to vdh).
TLE7189F description and electrical characteristics data sheet 14 rev. 2.2, 2016-01-28 5.1.4 electrical characteristics electrical characteristics mosfet drivers - dc characteristics v s = 5.5 to 20v, t j = -40 to +150 c, f pwm < 25khz, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 5.1.1 low level output voltage v g_ll ??0.2v i load =30ma 5.1.2 high level output voltage v g_hl1 9?13v v s =8... 20v; i load =-2ma 5.1.3 high level output voltage, low side v g_hl2 7.5 ? 13 v v s =5.5... 8v; i load =-2ma 5.1.4 high level output voltage, high side v g_hl3 6.5 ? 13 v v s =5.5... 8v; i load =-2ma 5.1.5 high level output voltage difference dv g_h ??1.0v i load =-100ma; v s =20v 5.1.6 gate drive output voltage v gs_d ??0.2v v ena =low or v vct =high; 5.5v< v s <28v i load =10ma 5.1.7 gate drive output voltage tj=-40c tj=25c tj=150c v gs1 ?? 1.4 1.2 1.0 vuvlo; v s <=5.5v; i load =2ma 5.1.8 gate drive output voltage high side tj=-40c tj=25c tj=150c v gs2 ?? 1.4 1.2 1.0 v over voltage or v s =open or v inh =low; i load =2ma 5.1.9 gate drive output voltage low side v gs3 ? ? 0.2 v over voltage; i load =2ma 5.1.10 low level input voltage of ixx, ena v i_ll ??1.0v? 5.1.11 high level input voltage of ixx, ena v i_hl 2.0??v? 5.1.12 input hysteresis of ihx, ilx, ena dv i1 50 ? ?- mv v s =5.5... 8v 5.1.13 input hysteresis of ihx, ilx, ena dv i2 100 200 ?- mv v s =8... 20v 5.1.14 low level input voltage of inh v i_ll ? ? 0.75 v ? 5.1.15 high level input voltage of inh v i_hl 2.1??v? 5.1.16 ihx pull up resistor r ihx 18 30 42 k v ihx <5.5v 5.1.17 ilx pull down resistor r ilx 18 30 42 k v ilx <5.5v 5.1.18 inh, ena pull down resistor r inen 27 45 63 k v inh ; v ena <5.5v 5.1.19 quiescent current vdh i qvdh ?5? a25c; v inh =low 5.1.20 output bias current shx i shx -1.6 -1.0 -0.3 ma v s =5.5...20v; v shx =0...( v s +1); v ilx =low; v ihx =high 5.1.21 output bias current slx i slx -1.6 -1.0 -0.3 ma v s =5.5...20v; v slx =0...7v; v ilx =low; v ihx =high
data sheet 15 rev. 2.2, 2016-01-28 TLE7189F description and electrical characteristics electrical characteristics mosfet drivers - dynamic characteristics v s = 5.5 to 20v, t j = -40 to +150 c, f pwm < 25khz, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 5.1.22 fixed internal dead time t dt 220 400 600 ns ? 5.1.23 turn on current, peak i g(on)1 ?-1.5?a v gxx - v sxx =0v; v s =8...20v; c load =22nf; r load =1 5.1.24 turn on current, peak i g(on)2 ?-0.8?a v gxx - v sxx =0v; v s =5.5...8v; c load =22nf; r load =1 5.1.25 turn off current, peak i g(off) ?1.5?a v gxx - v sxx =10v; v s =8...20v; c load =22nf; r load =1 5.1.26 rise time (20-80%) t j = -40c t j = 25c t j = 150c t g_rise ? 150 400 400 700 ns c load =22nf; r load =1 5.1.27 fall time (20-80%) t j = -40c t j = 25c t j = 150c t g_fall ? 150 230 230 500 ns c load =22nf; r load =1 ; 5.1.28 input propagation time (low on) t p(iln) 90 190 290 ns c load =22nf; r load =1 5.1.29 input propagation time (low off) t p(ilf) 0100200ns 5.1.30 input propagation time (high on) t p(ihn) 90 190 290 ns 5.1.31 input propagation time (high off) t p(ihf) 0100200ns 5.1.32 absolute input propagation time difference (all channels turn on) t p(an) ??70ns 5.1.33 absolute input propagation time difference (all channels turn off) t p(af) ??50ns 5.1.34 absolute input propagation time difference (1channel high off - low on) t p(1hfln) ? ? 180 ns c load =22nf; r load =1 5.1.35 absolute input propagation time difference (1channel low off - high on) t p(1lfhn) ? ? 180 ns 5.1.36 absolute input propagation time difference (all channel high off - low on) t p(ahfln) ? ? 180 ns 5.1.37 absolute input propagation time difference (all channel low off - high on) t p(alfhn) ? ? 180 ns 5.1.38 wake up time; inh low to high t inh_pen1 ??20msdriver fully functional; v s =6.5...8v; v ena =low; c cpx = c cbx =4,7f
TLE7189F description and electrical characteristics data sheet 16 rev. 2.2, 2016-01-28 5.1.39 wake up time; inh low to high t inh_pen2 ??10msdriver fully functional; v s =8...20v; v ena =low; c cpx = c cbx =4,7f 5.1.40 wake up time logic functions; inh low to high t inh_log ??10msdriver fully functional; v s =6.5...8v; v ena =low; c cpx = c cbx =4,7f 5.1.41 wake up time logic functions; inh low to high t inh_log ??5msdriver fully functional; v s =8...20v; v ena =low; c cpx = c cbx =4,7f 5.1.42 inh propagation time to disable the output stages t inh_pdi1 ??10s v s =5.5...8v 5.1.43 inh propagation time to disable the output stages t inh_pdi2 ??8s v s =8...20v 5.1.44 inh propagation time to disable the entire driver ic t inh_pdi3 ??300s? 5.1.45 supply voltage v s for wake up v vswu 6.5 ? ? v diagnostic, opamp working 5.1.46 charge pump frequency f cp 38 55 72 khz ? electrical characteristics mosfet drivers - dynamic characteristics v s = 5.5 to 20v, t j = -40 to +150 c, f pwm < 25khz, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 17 rev. 2.2, 2016-01-28 TLE7189F 5.2 protection and diagnostic functions 5.2.1 short circuit protection the TLE7189F provides a short circuit protection for the external mosfets. it is a monitoring of the drain-source voltage of the external mosfets. as so on as this voltage is higher than the short circuit detection limit, a capacitor will be charged. the high side and the lo w side output stage of the same half bridge use the sa me capacitor (see figure 3 ). this capacitor is discharged permanently with a current which is about 2 times smaller than the charging current. this char ging and discharging ratio is specified with the help of duty cycle where a short is detected or not detected. after a delay of about 12s all exter nal mosfets will be switched of f until the driver is reset by the ena pin. the error flag is set. the drain-source voltage monitoring of the short circuit det ection for a certain external mosfet is active as soon as the corresponding input is set to "on" and the dead time is expired. the short circuit detection level is adjustable in an analo gue manner by the voltage setting at the scdl pin. there is a 1:1 translation between the voltage applied to the scdl pin and the drain-source voltage limit. e.g. to trigger the scd circuit at 1v drain-source volt age, the scdl pin must be set to 1v as well. the drain-source voltage limit can be chosen between 0.7 ... 2.5v. if the scdl pin is left open, the short circuit detection leve l will be set internally to a specified value. in case scdl is connected to gnd the detection level is low. if scdl is connected to 3. 3v, the detection level is about 3.2v. in the TLE7189F the short circuit detection functionality can be tested by setting the sc dl pin to voltages lower than 0.4v, switching off the low side mosfets and switchin g on one or more high side mosfets. in this test, a short circuit will be detected even without current in the ex ternal mosfet (vdh-shx > v tscd1 ). this test function can be used as well to detect an open vdh pin. if vdh is open during this test, no scd error will be reported. a setting of 5v at the scdl pin will disa ble the short circuit protection function. 5.2.2 dead time and s hoot through protection in bridge applications it has to be assured that the exte rnal high side and low side mosfets are not "on" at the same time, connecting directly the battery voltage to g nd. the dead time generated in the TLE7189F is fixed to a minimum value. this function assures a minimum dead time if the input signals coming from the c are faulty. the exact dead time of the bridge is usually controlled by the pwm generation unit of the c. in addition to this dead time, the TLE7189F provides a locking mechanism, avoiding that both external mosfets of one half bridge can be switched on at the same time. this functionality is called shoot through protection. if the command to switch on both high and low side switches in the same half bridge is given at the input pins, the command will be ignored . the conflicting input signals w ill not generate an error message. 5.2.3 under voltage shut down the TLE7189F has an integrated under voltage shut down, to assure that the behavior of the device is predictable in all voltage ranges. if the voltage of a charge pump buffer capacitors cbx re aches the under voltage shut down level for a minimum specified filter time, the gate -source voltage of all external mosfets will be actively pu lled to low. in this situation the short circuit detection of this ou tput stage is deactivated to avoid a latching shut down of the driver. as soon as the charge pump buffer volt age recovers, the ou tput stage condition will be a ligned to the input patterns automatically.this allows to continue operation of the moto r in case of under voltage shut down without a reset by the c.
TLE7189F data sheet 18 rev. 2.2, 2016-01-28 under voltage shut down will not occur when v s > 6v, q g < 250nc, f pwm < 25khz, and the charge pump capacitors cxx = 4.7 f. 5.2.4 over voltage shut down the TLE7189F has an integrated over voltage shut down to avoid destruction of the ic at high supply voltages.the voltage is measured at the vs and the vdh pin. when on e of them or all of them exceed the over voltage shut down level for more than the specified filter time then the external mosfets are switched off. in addition, over voltage will shut down the charge pu mps and will discharge the charge pump ca pacitors. this results in an under voltage condition which will be indicated on the errx pins. during over volt age shut down the external mosfets and the charge pumps remain off until a reset is performed. 5.2.5 over temperature warning if the junction temperature is exceeding typ. 155c an error signal is gi ven as warning. the driver ic will continue to operate in order not to disturb the application. the warning is removed automatically when the junction temperature is cooling down. it is in the responsibility of the user to protect the device agai nst over temperature destruction. 5.2.6 vcc check to assure a high level of system safety, the TLE7189F provides an vcc check. the 5.0v system supply connected to the vs_oa pin is checked by an internally monitoring for over- and under voltage. an internal filter time is in tegrated to avoid faulty triggering. the vcc check is active when the signal on the ena pin is high and inactive when ena signal is low (=driver ic disabled). in case of under- or over voltage at vs_oa, the vcc check will disable the driver ic and is latched. to restart the output stages, a reset has to be performed with the ena pin. the vct pin decides about the over volt age and under voltage detection level. 5.2.7 err pins the TLE7189F has two status pins to provide diagnostic feedback to the c. the outputs of these pins are 5v push pull stages, they are either high or low. table 2 overview of error conditions table 3 behavior at different error conditions inh ena err1 err2 driver conditions high high low low under voltage or vcc check error high high low high over temperature or over voltage high high high low short circuit detection high high high high no errors observed high low high high no errors will be reported low x low low err output tristate - low secured by pull down error condition restart behavior shuts down... short circuit detection latch, reset must be performed at ena pin all external power -mosfets under voltage auto restart all external power -mosfets over voltage latch, reset must be performed at ena pin all external power -mosfets
data sheet 19 rev. 2.2, 2016-01-28 TLE7189F note: all errors do not lead to sleep mode. sleep mode is only initiated with the inh pin. the latch and restart behavior allows to distinguish between the diffe rent error types combined at the err signals. table 4 priorisation of errors reset of error registers and disable the TLE7189F can be reset with the help of the enable pin ena. if the ena pin is pulled to low for a specified minimum time, the error registers are cleared and the external mosfets are switched off actively. during disable only the errors under voltage shut down and over temperatur e warning are shown. other errors are not displayed. 5.2.8 electrical characteristics over temperature warning self clearing nothing vcc check latch, reset must be performed at ena pin all external power -mosfets error condition restart behavior shuts down... priority error 1vcc check 2 short circuit detection 3 under voltage detection 4 over voltage detection 5 over temperature electrical characteristics - pr otection and diagnostic functions v s = 5.5 to 20v, t j = -40 to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. over temperature 5.2.1 over temperature warning t j(ow) 135 155 175 c ? 5.2.2 hysteresis for over temperature warning dt j(ow) ?20?c? short circuit detection 5.2.3 filter time of short circuit protection t scp(off) 8 12 16 s default 5.2.4 maximum duty cycle for no scd 1) d scdmax ??30% f pwm =100khz at ihx or ilx and at static applied sc 5.2.5 minimum duty cycle for periodic scd 1) d scdmin 70??% f pwm =100 khz at ihx or ilx and at static applied sc 5.2.6 voltage range on vscd pin to adjust the vds limit v scdla1 0.7 ? 2.5 v short circuit detection is active 5.2.7 short circuit detection level v scdla2 2.64 ? 3.63 v short circuit detection is active v scdl =3.3v
TLE7189F data sheet 20 rev. 2.2, 2016-01-28 5.2.8 short circuit disable voltage at vscd pin v scdl(dis) 4.5 ? 5.5 v short circuit detection is disabled 5.2.9 accuracy of scd (v scdl /v ds(off) ) a sc(off)1 0.85 ? 1.15 ? v scdl(off) set to 1... 2.5v 5.2.10 accuracy of scd (v scdl /v ds(off) ) a sc(off)2 0.7 ? 1.3 ? v scdl(off) set to 0.7... 1v 5.2.11 scdl pull up resistor r scdu ? 400 ? k not tested 5.2.12 scdl pull down resistor r scdd ? 160 ? k not tested 5.2.13 scdl default voltage v scdlop ? 1.4 ? v open pin test of short circuit detection 5.2.14 scdl voltage for scd test activation v scdt ??0.4v? 5.2.15 filter time for scd test activation t scdt 0.5 2.5 ? s ? 5.2.16 vdh-shx voltage for scd detection in scd test mode v tscd1 -80??mv 5.2.17 vdh-shx voltage with no scd detection in scd test mode v tscd2 ??-350mv err pins 5.2.18 high level output voltage of errx v oherr 4.0 ? 5.2 v i load = -0.2ma 5.2.19 low level output voltage of errx v olerr -0.1 ? 0.4 v i load = 0.2ma 5.2.20 err pull down resistor r err 2.7 ? 112 k v err <5.5v; v inh =low 5.2.21 propagation time difference err1 and err2 t pd(err) ??200ns? over- and under voltage 5.2.22 over voltage shut down v ov(off) 28 ? 33 v ? 5.2.23 over voltage filter time t ov 30 ? 60 s ? 5.2.24 under voltage shut down cb1 v uv1 7.4 8.2 9.0 v cb1 to gnd 5.2.25 under voltage shut down cb2 v uv2 4.6 ? 6.8 v cb2 to vdh 5.2.26 hysteresis of under voltage shut down on cb1 and cb2 v huv1,2 ?1.0?v? 5.2.27 under voltage filter time on cb1 and cb2 t uv 3.557s? enable and reset 5.2.28 reset time to clear err registers t res1 3.0??s? 5.2.29 low time of ena signal without reset t res0 ??1.0s? 5.2.30 ena propagation time (for enable / disable) t pena ??4.0s? electrical characteristics - pr otection and diagnostic functions (cont?d) v s = 5.5 to 20v, t j = -40 to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 21 rev. 2.2, 2016-01-28 TLE7189F 5.2.31 return time to normal operation at auto-restart t ar ??1.0s? vcc check 5.2.32 under voltage detection level v vcu 4.3 ? 4.7 v v vct =low 5.2.33 over voltage detection level v vcol 5.3 ? 5.8 v v vct =low 5.2.34 over voltage detection level v vcoh 3.3 ? 4.3 v v vct =high 5.2.35 over- and under voltage filter time t vc 10 ? 25 s ? 5.2.36 low level input voltage of vct v vct_ll ??1.0v? 5.2.37 high level input voltage of vct v vct_hl 2.0??v? 5.2.38 vct pull down resistor r vct 27 45 63 k v vct <5.5v 5.2.39 filter time for vct test t vct 1.3 2 3.0 s ? 1) parameters describe the behavior of the internal scd circui t. therefore only internal delay times are considered. in application dead-/ delay times determined by application circ uit (switching times of mosfets, adjusted dead time) have to be considered as well. electrical characteristics - pr otection and diagnostic functions (cont?d) v s = 5.5 to 20v, t j = -40 to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
TLE7189F data sheet 22 rev. 2.2, 2016-01-28 5.3 shunt signal conditioning the TLE7189F incorporates three fast and precise operational amplifiers for conditioning and amplification of the shunt signals sensed in the three phas es. additionally, one reference bias buffer is integrated to provide an adjustable bias reference for the three opamps. the voltage divider on the vri pin should be less than 50 k , the filtering capacitor less than 1.2 f - if needed at all. the gain of the opamps is adjustable by external resistors within a range of 3 to 20 or more, as long as th e band width satisfies the need of the application. in the circuit example below vo1 provides the reference voltage v vro , when the shunt voltage is zero. v vro is normally half of the regulated voltage provided from an external voltage regulator for the adc used to read the current sense signal. the additional buffer allows bi-dir ectional current sensing and permits the adaptation of the reference bias to different c i/o voltages. the refer ence buffer assures a stable reference voltage even in the high frequency range. the reference bias buffer is used for all of the opamps. the opamps of the TLE7189F demonstrate low offset voltages and very little drift over temperature, th us allowing accurate phase current measurements. figure 4 shunt signal conditioning block diagram vri vro isp1 isn1 - + - + shunt rfb rfb rs rs vo1 bias reference i-dc link opamp1 3.3v isp2 isn2 - + i-dc link opamp2 vo2 isp3 isn3 - + i-dc link opamp3 vo3 rfb rfb rs rs rs rs to adcs tle7189 adjustable bias reference r vri r vri c vri c vri < 1.2 f (if needed) r vri < 50 kohm 1k 1k dependent on customer specific requirements additional filtering can be necessary
data sheet 23 rev. 2.2, 2016-01-28 TLE7189F 5.3.1 electrical characteristics electrical characteristics - current sense signal conditioning v s = 5.5 to 20v, v vsoa = 5v, t j = -40 to +150 c, f pwm < 25khz, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 5.3.1 series resistors r rs 100 500 1000 ? 5.3.2 resistor ratio (gain ratio) r rfb / r rs1 5?20?? 5.3.3 resistor ratio (gain ratio) r rfb / r rs2 3?20? 1k and 200pf at vox 5.3.4 input differential voltage (ispx - isnx) v idr -800 ? 800 mv ? 5.3.5 input voltage (both inputs - gnd) (isp - gnd) or (isn -gnd) v ll1 -800 ? 2200 mv v s =8 ... 20v 5.3.6 input voltage (both inputs - gnd) (isp - gnd) or (isn -gnd) v ll2 -800 ? 1500 mv 5.3.7 input offset volt age of the i-dc link opamp, including drift over temperature range v io1 -1.58 ? 1.28 mv r rs =500 ; v cm =0v; v o =1.65v; v vri =1.65v 5.3.8 input offset voltage of reference buffer v io2 -3?2mv? 5.3.9 vri input range v ri 1.2 ? 2.6 v ? 5.3.10 input bias current i ib -300 ? ? a v cm =0v; vox=open 5.3.11 input bias current of reference buffer i ibrb 0.6 1.4 2.4 a v vri =1.65v 5.3.12 high level output voltage of vox v oh 4.0 ? 4.5 v v vri =1.2 ... 2.6v; i ox =-3ma; 5.3.13 low level output voltage of vox v ol -0.1 ? 0.2 v v vri =1.2 ... 2.6v; i ox =3ma 5.3.14 output voltage of vox v or 1.623 1.65 1.668 v v in(ss) =0v; gain=15; v vri =1.65v 5.3.15 output short circuit current i sc ? ? -5 ma short to gnd 5.3.16 differential input resistance 1) r ri 100??k ? 5.3.17 common mode input capacitance 1) c icm ? ? 10 pf 10khz 5.3.18 common mode rejection ratio at dc cmrr = 20*log((vout_diff/vin_diff) * (vin_cm/vout_cm)) cmrr 80??db? 5.3.19 common mode suppression 2) with cms = 20*log(vout_cm/vin_cm) freq =100khz freq = 1mhz freq = 10mhz cms ? 62 43 33 ?db v in =360mv* sin(2* *freq*t); r rs =500 ; r rfb =7500 ; v vri =1.65, 2.5v
TLE7189F data sheet 24 rev. 2.2, 2016-01-28 5.3.20 slew rate i sc ? 10 ? v/s gain>= 5; r load =1.0k ; c load =500pf 5.3.21 large signal open loop voltage gain (dc) a ol 80 100 ? db ? 5.3.22 unity gain bandwidth gbw 10 20 ? mhz r load =1k ; c load =100pf 5.3.23 phase margin 1) m ? 50 ? gain>= 5; r load =1k ; c load =100pf 5.3.24 gain margin 1) a m ?12?db r load =1k ; c load =100pf 5.3.25 bandwidth bw g 1.6 ? ? mhz gain=15; r load =1k ; c load =500pf; r rs =500 5.3.26 output settle time to 98% t set ? 1 1.8 s gain=15; r load =1k ; c load =500pf; 0.2< v vo < 4.0v; r rs =500 5.3.27 output rise time 10% to 90% t irise ??1s 5.3.28 output fall time 90% to 10% t ifall ??1s 1) not subject to production test; specified by design 2) without considering any offsets such as input offset volt age, internal miss match and assuming no tolerance error in external resistors. electrical characteristics - current sense signal conditioning (cont?d) v s = 5.5 to 20v, v vsoa = 5v, t j = -40 to +150 c, f pwm < 25khz, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 25 rev. 2.2, 2016-01-28 TLE7189F application description 6 application description in the automotive sector there are more and more applic ations requiring high performance motor drives, such as electro-hydraulic or electric power steering. in these applications 3 phase motors, synchronous and asynchronous, are used, combining hi gh output performance, low spac e requirements and high reliability. figure 5 application circuit - TLE7189F note: this is a very simplified example of an application ci rcuit. the function must be verified in the real application. sh1 v s =12v c xxxx f c and/or system asic gh1 sh2 gh2 gl1 gl2 vs il1 ih1 gnd sl1 sh3 gh3 sl2 gl3 sl3 il2 ih2 il3 ih3 gnd vdh tle7189 p-gnd p-gnd err1 err2 ch1 cl1 c cp1 1 f cb1 c cb1 2.2f vro isp2 isp3 vo1 shunt inh ena scdl vo2 isp1 isn2 vo3 isn1 isn3 vs_oa vct v_bridge r vdh 100 >2 ch2 cl2 c cp2 1f cb2 c cb2 1 f ceramic v_bridge vri >2 >2 >2 >2 >2 reverse polarity switch r vs 10 *) *) see max. ratings see 4.1.2: all pump capacitors 1 f to 4.7 f capacitors for shunt signal conditioning only if additional filtering is desired r err *) r err *) r o *)
TLE7189F application description data sheet 26 rev. 2.2, 2016-01-28 6.1 layout guide lines please refer also to the simplified application example. ? three separated bulk capacitors c b should be used - one per half bridge ? three separated ceramic capacitors c c should be used - one per half bridge ? each of the 3 bulk capacitors c b and each of the 3 ceramic capacitors c c should be assigned to one of the half bridges and should be placed very close to it ? the components within one half bridge should be placed close to each other: high side mosfet, low side mosfet, bulk capacitor c b and ceramic capacitor c c (c b and c c are in parallel) and the shunt resistor form a loop that should be as small and tight as possible. the traces should be short and wide ? the three half bridges can be separated; yet, when there is one common gnd referenced shunt resistor for the three half bridges the sources of the three low side mosfets should be close to each other and close to the common shunt resistor ? vdh is the sense pin used for short circuit detection; vdh should be routed (via rvdh) to the common point of the drains of the high side mosfets to sense the voltage present on drain high side ? cb2 is the buffer capacitor of charge pump 2; its ne gative terminal should be routed to the common point of the drains of the high side mosfets as well - this connection should be low inductive / resistive ? additional r-c snubber circuits (r and c in series) can be placed to at tenuate/suppress oscillations during switching of the mosfets, there may be one or two snub ber circuits per half bri dge, r (several ohm) and c (several nf) must be low inductive in terms of routing and packaging (ceramic capacitors) ? the exposed pad on the backside of the vqfn is recommended to connect to gnd
data sheet 27 rev. 2.2, 2016-01-28 TLE7189F package outlines 7 package outlines figure 6 pg-vqfn-48 green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). you can find all of our packages, so rts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm
TLE7189F revision history data sheet 28 rev. 2.2, 2016-01-28 8 revision history version date changes v0.1 2005-11 proposal for target data sheet v1.0 2007-02-26 preliminary data sheet v2.0 2007-03-29 data sheet v2.1 2007-05-30 5.1.25 + 26: turn on current - sign changed 5.3.10: input bias current - sign changed 5.3.15: output short circui t current - sign changed description of opam p slightly changed names of some parameters changed v2.2 2016-01-28 package adjustments
edition 2016-01-28 published by infineon technologies ag 81726 munich, germany ? 2016 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.


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