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sit 9387 220 to 725 mhz ultra - low jitter differential oscillator features ? aec - q100 with e xtended temperature range ( - 40 c to 105c) ? any frequenc y between 220.000001 mhz and 725 mhz , accurate to 6 decimal places . for frequency between 1 and 220 mhz, see sit9386 ? lvpecl, lvds and hcsl output signaling ? frequency stability as low as 25 ppm C contact sitime ? 0.23 ps rms (typ) phase jitter (random, 12 khz to 20 mhz) ? industry - stan dard packages: 3.2 x 2.5, 7.0 x 5.0 mm ? contact sitime for 5.0 x 3.2 mm package applications ? 100 gbps ethernet, sonet, sata, sas, fibre channel ? telecom, networking, instrumentation, storage, servers electrical characteristics all min and max limits in the electrical characteristics tables are specified over temperature and rated operating voltage wi th standard output termination show in the termination diagrams. typical values are at 25c and n ominal supply voltage. table 1. electrical characteristics C common to lvpecl, lvds and hcsl parameter symbol min. typ. max. unit condition frequency range output frequency range f 220.000001 C 725 mhz accurate to 6 decimal places frequency stability frequency stability - 25 C +25 ppm inclusive of initial tolerance, operating temperature, rated power supply voltage and load variations. contact sitime for 25 ppm. - 50 C +50 ppm inclusive of initial tolerance, operating temperature, rated power supply voltage and load variations. first year aging f_aging1 C 1 C ppm at 25c temperature range operating temperature range t_use - 40 C +85 c industrial - 40 C +105 c e xtended industrial supply voltage supply voltage vdd 2.97 3.30 3.63 v 2.70 3.00 3.30 v 2.52 2.80 3.08 v 2.25 2.50 2.75 v input characteristics input voltage high vih 70% C C vdd pin 1 , oe input voltage low vil C C 30% vdd pin 1 , oe input pull - up impedance z_in C 100 - k pin 1 , oe logic high or logic low output characteristics duty cycle dc 45 C 55 % startup and oe timing start up time t_start C C 3 .0 ms measured from the time vdd reaches its rated minimum value. oe enable/disable ti me t_oe C 3.8 s f = 322.265652 mhz rev 0.90 november 24, 2017 www.sitime.com
SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 2 of 12 www.sitime.com table 2 . electri cal characteristics lvpecl specific parameter symbol min. typ. max. unit condition current consumption current consumption idd 9 4 ma excluding load termination current, vdd = 3.3v or 2.5v oe disable supply current i_oe 63 ma oe = low output d isable leakage current i_leak 0.15 ? parameter symbol min. typ. max. unit condition current consumption current consumption idd 89 ma excluding load termination current, vdd = 3.3v or 2.5v oe disable supply current i_oe 67 ma oe = low output disable leakage current i_leak 0.15 ? SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 3 of 12 www.sitime.com table 4 . electrical characteristics hcsl specific parameter symbol min. typ. max. unit condition current consumption current consumption idd 97 ma excluding load termination current, vdd = 3.3v or 2.5v oe disable supply current i_oe 63 ma oe = low output disable leakage current i_leak 0.15 ? ?? 4 3 1 6 g n d v d d o u t + 5 2 n c o u t - o e / n c SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 4 of 12 www.sitime.com table 6 . absolute maximum ratings attempted operation outside the absolute maximum ratings may caus e permanent damage to the part. actual performance of the ic is only guaranteed within the operational specifications, not at absolute maximum ratings. parameter min. max . unit vdd - 0.5 4 .0 v vih vdd + 0.3v v vil - 0.3 v storage temperature - 65 150 o c maximum junction temperature 130 o c soldering temperature (follow standard pb - free soldering guidelines) 260 o c table 7 . thermal considerations [ 6 ] package ? ? ? ? ? ? parameter test conditions value unit mechanical shock resistance mil - std - 883f, method 2002 1 0, 000 g mechanical vibration resistance mil - std - 883f, method 2007 70 g soldering temperature (follow stand ard pb free soldering guidelines) mil - std - 883f, method 2003 260 c moisture sensitivity level msl1 @ 260 c electrostatic discharge (hbm) hbm, jesd22 - a114 2 , 000 v charge - device model esd protection jesd220c101 750 v latch - up tolerance jesd78 compliant SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 5 of 12 www.sitime.com waveform diagrams figure 2 . lvpecl/hcsl voltage levels per differential pin (out+/out - ) figure 3 . lvpecl/hcsl voltage levels across diff erential pair figure 4 . lvds voltage levels per differential pin (out+/out - ) 0 v t v _ s w i n g o u t + o u t - g n d t r t f 2 0 % 8 0 % 2 0 % v o s 8 0 % v o d o u t + o u t - g n d t r t f 2 0 % 8 0 % 2 0 % v o l 8 0 % v o h SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 6 of 12 www.sitime.com termination diagrams lvpecl: figure 5 . lvpecl with ac - coup led termination figure 6 . lvpecl dc - coupled load termination with thevenin equivalent network figure 7 . lvpecl with y - bias termination o u t + o u t - 5 0 ? z o = 5 0 ? z o = 5 0 ? v t 5 0 ? s h u n t b i a s t e r m i n a t i o n n e t w o r k d - d + 0 . 1 f 0 . 1 f l v p e c l r b r b v d d r b 1 0 0 ? 4 8 . 7 ? 3 . 3 v 2 . 5 v vdd r 1 r 2 r 1 r 2 out+ out - out+ out - vdd r 1 ? ? ? ? 3.3 v 2.5 v r 2 = r ? = r ? thevenin - equivalent termination network d - d+ d - d+ lvpecl r 1 r 2 out+ out - out+ out - vdd r 1 ? ? ? ? 3.3 v 2.5 v r 2 r 3 ? ? = r ? = r ? r 3 c 1 f y - bias termination network d - d+ d - d+ lvpecl SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 7 of 12 www.sitime.com term ination diagrams (continued) figure 8 . lvpecl with dc - coupled parallel shunt load termination out+ out - out+ out - ? = r ? = r ? v t =vdd - 2v ? shunt bias termination network d - d+ d - d+ lvpecl SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 8 of 12 www.sitime.com termination diagrams (continued) lvds: figure 9 . lvds single dc termination at the load figure 10 . lvds double ac termination with capacitor close t o the load figure 11 . lvds double dc termination out+ out - out+ out - ? = r ? = r ? lvds out+ out - out+ out - o u t + o u t - 1 0 0 ? z o = 5 0 ? z o = 5 0 ? 0 . 1 f 0 . 1 f l v d s o u t + o u t - 1 0 0 ? o u t + o u t - 1 0 0 ? z o = 5 0 ? z o = 5 0 ? l v d s o u t + o u t - 1 0 0 ? SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 9 of 12 www.sitime.com termination diagrams (continued) hcsl: figure 12 . hcsl in terface termination out+ out - out+ out - = r ? = r ? d - d+ d - d+ r2 r1 5 5 ? ? ? SIT9387 220 to 725 mhz ultra - low jitter differential oscillator rev 0.90 page 10 of 12 www.sitime.com dimensions and patterns package size dimensions (unit: mm) [8] recommended land pattern (unit: mm) [9] 3.2 x 2.5 x 0.75 mm 3.2 x 2.5 x 0.75 mm 7.0 x 5.0 x 0.90 mm [10] 7.0 x 5.0 x 0.90 mm [10] notes: 8. top marking: y denotes manufacturing origin and xxxx denotes manufacturing lot number. the value of 3 < |