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  general description the ma x16838 is a dual-channel led driver that inte - grates both the dc-dc switching boost regulator and two 150ma current sinks. a current-mode switching dc-dc controller provides the necessary voltage to both strings of hb leds. the max16838 accepts a wide 4.75v to 40v input voltage range and directly withstands automotive load-dump events. for a 5v q10% input volt- age, connect v in to v cc . the wide input range allows powering hb leds for small-to-medium-sized lcd dis - plays in automotive and display backlight applications. an internal current-mode switching dc-dc controller supports the boost or sepic topologies and operates in an adjustable frequency range between 200khz and 2mhz. the current-mode control provides fast response and simplifies loop compensation. the max16838 also features an adaptive output-voltage adjustment scheme that minimizes the power dissipation in the led current sink paths. the max16838 can be combined with the max15054 to achieve a buck-boost led driver with two integrated current sinks. the channel current is adjustable from 20ma to 150ma using an external resistor. the external resistor sets both channel currents to the same value. the device allows connecting both strings in parallel to achieve a maximum current of 300ma in a single channel. the max16838 also features pulsed dimming control with minimum pulse widths as low as 1 fs, on both channels through a logic input (dim). the max16838 includes an output overvoltage protec - tion, open led, shorted led detection and overtempera - ture protection. the device operates over the -40nc to +125nc automotive temperature range. the max16838 is available in the 20-pin tssop and 4mm x 4mm, 20-pin tqfn packages. applications automotive display backlights lcd display backlights automotive lighting applications features s integrated, 2-channel, 20ma to 150ma linear led current sinks s boost or sepic power topologies for maximum flexibility s adaptive voltage optimization to minimize power dissipation in linear current sinks s 4.75v to 40v or 5v 10% input operating voltage range s 5000:1 pwm dimming at 200hz s open-drain fault indicator output s led open/short detection and protection s output overvoltage and overtemperature protection s programmable led current foldback at lower input voltages s 200khz to 2mhz resistor programmable switching frequency with external synchronization s current-mode control switching stage with internal slope compensation s enable input s thermally enhanced, 20-pin tqfn (4mm x 4mm) and 20-pin tssop packages 19-4972; rev 3; 6/13 typical operating circuit and pin configurations appear at end of data sheet. ordering information + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. /v denotes an automotive qualified part. part temp range pin-package max16838atp+ -40nc to +125nc 20 tqfn-ep* max16838atp/v+ -40nc to +125nc 20 tqfn-ep* max16838aup+ -40nc to +125nc 20 tssop-ep* max16838aup/v+ -40nc to +125nc 20 tssop-ep* simplified schematic r iset r2 ov r1 ov c out led strings r rt r cs c in in drain ov ndrv gate out1 out2 iset cs rt ledgnd pgnd sgnd comp dim drv cfb en 4.75v to 40v ld v cc r comp c comp flt max16838 integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838 evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maximintegrated.com.
2 stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, out_, drain to sgnd ................................... -0.3v to +45v en to sgnd ............................................... -0.3v to (v in + 0.3v) pgnd to sgnd .................................................... -0.3v to +0.3v ledgnd to sgnd ............................................... -0.3v to +0.3v drv to pgnd .......... -0.3v to the lower of (v in + 0.3v) and +6v gate to pgnd ........................................................ -0.3v to +6v ndrv to pgnd ....................................... -0.3v to (v drv + 0.3v) v cc , flt, dim, cs, ov, cfb, to sgnd ................. -0.3v to +6v rt, comp, iset to sgnd ......................... -0.3v to (v cc + 0.3v) drain and cs continuous current .................................. q2.5a out_ continuous current ................................................ 175ma v drv short-circuit duration ..................................... continuous continuous power dissipation (t a = +70nc) 20-pin tqfn (derate 25.6mw/ n c above +70n c) ............ 2051mw 20-pin tssop (derate 26.5mw/ nc above +70nc) ...... 2122mw operating temperature range ........................ -40nc to +125nc junction temperature ..................................................... +150nc storage temperature range ............................ -65nc to +150nc soldering temperature (reflow) ...................................... +260nc electrical characteristics (v in = v en = 12v, r rt = 12.2ki, r iset = 15ki, c vcc = 1 ff, v cc = v drv = v cfb , drain, comp, out_, flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = t j = -40 nc to +125 nc, unless otherwise noted. typical values are at t a = 25nc.) (note 2) absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. package thermal characteristics (note 1) 20 tqfn juction-to-ambient thermal resistance ( b ja ) .......... +39n c/w junction-to-case thermal resistance ( b jc ) ............... +6n c/w 20 tssop junction-to-ambient thermal resistance ( b ja ) ..... +37.7n c/w junction-to-case thermal resistance ( b jc ) ............... +2n c/w parameter symbol conditions min typ max units input voltage range v in internal ldo on 4.75 40 v input voltage range v in v in = v cc 4.55 5.5 v quiescent supply current i q v dim = 5v 3.1 5 ma standby supply current i sh v en = sgnd (note 3) 15.5 40 fa undervoltage lockout uvlo in v in rising, v dim = 5v 4 4.3 4.55 v undervoltage lockout hysteresis 177 mv drv regulator output voltage v drv 5.75v < v in < 10v, 0.1ma < i load < 30ma 4.75 5 5.25 v 6.5v < v in < 40v, 0.1ma < i load < 3ma dropout voltage v do (v in - v drv ) v in = 4.75v, i out = 30ma 0.11 0.5 v short-circuit current limit drv shorted to gnd 97 ma v cc undervoltage lockout threshold uvlo vcc v cc rising 3.4 4.0 4.4 v v cc (uvlo) hysteresis 123 mv maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
3 electrical characteristics (continued) (v in = v en = 12v, r rt = 12.2ki, r iset = 15ki, c vcc = 1 ff, v cc = v drv = v cfb , drain, comp, out_, flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = t j = -40 nc to +125 nc, unless otherwise noted. typical values are at t a = 25nc.) (note 2) parameter symbol conditions min typ max units rt oscillator switching frequency range f sw 200 2000 khz duty cycle d max f sw = 200khz 87 90 95 % f sw = 2000khz 83 85 91 % oscillator frequency accuracy f sw = 200khz to 2mhz -7.5 +7.5 % synchronization logic-high v rt rising 1.8 3.6 v synchronization logic-low v rt falling 2.5 v logic-level before sync capacitor 3.1 3.8 v synchronization pulse width 50 ns sync frequency range f sync 1.1 x f sw 1.5 x f sw hz pwm comparator leading-edge blanking 66 ns propagation delay to ndrv including leading-edge blanking time 100 ns slope compensation slope compensation peak voltage per cycle voltage ramp added to cs 0.12 v cs limit comparator cs threshold voltage v cs_max v comp = 3v 285 300 315 mv cs limit comparator propagation delay to ndrv 10mv overdrive (including leading-edge blanking time) 100 ns cs input current i cs 0 p v cs p 0.35v -1.3 +0.5 fa error amplifier out_ regulation voltage v dim = 5v 0.9 1 1.1 v transconductance gm 340 600 880 fs no-load gain a (note 4) 50 db comp sink current i sink v dim = v out_ = 5v, v comp = 3v 400 800 fa comp source current i source v dim = 5v, v out_ = v comp = 0v 400 800 fa mosfet driver ndrv on-resistance i sink = 100ma, v in > 5.5v 1.5 4 i i source = 100ma, v in > 5.5v 1.5 4 i peak sink current v ndrv = 5v 0.8 a peak source current v ndrv = 0v 0.8 a power mosfet power switch on-resistance i switch = 0.5a, v gs = 5v 0.15 0.35 i switch leakage current v drain = 40v, v gate = 0v 0.003 1.2 fa switch gate charge v drain = 40v, v gs = 4.5v 3.1 nc maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
4 electrical characteristics (continued) (v in = v en = 12v, r rt = 12.2ki, r iset = 15ki, c vcc = 1 ff, v cc = v drv = v cfb , drain, comp, out_, flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = t j = -40 nc to +125 nc, unless otherwise noted. typical values are at t a = 25nc.) (note 2) parameter symbol conditions min typ max units led current sinks out_ current range i out_ v dim = 5v, v out_ = 1.0v 20 150 ma led strings current matching i out_ = 100ma, r iset = 15ki q2 % maximum peak-to-peak boost ripple 1% i out variation, i out = 100ma, r iset = 15ki 0.3 0.5 v output current accuracy i out_ = 100ma, r iset = 15ki t a = +25nc 97 100 103 ma t a = -40nc to +125nc 95 100 105 ma i out_ = 20ma, r iset = 75ki t a = -40nc to +125nc 18.7 20 21.3 ma out_ leakage current v dim = 0v, v out_ = 40v 1 300 na current foldback threshold voltage 1.23 v cfb input bias current 0 p v cfb p 1.3v -0.3 +0.3 fa enable comparator (en) enable threshold v enhi v en rising 1.1 1.24 1.34 v enable threshold hysteresis v en_hys 71 mv enable input current v en = 40v -500 +50 +700 na dim logic dim input logic-high v ih 2.1 v dim input logic-low v il 0.8 v hysteresis v dim_hys 110 mv dim input current i dim v dim = 5v or 0 -600 +100 na dim to led turn-on time v dim rising edge to 90% of set current 50 290 1000 ns dim to led turn-off time v dim falling edge to 10% of set current 10 121 700 ns i out_ rise time t r rise time measured from 10% to 90% 120 600 ns i out_ fall time t f fall time measured from 90% to 10% 50 500 ns led fault detection led shorted fault indicator threshold 3.1 5.5 v t a = +125nc 3.55 4.2 4.85 led string shorted shutoff threshold 6 9.5 v t a = +125nc 6.8 7.7 8.6 shorted led detection flag delay 6 fs maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
5 electrical characteristics (continued) (v in = v en = 12v, r rt = 12.2ki, r iset = 15ki, c vcc = 1 ff, v cc = v drv = v cfb , drain, comp, out_, flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = t j = -40 nc to +125 nc, unless otherwise noted. typical values are at t a = 25nc.) (note 2) note 2: all devices are 100% tested at t a = +125nc. limits over temperature are guaranteed by design, not production tested. note 3: the shutdown current does not include currents in the ov and cfb resistive dividers. note 4: gain = dv comp /dv cs , 0.05v < v cs < 0.15v. typical operating characteristics (v in = v en = 12v, r rt = 12.2k i, r iset = 15ki, c vcc = 1 ff, v cc = v drv = v cfb, v drain = v comp = v out_ , flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = +25nc, unless otherwise noted.) parameter symbol conditions min typ max units flt logic output-voltage low v ol v in = 4.75v and i sink = 5ma 0.4 v output leakage current v filt = 5.5v -300 +300 na overvoltage protection ov trip threshold v ov rising 1.19 1.23 1.265 v ov hysteresis 70 mv ov input bias current 0 p v ov p 1.3v -100 +100 na thermal shutdown thermal shutdown 165 o c thermal shutdown hysteresis 15 o c i in vs. supply voltage max16838 toc02 supply voltage (v) i iin (ma) 36 32 28 24 20 16 12 8 2.5 3.0 3.5 4.0 4.5 5.0 2.0 44 0 t a = +125c t a = +25c t a = -40c v in = 12v switching waveform at 200hz (50% duty cycle) max16838 toc01 10v/div v lx i led v out 100ma/div 20v/div 0v 0v 0a 1ms/div maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
6 typical operating characteristics (continued) (v in = v en = 12v, r rt = 12.2ki, r iset = 15k i, c vcc = 1ff, v cc = v drv = v cfb, v drain = v comp = v out_ , flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = +25nc, unless otherwise noted.) i in vs. frequency frequency (mhz) 2.0 1.8 1.4 1.6 0.6 0.8 1.0 1.2 0.4 1 2 3 4 5 6 7 8 9 10 0 0.2 2.2 max16838 toc03 i in (ma) v in = 12v switching frequency vs. temperature temperature (c) switching frequency (khz) 110 95 65 80 -10 5 20 35 50 -25 351 352 353 354 355 356 357 358 359 360 350 -40 125 max16838 toc04 v in = 12v v iset vs. temperature temperature (c) v iset (v) 1109580655035205-10-25 1.216 1.217 1.218 1.219 1.220 1.221 1.222 1.223 1.215 -40 125 max16838 toc05 v in = 12v v dim = 0v v iset vs. i led i led (ma) v iset (v) 140 120 100 80 60 40 1.229 1.229 1.230 1.230 1.230 1.229 20 160 max16838 toc06 v in = 12v v en_th vs. temperature temperature (c) v en_th (v) 110 95 80 65 50 35 20 5 -10 -25 1.15 1.20 1.25 1.30 1.10 -40 125 max16838 toc07 v en rising v en falling en leakage current vs. temperature temperature (c) en leakage current (na) 110 95 80 65 50 35 20 5 -10 -25 50 100 150 200 250 300 0 -40 125 max16838 toc08 v en = 40v v en = 12v maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
7 typical operating characteristics (continued) (v in = v en = 12v, r rt = 12.2ki, r iset = 15k i, c vcc = 1 ff, v cc = v drv = v cfb, v drain = v comp = v out_ , flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = +25nc, unless otherwise noted.) input voltage (v) drv voltage (v) 40 30 20 10 4.980 4.985 4.990 4.995 5.000 5.005 5.010 4.975 05 0 drv line regulation max16838 toc09 t a = +125c t a = -40c t a = +25c drv load regulation max16838 toc10 load (ma) v drv (v) 25 20 15 10 5 4.970 4.975 4.980 4.985 4.990 4.995 5.000 5.005 5.010 4.965 03 0 t a = -40c t a = +25c t a = +125c v in = 12v frequency vs. r rt r rt (ki) frequency(mhz) 36 32 28 24 20 16 12 8 4 0.5 1.0 1.5 2.0 2.5 0 04 0 max16838 toc11 v in = 12v lodim mode response max16838 toc12 10v/div v in v dim v led_ i out_ 5v/div 100ma/div 0v 20v/div 0v 0v 0a 20ms/div dim on-time < 5 x f sw led switching with dim at 200hz (50% duty cycle) max16838 toc13 10ma/div i out1 i out2 v dim 100ma/div 0v 5v/div 0a 0a 2ms/div i led vs. r iset r iset (ki) i led (ma) 25 30 35 40 45 50 55 60 65 70 75 15 20 110 100 90 80 70 50 40 30 20 10 60 120 130 140 150 0 10 max16838 toc14 v in = 12v maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
8 typical operating characteristics (continued) (v in = v en = 12v, r rt = 12.2ki, r iset = 15k i, c vcc = 1 ff, v cc = v drv = v cfb, v drain = v comp = v out_ , flt = unconnected, v ov = v cs = v ledgnd = v dim = v pgnd = v sgnd = 0v, v gate = v ndrv , t a = +25nc, unless otherwise noted.) comp leakage current vs. temperature temperature (c) comp leakage current (na) 2.2 2.0 1.8 1.6 1.4 1.0 0.8 0.6 0.4 0.2 1.2 2.4 2.6 2.8 3.0 0 -40 -25 -10 52 03 55 06 5809 5 110 125 max16838 toc15 v in = 12v v en = high v comp = 2v v dim = low out_ leakage current vs. temperature temperature (c) out_ leakage current (na) 110 95 65 80 -10 5 20 35 50 -25 5 10 15 20 25 30 35 40 45 50 55 60 0 -40 125 max16838 toc16 v in = 12v v en = high v out = 40v v out = 12v power mosfet r dson vs. temperature power mosfet r dson (i) 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 max16838 toc18 1109565 80 -10 52 0355 0 -25-40 125 temperature (c) v in = 12v ov leakage current vs. temperature ov leakage current (na) -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 -2.0 v in = 12v v en = high max16838 toc17 1109565 80 -10 52 0355 0 -25-40 125 temperature (c) maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
9 pin description pin name function tqfn tssop 1 4 ndrv gate drive for switching mosfet. connect ndrv to gate directly or through a resistor to control the rise and fall times of the gate drive. 2 5 drv 5v regulator output. mosfet gate-driver supply input. bypass drv to pgnd with a minimum of 1ff ceramic capacitor. place the capacitor as close as possible to drv and pgnd. 3 6 v cc internal circuitry supply voltage. bypass v cc to sgnd with a minimum of 0.1 ff ceramic capacitor. place the capacitor as close as possible to v cc and sgnd. 4 7 in supply input. connect a 4.75v to 40v supply to in. bypass in to pgnd with a minimum of 1ff ceramic capacitor. for a 5v q10% supply voltage, connect v in to v cc . 5 8 en enable/undervoltage lockout (uvlo) threshold input. en is a dual-function input. connect en to v in through a resistor-divider to program the uvlo threshold. 6 9 sgnd signal ground. sgnd is the current return path connection for the low-noise analog signals. connect sgnd, ledgnd, and pgnd at a single point. 7 10 cfb current foldback reference input. connect a resistor-divider between in, cfb, and ground to set the current foldback threshold. when the voltage at cfb goes below 1.23v, the led current starts reducing linearly. connect to v cc to disable the current foldback feature. 8 11 ov overvoltage threshold adjust input. connect a resistor-divider from the switching converter output to ov and sgnd. the ov comparator reference is internally set to 1.23v. 9 12 iset led current adjust input. connect a resistor r iset from iset to sgnd to set the current through each led string (i led ) according to the formula i led = 1512v/r iset . 10 13 flt open-drain, active-low flag output. flt asserts when there is an open/short-led condition at the output or when there is a thermal shutdown event. 11 14 out2 led string cathode connection 2. out2 is the open-drain output of the linear current sink that controls the current through the led string connected to out2. out2 sinks up to 150ma. 12 15 ledgnd led ground. ledgnd is the return path connection for the linear current sinks. connect sgnd, ledgnd, and pgnd at a single point. 13 16 out1 led string cathode connection 1. out1 is the open-drain output of the linear current sink that controls the current through the led string connected to out1. out1 sinks up to 150ma. 14 17 rt oscillator timing resistor connection. connect a timing resistor (r rt ) from rt to sgnd to program the switching frequency. apply an ac-coupled external clock at rt to synchronize the switching frequency with an external clock source. 15 18 comp switching converter compensation input. connect an rc network from comp to sgnd (see the feedback compensation section). maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
10 pin description (continued) pin name function tqfn tssop 16 19 dim digital pwm dimming input 17 20 cs current-sense input. cs is the current-sense input for the switching regulator and is also connected to the source of the internal power mosfet. connect a sense resistor from cs to pgnd to set the switching current limit. 18 1 drain internal switching mosfet drain output 19 2 gate internal switching mosfet gate input. connect gate to ndrv directly or through a resistor to control the rise and fall times of the gate drive. 20 3 pgnd power ground. pgnd is the high-switching current return path connection. connect sgnd, ledgnd, and pgnd at a single point. ep exposed pad. ep is internally connected to sgnd. connect ep to a large-area contiguous ground plane for effective power dissipation. connect ep to sgnd. do not use as the only ground connection. maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
11 simplified functional diagram pwm logic driver drv drain gate cs ndrv out_ dim pgnd comp rt cs in drv v cc en sgnd ledgnd ov cfb iset pok shdn dim flag logic logic array = 2 pwm comp gm 1.8v 1.0v 0.3v 1.17v vbg ov dim duty too low soft- start dac i lim short-led detector open-led detector minimum string voltage flt rt oscillator cs blanking slope compensation thermal shutdown bandgap 5v ldo uvlo uvlo in shdn pok vbg v cc vbg 0 1 10 ov comparator 1 0 120mv max16838 maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
12 detailed description the max16838 high-efficiency, hb led driver inte - grates all the necessary features to implement a high- performance backlight driver to power leds in small-to- medium-sized displays for automotive as well as general applications. the device provides load-dump voltage protection up to 40v in automotive applications. the max16838 incorporates a dc-dc controller with peak current-mode control to implement a boost, coupled inductor boost-buck, or sepic-type switched-mode power supply and a 2-channel led driver with 20ma to 150ma constant-current-sink capability per channel. the max16838 can be combined with the max15054 to achieve boost-buck topology without a coupled inductor (see figure 5). the max16838 features a constant-frequency peak current-mode control with internal slope compensation to control the duty cycle of the pwm controller. the dc-dc converter generates the required supply volt- age for the led strings from a wide input supply range. connect led strings from the dc-dc converter output to the 2-channel constant current sinks that control the current through the led strings. a single resistor connected from iset to ground sets the forward current through both led strings. the max16838 features adaptive led voltage control that adjusts the converter output voltage depending on the forward voltage of the led strings. this feature minimizes the voltage drops across the constant-current sinks and reduces power dissipation in the device. the max16838 provides a very wide pwm dimming range where a dimming pulse as narrow as 1 fs is possible at a 200hz dimming frequency. a logic input (en) shuts down the device when pulled low. the device includes an internal 5v ldo to power up the internal circuitry and drive the internal switching mosfet. the max16838 includes output overvoltage protec - tion that limits the converter output voltage to the pro - grammed ov threshold in the event of an open-led condition. the device also features an overtemperature protection that shuts down the controller if the die tem - perature exceeds +165c. in addition, the max16838 has a shorted led string detection and an open-drain flt signal to indicate open led, shorted led, and over- temperature conditions. current-mode dc-dc controller the max16838 uses current-mode control to provide the required supply voltage for the led strings. the internal mosfet is turned on at the beginning of every switching cycle. the inductor current ramps up linearly until it is turned off at the peak current level set by the feedback loop. the peak inductor current is sensedfrom the voltage across the current-sense resistor (r cs ) connected from the source of the internal mosfet to pgnd. a pwm comparator compares the current-sense voltage plus the internal slope compensation signal with the output of the transconductance error amplifier. the controller turns off the internal mosfet when the voltage at cs exceeds the error amplifiers output voltage. this process repeats every switching cycle to achieve peak current-mode control. error amplifier the internal error amplifier compares an internal feed - back (fb) signal with an internal reference voltage (v ref ) and regulates its output to adjust the inductor current. an internal minimum string detector measures the minimum led string cathode voltage with respect to sgnd. during normal operation, this minimum v out_ voltage is regulated to 1v through feedback. the result - ing dc-dc converter output voltage is 1v above the maximum required total led voltage. the converter stops switching when led strings are turned off during pwm dimming. the error amplifier is disconnected from the comp output to retain the com - pensation capacitor charge. this allows the converter to settle to a steady-state level immediately when the led strings are turned on again. this unique feature provides fast dimming response without having to use large out- put capacitors. if the pwm dimming on-pulse is less than five switching cycles, the feedback controls the voltage on ov such that the converter output voltage is regu - lated at 95% of the ov threshold. this mode ensures that narrow pwm dimming pulses are not affected by the response time of the converter. during this mode, the error amplifier remains continuously connected to the comp output. adaptive led voltage control the max16838 reduces power dissipation using an adaptive led voltage control scheme. the adaptive led voltage control regulates the dc-dc converter output based on the operating voltage of the led strings. maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
13 the voltage at each of the current-sink outputs (out_) is the difference between the dc-dc regulator output voltage (v led ) and the total forward voltage of the led string connected to the output (out_). the dc-dc con - verter then adjusts v led until the output channel with the lowest voltage at out_ is 1v relative to ledgnd. as a result, the device minimizes power dissipation in the current sinks and still maintains led current regulation. for efficient adaptive control functionality, use an equal number of hb leds of the same forward voltage rating in each string. current limit the max16838 includes a fast current-limit comparator to terminate the on-cycle during an overload or a fault condition. the current-sense resistor (r cs ) connected between the source of the internal mosfet and ground sets the current limit. the cs input has a 0.3v voltage trip level (v cs ). use the following equation to calculate r cs : r cs = (v cs )/i peak where i peak is the peak current that flows through the mosfet. undervoltage lockout the max16838 features two undervoltage lockouts: uvlo in and uvlo vcc . the undervoltage lockout threshold for v in is 4.3v (typ) and the undervoltage lockout threshold for v cc is 4v (typ). soft-start the max16838 features a soft-start that activates during power-up. the soft-start ramps up the output of the con - verter in 64 steps in a period of 100ms (typ), unless both strings reach regulation point, in which case the soft-start would terminate to resume normal operation immediately. once the soft-start is over, the internal soft-start circuitry is disabled and the normal operation begins. oscillator frequency/external synchronization the max16838 oscillator frequency is programmable between 200khz and 2mhz using one external resis- tor (r rt ) connected between rt and sgnd. the pwm mosfet driver output switching frequency is the same as the oscillator frequency. the oscillator frequency is determined using the following formula: f sw = (7.342x10 9 /r rt )(hz) where r rt is in . synchronize the oscillator with an external clock by ac-coupling the external clock to the r rt input. the capacitor used for the ac-coupling should satisfy the following relation: 3 sync t 9.862 c 0.144 10 ( f) r ? ?? ?? ? ?? ?? where r rt is in i. the pulse width for the synchronization signal should satisfy the following relations: pw s clk pw ss clk t v 0.8 t t 0.8 v v 3.4 t < ?? ? +> ?? ?? where t pw is the synchronization source pulse width, t clk is the synchronization clock time period, and v s is the synchronization pulse voltage level. see figure 1. 5v ldo regulator (drv) the internal ldo regulator converts the input voltage at in to a 5v output voltage at drv. the ldo regulator output supports up to 30ma current, enough to provide power to the internal control circuitry and the gate driver. figure 1. synchronizing external clock signal v s t pw t clk maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
14 connect a 4.7 i resistor from v cc to drv to power the rest of the chip from the v cc pin with the 5v internal regulator. bypass drv to pgnd with a minimum of 1 f f ceramic capacitor as close as possible to the device. for input voltage range of 4.5v to 5.5v, connect in to v cc . led current control (iset) the max16838 features two identical constant-current sources used to drive multiple hb led strings. the current through each of the channels is adjustable between 20ma and 150ma using an external resistor (r iset ) connected between iset and sgnd. select r iset using the following formula: = ? iset out _ 1512 r () i where i out_ is the desired output current for both channels in amps. for single-channel operation, connect channel 1 and channel 2 together. see figure 2. led dimming control the max16838 features led brightness control using an external pwm signal applied at dim. the device accepts a minimum pulse width of 1 fs. therefore, a 5000:1 dim - ming ratio is achieved when using a pwm frequency of 200hz. drive dim high to enable both led current sinks and drive dim low to disable both led current sinks. the duty cycle of the pwm signal applied to dim also controls the dc-dc converters output voltage. if the turn-on duration of the pwm signal is less than five oscillator clock cycles, then the boost converter regu- lates its output based on feedback from the ov input. during this mode, the converter output voltage is regu - lated to 95% of the ov threshold voltage. if the turn-on duration of the pwm signal is greater than or equal to six oscillator clock cycles, then the converter regulates its output such that the minimum voltage at out_ is 1v. fault protections the max16838 fault protections include cycle-by-cycle current limiting, dc-dc converter output overvoltage protection, open-led detection, short-led detection, and overtemperature detection. an open-drain led fault flag output ( flt) goes low when an open-led/short-led or overtemperature condition is detected. open-led management and overvoltage protection the max16838 monitors the drains of the current sinks (out_) to detect any open string. if the voltage at any output falls below 300mv and the ov threshold is triggered (i.e., even with out_ at the ov voltage the string is not able to regulate above 300mv), then the max16838 interprets that string to be open, asserts flt, and disconnects that string from the operation loop. the max16838 features an adjustable overvoltage threshold input (ov). connect a resistor-divider from the switching converter output to ov and sgnd to set the overvoltage threshold level. use the following formula to program the overvoltage threshold: ov ov ov r2 v 1.23v 1 r1 ?? = + ?? ?? open-led detection is disabled when pwm pulse width is less than five switching clock cycles. short-led detection the max16838 features a two-level short-led detection circuitry. if a level 1 short is detected on any one of the strings, flt is asserted. a level 1 short is detected if the difference between the total forward led voltages of the two strings exceeds 4.2v (typ). if a level 2 short is detected on any one of the strings, the particular led string with the short is turned off after 6 fs and flt is asserted. a level 2 short is detected if the difference between the total forward led voltages of the two strings exceeds 7.8v (typ). the strings are reevaluated on each dim rising edge and flt is deasserted if the short is removed. short-led detection is disabled when pwm pulse width is less than five switching clock cycles. figure 2. configuration for higher led string current out1 out2 max16838 40ma to 300ma boost converter output maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
15 enable (en) en is a logic input that completely shuts down the device when connected to logic-low, reducing the current consumption of the device to less than 15 fa (typ). the logic threshold at en is 1.24v (typ). the volt - age at en must exceed 1.24v before any operation can commence. there is a 71mv hysteresis on en. the en input also allows programming the supply input uvlo threshold using an external voltage-divider to sense the input voltage, as shown in figure 3. use the following equation to calculate the value of r1 en and r2 en in figure 3: ?? = ? ?? ?? on en en uvloin v r1 1 r2 v where v uvloin is the en rising threshold (1.24v) and v on is the desired input startup voltage. choose an r2 en between 10k i and 50k i . connect en to in if not used. current foldback the max16838 includes a current-foldback feature to limit the input current at low v in . connect a resistor- divider between in, cfb, and sgnd to set the current- foldback threshold. when the voltage at cfb goes below 1.23v, then the led current starts reducing proportion - ally to v cfb . this feature can also be used for analog dimming of the leds. connect cfb to v cc to disable this feature. applications information boost-circuit design first, determine the required input supply voltage range, the maximum voltage needed to drive the led strings including the minimum 1v across the constant led current sink (v led ), and the total output current needed to drive the led strings (i led ). calculate the maximum duty cycle (d max ) using the following equation: d max = (v led + v d C v in_min )/(v led + v d ) where v d is the forward drop of the rectifier diode, v in_min is the minimum input supply voltage, and v led is the output voltage. select the switching frequency (f sw ) depending on the space, noise, dynam - ic response, and efficiency constraints. inductor selection in boost configuration select the maximum peak-to-peak ripple on the inductor current (il p-p ). use the following equations to calculate the maximum average inductor current (il avg ) and peak inductor current (il peak ): il avg = i led /(1 - d max ) assuming il p-p is 40% of the average inductor current: il p-p = il avg x 0.4 il peak = il avg + il p-p /2 calculate the minimum inductance value l min with the inductor current ripple set to the maximum value: l min = v in_min x d max /(f sw x il p-p ) choose an inductor that has a minimum inductance greater than the calculated l min and current rating greater than il peak . the recommended saturation current limit of the selected inductor is 10% higher than the inductor peak current. the il p-p can be chosen to have a higher ripple than 40%. adjust the minimum value of the inductance according to the chosen ripple. one fact that must be noted is that the slope compensa - tion is fixed and has a 120mv peak per switching cycle. the dv/dt of the slope compensation ramp is 120f sw v/ f s, where f sw is in khz. after selecting the inductance it is necessary to verify that the slope compensation is adequate to prevent subharmonic oscillations. in the case of the boost, the following criteria must be satisfied: 120f sw > r cs (v led - 2v in_min )/2l where l is the inductance value in f h, r cs is the current-sense resistor value in , v in_min is the mini- mum input voltage in v, v led is the output voltage, and f sw is the switching frequency in khz. if the inductance value is chosen to keep the inductor in discontinuous conduction mode, the equation above does not need to be satisfied. figure 3. setting the max16838 undervoltage lockout threshold max16838 1.24v en r1 en r2 en v in maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
16 output capacitor selection in boost configuration for the boost converter, the output capacitor supplies the load current when the main switch is on. the required output capacitance is high, especially at higher duty cycles. calculate the output capacitor (c out ) using the follow- ing equation: c out > (d max x i led )/(v led_p-p x f sw ) where v led_p-p is the peak-to-peak ripple in the led supply voltage. use a combination of low-esr and high- capacitance ceramic capacitors for lower output ripple and noise. input capacitor selection in boost configuration the input current for the boost converter is continuous and the rms ripple current at the input capacitor is low. calculate the minimum input capacitor c in using the fol- lowing equation: c in = il p-p /(8 x f sw x v in_p-p ) where v in_p-p is the peak-to-peak input ripple voltage. this equation assumes that input capacitors supply most of the input ripple current. rectifier diode selection using a schottky rectifier diode produces less forward drop and puts the least burden on the mosfet during reverse recovery. a diode with considerable reverse-recovery time increases the mosfet switching loss. select a schottky diode with a voltage rating 20% higher than the maximum boost-converter output voltage and current rating greater than that calculated in the following equation: ( ) ( ) - = d avg max i il 1 d a feedback compensation the voltage feedback loop needs proper compensa - tion for stable operation. this is done by connecting a resistor (r comp ) and capacitor (c comp ) in series from comp to sgnd. r comp is chosen to set the high- frequency integrator gain for fast transient response, while c comp is chosen to set the integrator zero to main - tain loop stability. for optimum performance, choose the components using the following equations: = ? zrhp cs led comp comp led max f ri r 5 fp1 gm v (1 d ) where ? = 2 led max zrhp led v (1 d ) f 2 li is the right-half plane zero for the boost regulator. r cs is the current-sense resistor in series with the source of the internal switching mosfet. i led is the total led current that is the sum of the led currents in both the channels. v led is the output voltage of the boost regulator. d max is the maximum duty cycle that occurs at minimum input voltage. gm comp is the transconduc- tance of the error amplifier. = led led out i fp1 2v c is the output pole formed by the boost regulator. set the zero formed by r comp and c comp a decade below the crossover frequency. using the value of r comp from above, the crossover frequency is at f zrhp /5. = comp comp zrhp 50 c 2r f maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
17 sepic operation figure 4 shows a sepic application circuit using the max16838. the sepic topology is necessary to keep the output voltage of the dc-dc converter regulated when the input voltage can rise above and drop below the output voltage. boost-buck configuration figure 5 shows a boost-buck configuration with the max16838 and max15054. pcb layout considerations led driver circuits based on the max16838 device use a high-frequency switching converter to generate the voltage for led strings. take proper care while laying out the circuit to ensure proper operation. the switching- converter part of the circuit has nodes with very fast volt - age changes that could lead to undesirable effects on the sensitive parts of the circuit. follow these guidelines to reduce noise as much as possible: 1) connect the bypass capacitor on v cc and drv as close as possible to the device, and connect the capacitor ground to the analog ground plane using vias close to the capacitor terminal. connect sgnd of the device to the analog ground plane using a via close to sgnd. lay the analog ground plane on the inner layer, preferably next to the top layer. use the analog ground plane to cover the entire area under critical signal components for the power converter. 2) have a power ground plane for the switching- converter power circuit under the power compo- nents (input filter capacitor, output filter capacitor, inductor, mosfet, rectifier diode, and current- sense resistor). connect pgnd to the power ground plane as close to pgnd as possible. connect all other ground connections to the power ground plane using vias close to the terminals. figure 4. sepic configuration r iset r2 ov r1 ov c out led strings r rt r cs r2 en r1 en c vcc c drv r drv in drain ov ndrv gate out1 out2 iset cs rt ledgnd pgnd sgnd comp dim drv cfb en c in c s 4.75v to 40v l 1 l 2 d v cc r comp c comp flt max16838 maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
18 3) there are two loops in the power circuit that carry high-frequency switching currents. one loop is when the mosfet is onfrom the input filter capacitor positive terminal, through the inductor, the internal mosfet, and the current-sense resistor, to the input capacitor negative terminal. the other loop is when the mosfet is offfrom the input capacitor positive terminal, through the inductor, the rectifier diode, output filter capacitor, to the input capaci- tor negative terminal. analyze these two loops and make the loop areas as small as possible. wherever possible, have a return path on the power ground plane for the switching currents on the top layer copper traces, or through power components. this reduces the loop area considerably and provides a low-inductance path for the switching currents. reducing the loop area also reduces radiation dur - ing switching. 4) connect the power ground plane for the constant- current led driver part of the circuit to ledgnd as close as possible to the device. connect sgnd to pgnd at the same point. figure 5. boost-buck configuration q1 c 1 v dd bst d 1 c bst lx hi hdrv gnd max15054 r iset r1 ov r2 ov c out led strings r rt r cs r1 en v in r2 en c vcc d 2 c drv r drv in gate ndrv drain ov out1 out2 iset cs rt ledgnd pgnd sgnd comp dim drv cfb en ld 3 v cc c in r comp c comp flt max16838 maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
19 typical operating circuit pin configurations max16838 top view 4 5 + 3 2 12 11 13 cfb iset 14 sgnd gate cs dim pgnd 67 v cc 91 0 *ep *exposed pad 20 19 17 16 in en rt out1 ledgnd out2 ov drain 8 18 drv 1 15 comp ndrv 20 19 18 17 16 15 14 1 2 3 4 5 6 7 cs dim comp rt ndrv pgnd gate drain max16838 out1 ledgnd out2 in v cc 13 8 flt en 12 9 iset sgnd 11 10 ov cfb drv tssop tqfn flt + *ep r iset r2 ov r1 ov c out led strings r rt r cs r2 en r1 en c vcc c in c drv r drv in drain ov ndrv gate out1 out2 iset cs rt ledgnd pgnd sgnd comp dim drv cfb en 4.75v to 40v ld v cc r comp c comp flt max16838 maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
20 chip information process: bicmos dmos package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 20 tqfn-ep t2044+3 21-0139 90-0037 20 tssop-ep u20e+1 21-0108 90-0114 maxim integrated integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 21 ? 2013 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 9/02 initial release 1 12/09 added /v part number, updated soldering temperature 1, 2 2 4/11 corrected formulas for csync and ovp 2, 13, 14 3 6/13 updated open-led management and overvoltage protection and short-led detection sections and corrected equation in rectifier diode selection section 14, 16 integrated, 2-channel, high-brightness led driver with high-voltage boost and sepic controller max16838


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