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||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| precision a djustable c urrent - l imited power s witch 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 1 pi5pd25 56 /25 57 features ? meets usb current - limiting requirement ? 6. 5 % current - limit accuracy at 4 . 0 a ? adjustable current limit, 500 ma - 5 a (typ . ) ? fast over - current response - 3. 5 s (typ . ) ? 22 m? high - side mosfet ? operating range: 2.5 v t o 5.5 v ? 2 - a maximum standby supply curren t ? built - in soft - start ? 15 kv / 8 kv system - level esd capable ? device package: t dfn 3 x3 - 8 l ? ul listed C file no. e341484 ? cb certified applications ? usb ports/hubs ? digital tv ? set - top boxes ? voip phones pin configuration tdfn 2x3 - 8l (top view) description the pi5pd2556/2557 series is single - channel power - distribution switch intended for applications where precision current limiting is required or heavy capacitive loads and short circuits are encountered. these dev ices offer a programmable current - limit threshold between 500 ma and 5 a (typ) per channel via an external resistor. the power - switch rise and fall times are controlled to minimize current surges during turn on/off. each channel of the pi5pd2556/2557 device s limits the output current to a safe level by switching into a constant - current mode when the output load exceeds the current - limit threshold. typical application circuit figure 1 typical application circuit pin description pin no. pin name type description pi5pd25 56 pi5pd25 57 1 gnd - ground. 2 , 3 in i power input voltage. 4 / en en i enable input, logic low turns on power switch for pi5pd2556, logic high turns on power switch for PI5PD2557 . 5 ilim i external resistor used to set curre nt - limit threshold; recommended 20 k? rilim 187 k?. 6 , 7 out o power switch output for channel two 8 /fault o active - low open - drain output, asserted during over - current or over - temperature condition or reverse voltage occurs in 2 gnd 1 3 4 5 6 7 8 in / en (en) out fault out ilim tdfn 3x3 - 8l (to p v i ew) v in in o ut g nd /fau lt il im cin 0. 1uf cout vout in r1 10 0k con trol in put /fault1 sign al p ow er pa d o ut radj en vout
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 2 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch maximum ratings storage tem perature ................................ ................................ ................... - 6 5 o c to +1 50 o c supply voltage to ground potential ................................ ............................ - 0. 5 v to + 6.0 v dc input voltage ................................ ................................ ...................... - 0 . 5 v to v dd + 0.5 v voltage range from in to out ................................ ................................ ...... - 0.5 v to +6.0 v control input voltage ( vin ) ................................ ................................ ........... - 0.5 v to +6.0 v continuous total power dissipation (1) ................................ ................................ ....... 2400 mw continuous faul t sink current ................................ ................................ .................. 25ma power dissipation ................................ ................................ ................................ .............. 0.5w esd: hbm mode ................................ ................................ ................................ ........... 4 000v cdm mode ................................ ................................ ................................ .............. 500v esd - system level (contact/air) ................................ ................................ ............... 8kv/15kv recommended operation conditions symbol parameter conditions min typ max unit v in input voltage - 2.5 - 5.5 v v en input vo ltage pi5pd25 56 - 0 - 5.5 v v / en pi5pd25 57 0 - 5.5 v ih high - level input voltage on en - 1.1 - - v v i l low - level input voltage on en - - - 0.66 v i out continuous output current per channel, out - 0 - 5 a i fa u l t continuous / fault sink current - - - 1 0 ma r ilim recommended resistor limit range - 20 - 187 k ? t a operating t emperature r ange - - 40 - 85 oc note: 1. stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. the jedec high - k (2s2p) board used to derive this data was a 3in 3in, multilayer board with 1 - ounce internal power and ground planes and 2 - ounce copper traces on top and bottom of the board.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 3 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch dc electrical characteristics v i(in) = 5.0 v; t a = - 40 c to +85 c ; unless otherwise specified. sym description test c onditions (1) min typ max unit power switch r ds(on) static drain - source on - state resis tance - - 22 35 m ? t r rise time, output v i(in) = 5. 0 v c l = 1 ? l = 100? 1 2 4 m s v i(in) = 2. 5 v 0.5 1 3 t f fall time, output v i(in) = 5. 0 v 0.3 0.5 1.0 v i(in) = 2. 5 v 0. 2 0.4 0. 6 enable en v ih high - level input voltage 2. 5 v v i(in) 5.5 v 1.1 - - v v il low - level input voltage 2. 5 v v i(in) 5.5 v - - 0. 6 t on turn on time c l = 1 ? l = 100? - - 5 ms t off turn off time - - 2 current limit i os current - limit threshold @ v out = v in * 0.8 r ilim = 27.4 k ? ilim =61.9k ? ilim =100k ? i oc_trip overcurrent trip threshold v in = 5 v, current ramp ( 100 a/s) on out r ilim = 27.4 k ? v in = 5 v, current ramp ( 100 a/s) on out r ilim = 100 k ? 950 1250 1500 t ios response time to short circuit v in = 5. 0 v - 3.5 - ? supply current i stb input s upply current at output disable no load on out, v en =disable t a =25c - 0.1 2 ? ss input s upply current at output enable no load on out, v en =5. 0 v , t a =25c r ilim =2 4.9 k ? ilim = 100k ? rev reverse leakage current v outx =5.5v, v in =0v a =25 c - 0.01 1.0 under voltage lockout uvlo low - level input voltage v in r ising - 2.35 2.45 v hysteresis for l ow - level input voltage t a =25 c - 35 - mv /fault flag v ol output low vol tage i /fault =1ma - - 180 mv i off o ff - state leakage v /fault = 5.5 v - - 1 ? d / fault deglitch fault assertion or de - assertion due to over - current condition 4 9 15 m s thermal shutdown otsd2 thermal shutdown threshold - - 15 5 - c otsd thermal shutdown threshold in current - limit - - 1 3 5 - hysteresis - - 2 0 - note: pulse - testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 4 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch p arameter measurement information figur e 2 test circuit and voltage waveforms figure 3 typical characteristics reference schematic c out =150uf r lim =24.9kohm v in in o ut g nd /fau lt il im cin 0. 1uf cout vout in r1 10 0k con trol in put /fault1 sign al p ow er pa d o ut radj en vout
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 5 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch typical characteristic t - time - 2 m s /div t - time - 2 m s /div figure 3 turn - on delay and rise time figure 4 turn - off delay and fall time t - time - 2 m s /div t - time - 4 m s /div figure 5 device enabled into short - circuit figure 6 full - load to short - circuit transient respons e t - time - 10 ms/div figure 7 short - circuit to full - load recovery response v out 2v/div v en 5v/div i i n 2a /div v out 2v/div v en 5v/div i i n 2a /div v en 5 v/div v fault 5v/div i i n 2a v/div v out 2 v/div v fault 5v/div i i n 5 a /div v out 5 v/div v fault 5v/div i i n 5 a /div
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||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 7 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch figure 14 switch current vs. drain - source voltage across functional block diagram figure 1 5 functional block diagram fun ctional description o verview the pi5pd2556/2557 is a single - channel, current - limited power - distribution switch using n - channel mosfets for applications where short circuits or heavy capacitive loads will be encountered. this device allows the user to pro gram the current - limit threshold between 500 ma and 5.0 a (typ) via an external resistor. this device incorporates an internal charge pump and gate drive circuitry necessary to drive the n - channel mosfets. the charge pump supplies power to the driver circu it for each channel and provides the necessary voltage to pull the gate of the mosfet above the source. the charge pump operates from input voltages as low as 2.5 v and requires little supply current. the driver controls the gate voltage of the power switc h. the driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges and provides built - in soft - start functionality. t he pi5pd2556/2557 limits the output current to the programmed curren t - limit threshold ios during an over - current or short - circuit event by reducing the charge pump voltage driving the n - channel mosfet and operating it in the linear range of operation. the result of limiting the output current to ios reduces the output volt age at out because the n - channel mosfet is no longer fully enhanced. - 40 c 25 c 1 25 c r lim = 61.9 kohm ids - static drain - source current - a v in - v out mv/div
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 8 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch o ver - c urrent conditions when an over - current condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. the pi5pd2556/2557 therm al cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. the device turns off when the junction temperature exceeds 135c (min) while in current limit. the device remains off until the junction tempe rature cools 20c (typ) and then restarts. the pi5pd2556/2557 cycles on/off until the overload is removed . / fault response the fault open - drain outputs are asserted (active low) during an over - current or over - temperature condition. the pi5pd2556/2557 ass erts the faultx signal until the fault condition is removed and the device resumes normal operation. the pi5pd2556/2557 is designed to eliminate false fault reporting by using an internal delay "deglitch" circuit (9 - ms typ) for over - current conditions with out the need for external circuitry. this ensures that fault is not accidentally asserted due to normal operation such as starting into a heavy capacitive load. the deglitch circuitry delays entering and leaving current - limited induced fault conditions. th e fault signal is not deglitched when the mosfet is disabled due to an over - temperature condition but is deglitched after the device has cooled and begins to turn on. this unidrectional deglitch prevents fault oscillation during a n over - temperature event. under - v oltage lockout (uvlo) the under - voltage lockout (uvlo) circuit disables the power switch until the input voltage reaches the uvlo turn - on threshold. built - in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on. e nable (en or / en ) the logic enables control the power switches and device supply current. the supply current is reduced to less than 2 - a when a logic high is present on / en or when a logic low is present on en. a logic low input on / en or a logic high inp ut on en enables the driver, control circuits, and power switches. the enable inputs are compatible with both ttl and cmos logic levels. t hermal sense the pi5pd2556/2557 self protects by using two independent thermal sensing circuits that monitor the ope rating temperature of the power switch and disable operation if the temperature exceeds recommended operating conditions. t he pi5pd2556/2557 operates in constant - current mode during an over - current condition , which increases the voltage drop across the pow er switch. the power dissipation in the package is proportional to the voltage drop across the power switch, which increases the junction temperature during an over - current condition. the first thermal sensor (ot sd) turns off the power switch when the die temperature exceeds 135c (min) and the chip is in current limit. hysteresis is built into the thermal sensor, and the switch turns on after the device has cooled approximately 20c. the pi5pd2556/2557 also has a second ambient thermal sensor (otsd2). the ambient thermal sensor turns off power switch when the die temperature exceeds 155c (min) regardless of whether the power switch are in current limit and will turn on the power switches after the device has cooled approximately 20c. the pi5pd2556/2557 continues to cycle off and on until the fault is removed.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 9 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch application information input and output capacitance input and output capacitance improves the performance of the device; the actual capacitance should be optimized for the particul ar application. for all applications, a 0.1 u f or greater ceramic bypass capacitor between in and gnd is recommended as close to the device as possible for local noise decoupling. this precaution reduces ringing on the input due to power - supply transients. additional input capacitance may be needed on the input to reduce voltage overshoot from exceeding the absolute - maximum voltage of the device during heavy transient co nditions or output shorting . this is especially important during bench testing when long inductive cables are used to connect the evaluation board to the bench power supply. normally suggested the distance between ic and dc supply source is less than 15cm. output capacitance also need to be close to ic as possible. w hen large transient curren ts are expected on the output , placing a high - value electrolytic capacitor on the output pin is recommended. programming the current - limit threshold the overcurrent threshold is user programmable via an external resistor. the pi5pd 2556/57 uses an intern al regulation loop to provide a regulated voltage on the ilim pin. the current - limit threshold is proportional to the current sourced out of ilim. the recommended 1% resistor range for rilim is 20 k rilim 187 k to ensure stability of the internal reg ulation loop. many applications require that the minimum current limit is above a certain current level or that the maximum current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when selec ting a value for rilim. the following equations approximate the resulting overcurrent threshold for a given external resistor value ?ilim). consult the electrical characteristics table for specific current limit settings. the traces routing the rilim resis tor to the pi5pd 2556/57 should be as short as possible to reduce parasitic effects on the current - limit accuracy. figure 1 6 current limit threshold & rilim application 1: designing above a minimum current limit some applications require that current limiting cannot occur below a certain threshold. for this example, assume that 3 a must be delivered to the load so that the minimum desired current - limit threshold is 3000 ma. use the ios equations and figure 7 to s elect r ilim .
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||| 201 5 - 0 8 - 00 1 1 pt0 4 97 - 4 0 8 / 3 1 /1 5 10 pi5pd25 56 /25 57 precision a djustable c urrent - l imited power s witch select the closest 1% resistor less than the calculated value: rilim = 33.2 k . this sets the minimum current - limit threshold at 3000 ma . use the ios equations, figure 7 , and the previously calculated value for rilim to calculate the maximu m resulting current - limit threshold. the resulting maximum current - limit threshold is 3592 ma with a 33.2 k resistor. application 2 : designing below a m aximum c urrent limit some applications require that current limiting must occur below a certain thr eshold. for this example, assume that the desired upper current - limit threshold must be below 5000 ma to protect an up - stream power supply. use the ios equations and figure 7 to select r ilim . select the closest 1% resistor greater than the calculated val ue: rilim = 23.7k . this sets the maximum current - limit threshold at 5000 ma . use the ios equations, figure 7 , and the previously calculated value for rilim to calculate the minimum resulting current - limit threshold. the resulting minimum current - limit threshold is 4316 ma with a 23.7 k resistor accounting for resistor tolerance the previous sections described the selection of rilim given certain application requirements and the importance of understanding the current - limit threshold tolerance. the analysis focused on ly on the pi5pd 2556/57 performance and assumed an exact resistor value. however, resistors sold in quantity are not exact and are bounded by an upper and lower tolerance centered around a nominal resistance. the additional rilim resistance tolerance direct ly affects the current - limit threshold accuracy at a system level. the following table shows a process that accounts for worst - case resistor tolerance assuming 1% resistor values. step one follows the selection process outlined in the application examples above. step two determines the upper and lower resistance bounds of the selected resistor. step three uses the upper and lower resistor bounds in the ios equations to calculate the threshold limits. it is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%, when precision current limiting is desired. table 1. common rilim resistor selections desired nominal current limit (ma) ideal resistor (k ) closet 1% resistor (k ) resistor tolerance actual limits 1% low ( k ) 1% high (k ) ios min (ma) ios nor (ma) ios m ax (ma) 750 146.9 147 145.5 148.5 605 749 886 1000 110.2 110 108.9 111.1 825 1002 1166 1250 88.2 88.7 87.8 89.6 1039 1244 1430 1500 7 3.6 73.2 72.5 73.9 1276 1508 1725 1750 63.1 63.4 62.8 64 1489 1742 1965 2000 55.2 54.9 54.4 55.4 1737 2012 2252 2250 49.1 48.7 48.2 49.2 1975 2269 2523
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