document number: 91055 www.vishay.com s11-1049-rev. c, 30-may-11 1 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power mosfet IRF740S, sihf740s vishay siliconix features ? halogen-free according to iec 61249-2-21 definition ? surface mount ? available in ta pe and reel ? dynamic dv/dt rating ? repetitive avalanche rated ?fast switching ? ease of paralleling ? simple drive requirements ? compliant to rohs directive 2002/95/ec description third generation power mosfets from vishay provide the designer with the best combi nation of fast switching, ruggedized device design , low on-resistance and cost-effectiveness. the d 2 pak (to-263) is a surface mount power package capable of accommodating die size up to hex-4. it provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. the d 2 pak (to-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 w in a ty pical surface mo unt application. note a. see device orientation. notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. v dd = 50 v, starting t j = 25 c, l = 9.1 mh, r g = 25 ? , i as = 10 a (see fig. 12). c. i sd ? 10a, di/dt ? 120 a/s, v dd ? v ds , t j ? 150 c. d. 1.6 mm from case. e. when mounted on 1" square pcb (fr-4 or g-10 material). product summary v ds (v) 400 r ds(on) ( ? )v gs = 10 v 0.55 q g (max.) (nc) 63 q gs (nc) 9.0 q gd (nc) 32 configuration single n-channel mosfet g d s d 2 pak (to-263) g d s ordering information package d 2 pak (to-263) d 2 pak (to-263) d 2 pak (to-263) lead (pb)-free and halogen- free sihf740s-ge3 sihf740strl-ge3 a sihf740strr-ge3 a lead (pb)-free IRF740Spbf IRF740Strlpbf a IRF740Strrpbf a sihf740s-e3 sihf740stl-e3 a sihf740str-e3 a absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 400 v gate-source voltage v gs 20 continuous drain current v gs at 10 v t c = 25 c i d 10 a t c = 100 c 6.3 pulsed drain current a i dm 40 linear derating factor 1.0 w/c linear derating factor (pcb mount) e 0.025 single pulse avalanche energy b e as 520 mj avalanche current a i ar 10 a repetitive avalanche energy a e ar 13 mj maximum power dissipation t c = 25 c p d 125 w maximum power dissipation (pcb mount) e t a = 25 c 3.1 peak diode recovery dv/dt c dv/dt 4.0 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91055 2 s11-1049-rev. c, 30-may-11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 IRF740S, sihf740s vishay siliconix note a. when mounted on 1" square pcb (fr-4 or g-10 material). notes a. repetitive rating; pulse widt h limited by maximum junction temperature (see fig. 11). b. pulse width ? 300 s; duty cycle ? 2 %. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -62 c/w maximum junction-to-ambient (pcb mount) a r thja -40 maximum junction-to-case (drain) r thjc -1.0 specifications (t j = 25 c, unless otherwise noted) parameter symbol test condi tions min. typ. max. unit static drain-source brea kdown voltage v ds v gs = 0, i d = 250 a 400 - - v v ds temperature coefficient ? v ds /t j reference to 25 c, i d = 1 ma - 0.49 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na zero gate voltage drain current i dss v ds = 400 v, v gs = 0 v - - 25 a v ds = 320 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 6.0 a b - - 0.55 ? forward transconductance g fs v ds = 50 v, i d = 6.0 a b 5.8 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 1400 - pf output capacitance c oss - 330 - reverse transfer capacitance c rss - 120 - total gate charge q g v gs = 10 v i d = 10 a, v ds = 320 v, see fig. 6 and 13 b --63 nc gate-source charge q gs --9.0 gate-drain charge q gd --32 turn-on delay time t d(on) v dd = 200 v, i d = 10 a, r g = 9.1 ? , r d = 20 ? , see fig. 10 b -14- ns rise time t r -27- turn-off delay time t d(off) -50- fall time t f -24- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact -4.5- nh internal source inductance l s -7.5- drain-source body diode characteristics continuous source-dr ain diode current i s mosfet symbol showing the integral reverse p - n junction diode --10 a pulsed diode forward current a i sm --40 body diode voltage v sd t j = 25 c, i s = 10 a, v gs = 0 v b --2.0v body diode reverse recovery time t rr t j = 25 c, i f = 10 a, di/dt = 100 a/s b - 370 790 ns body diode reverse recovery charge q rr -3.88.2c forward turn-on time t on intrinsic turn-on time is negligible (turn-on is dominated by l s and l d ) d s g s d g
document number: 91055 www.vishay.com s11-1049-rev. c, 30-may-11 3 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 IRF740S, sihf740s vishay siliconix typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics, t c = 25 c fig. 2 - typical output characteristics, t c = 150 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-r esistance vs. temperature 91055_01 bottom to p v gs 15 v 10 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v 4.5 v 20 s pulse width t c = 25 c 4.5 v v ds , drain-to-source voltage (v) i d , drain current (a) 10 0 10 1 10 1 10 0 10 -1 10 1 10 0 10 -1 10 0 10 1 v ds , drain-to-source voltage (v) i d , drain current (a) bottom to p v gs 15 v 10 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v 4.5 v 20 s pulse width t c = 150 c 91055_02 4.5 v 20 s pulse width v ds = 50 v 10 1 10 0 10 -1 i d , drain current (a) v gs , gate-to-source voltage (v) 5678910 4 25 c 150 c 91055_03 i d = 10 a v gs = 10 v 3.0 0.0 0.5 1.0 1.5 2.0 2.5 t j , junction temperature ( c) r ds(on) , drain-to-source on resistance (normalized) 91055_04 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
www.vishay.com document number: 91055 4 s11-1049-rev. c, 30-may-11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 IRF740S, sihf740s vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area c iss c rss c oss v gs = 0 v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 91055_05 2500 2000 1500 1000 0 500 10 0 10 1 capacitance (pf) v ds , drain-to-source voltage (v) 91055_06 i d = 10 a v ds = 200 v for test circuit see figure 13 v ds = 80 v v ds = 320 v q g , total gate charge (nc) v gs , gate-to-source voltage (v) 20 16 12 8 0 4 0 15 75 60 45 30 10 1 10 0 v sd , source-to-drain voltage (v) i sd , reverse drain current (a) 0.50 1.30 1.10 0.90 0.70 25 c 150 c v gs = 0 v 91055_07 10 -1 1.50 91055_08 10 s 100 s 1 ms 10 ms operation in this area limited by r ds(on) t c = 25 c t j = 150 c single pulse i d , drain current (a) 10 3 2 5 1 2 5 2 5 2 5 v ds , drain-to-source voltage (v) 0.1 1 10 10 2 10 3 25 25 2 5 25 0.1 10 10 2
document number: 91055 www.vishay.com s11-1049-rev. c, 30-may-11 5 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 IRF740S, sihf740s vishay siliconix fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case 91055_09 i d , drain current (a) t c , case temperature (c) 0 4 6 8 10 25 150 125 100 75 50 2 pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 91055_11 d = 0.5 0.2 0.1 0.05 0.01 single pulse (thermal response) p dm t 1 t 2 notes: 1. duty factor, d = t 1 /t 2 2. peak t j = p dm x z thjc + t c 0.02 thermal response (z thjc ) 10 1 0.1 10 -2 t 1 , rectangular pulse duration (s) 10 -5 10 -4 10 -3 10 -2 0.1 1 10
www.vishay.com document number: 91055 6 s11-1049-rev. c, 30-may-11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 IRF740S, sihf740s vishay siliconix fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 w t p d.u.t l v ds + - v dd 10 v var y t p to obtain required i as i as v ds v dd v ds t p 91055_12c bottom to p i d 4.5 a 5.3 a 10 a v dd = 50 v 1200 0 200 400 600 800 1000 25 150 125 100 75 50 starting t j , junction temperature (c) e as , single pulse energy (mj) q gs q gd q g v g charge v gs d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
document number: 91055 www.vishay.com s11-1049-rev. c, 30-may-11 7 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 IRF740S, sihf740s vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldw ide manufacturing capability. prod ucts may be manufactured at on e of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents su ch as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91055 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak dio d e recovery d v/ d t test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
document number: 91364 www.vishay.com revision: 15-sep-08 1 package information vishay siliconix to-263ab (high voltage) notes 1. dimensioning and toler ancing per asme y14.5m-1994. 2. dimensions are shown in millimeters (inches). 3. dimension d and e do not include mold flash. mold flash shal l not exceed 0.127 mm (0.005") per side. these dimensions are me asured at the outmost extremes of the plastic body at datum a. 4. thermal pad contour optional within dimension e, l1, d1 and e1. 5. dimension b1 and c1 apply to base metal only. 6. datum a and b to be determined at datum plane h. 7. outline conforms to jedec outline to to-263ab. 5 4 1 3 l1 l2 d b b e h b a detail a a a c c2 a 2 x e 2 x b 2 2 x b 0.010 a b mm 0.004 b m base metal plating b 1, b 3 ( b , b 2) c1 (c) section b - b and c - c scale: none lead tip 4 34 (dat u m a) 2 c c b b 5 5 v ie w a - a e1 d1 e 4 4 b h seating plane ga u ge plane 0 to 8 detail ?a? rotated 90 cw scale 8 :1 l3 a1 l4 l millimeters inches millimeters inches dim. min. max. min. max. dim. min. max. min. max. a 4.06 4.83 0.160 0.190 d1 6.86 - 0.270 - a1 0.00 0.25 0.000 0.010 e 9.65 10.67 0.380 0.420 b 0.51 0.99 0.020 0.039 e1 6.22 - 0.245 - b1 0.51 0.89 0.020 0.035 e 2.54 bsc 0.100 bsc b2 1.14 1.78 0.045 0.070 h 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 l 1.78 2.79 0.070 0.110 c 0.38 0.74 0.015 0.029 l1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 l2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 l3 0.25 bsc 0.010 bsc d 8.38 9.65 0.330 0.380 l4 4.78 5.28 0.188 0.208 ecn: s-82110-rev. a, 15-sep-08 d w g: 5970
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.
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