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product structure silicon monolithic integrated circuit this product has not designed protection against radioactive rays . 1/ 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev.001 tsz22111 ? 14 ? 001 www.rohm.com tsz02201 - 0t2t0c100230 - 1 - 2 led drivers for lcd backlights 1ch boost up type white led driver for large lcd b d 9409f 1.1 general description bd 9409f is a high efficiency driver for white leds and is designed for large lcds. bd 9409 f has a boost dcdc converter that employs an array o f leds as the light source. bd 9409f has some protect functions against fault conditions, such as over - voltage protection (ovp), over current limit protection of dcdc (ocp), led ocp protection , and o v er boost protection (fbmax) . therefore it is available fo r the fail - safe design over a wide range output voltage. features ? dcdc converter with current mode ? led protection circuit ( over boost protection (fb_h) , led ocp protection) ? over - voltage protection (ovp) for the output voltage vout ? adjustable soft start ? ad justable oscillation frequency of dcdc ? uvlo detection for the input voltage of the power stage ? pwm dimming and ms dimming. applications ? tv, computer display, lcd backlighting key specification s ? operating power supply voltage range : 11.5 v to 35.0v ? oscillator frequency of dcdc : 150khz (rt=100k ) ? operating current : 2.8 ma ( typ. ) ? operating temperature range : -40c to +10 5 c 1.2 package (s) w(typ) x d(typ) x h(max) sop1 6 1 0 . 0 0mm x 6 . 2 0mm x 1.71 mm pin pitch 1.27mm figure 1 . sop1 6 typical application circuit figure 2. typical application circuit ovp dimout gate isense cs vcc vin fb vcc gnd uvlo stb reg 90 rt pwm ss ms fail vout rs datashee t
2 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 1. 3 pin con fig uration figure 3. pin configuration 1.4 pin descriptions no. pin name function 1 vcc power supply pin 2 stb ic o n /off pin 3 ovp over voltage protection detection pin 4 uvlo under voltage lock out detection pin 5 ss soft start setting pin 6 pwm external pwm dimming signal input pi n 7 fail error detection output pin (active high) 8 ms m ode s elect dimming input pin. 9 rt dc/dc switching frequency setting pin 10 fb error amplifier output pin 11 isense led c urrent detection input pin 12 gnd - 13 dimout dimming signal output for n mos 14 gate dc/dc switch ing output pin 15 cs dc/dc output current detect pin , ocp input pin 16 reg 90 9.0 v output voltage pin v c c 2 3 4 5 6 7 8 1 1 1 2 1 3 1 4 1 5 1 6 1 s t b o v p u v l o s s p w m f a i l r e g 9 0 c s g a t e d i m o u t g n d i s e n s e f b 9 m s 1 0 r t
3 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 1.5 block diagram figure 4 . block diagram a u t o - r e s t a r t c o n t r o l o v p d i m o u t v r e g g a t e i s e n s e c s r t p w m v c c r e g 9 0 g n d + - - c o n t r o l l o g i c r e g 9 0 v i n v c c u v l o t s d r e g 9 0 u v l o c u r r e n t s e n s e o s c s s p w m c o m p - + e r r o r a m p l e d o c p o v e r b o o s t f b s s - f b c l a m p e r v c c p a c k a g e : s o p 1 6 r e g 9 0 m s r s s s s t b u v l o u v l o l e b 1 m o v p f a i l d e t e c t f a i l 1 m 3 k v c c m s _ s t b c o m p m s _ s t b c o m p c s d e t l e v e l s e l e c t e r
4 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 1. 6 absolute maximum ratings (ta=25 c ) parameter symbol rating unit power supply voltage v cc - 0.3 to + 36 v ss, rt, isense, fb, cs pin v oltage ss, rt, isense, fb, cs - 0.3 to + 7 v reg90, dimout, gate pin v oltage reg90, dimout, gate - 0.3 to + 13 v ovp, uvlo, pwm, ms , stb pin v oltage ovp, uvlo, pwm, ms , stb - 0.3 to + 20 v fail pin voltage fail - 0.3 ~ vc c +0.3 v power dissipation pd 0.74 (*1) w operating temperature range topr - 40 to +105 c junction temperature tjmax 150 c storage t emperature r ange tstg - 55 to +150 c (*1) derate by 5 . 92 mw/c when operating above ta=25c. . (mounted on 1 - layer 114.3m m x 7 6.2 mm x 1. 57 mm board) 1.7 recommended operating ranges parameter symbol range unit power supply voltage vcc 11.5 to 35 .0 v dc/dc oscillation frequency fsw 50 to 10 00 khz pwm input frequency fpwm 90 to 2000 hz 1.8 electrical characteristics 1/2 ( unless otherwise specified vcc= 24 v ta=25 c ) parameter symbol min typ max unit conditions
5 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 1.8 electrical characteristics 2 /2 ( unless other wise specified vcc= 24 v ta=25 c ) parameter symbol min typ max unit conditions
6 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 1.9 typical performance curves (reference data) figure 5 . operating circuit current fi gure 6 . standby circuit current ms figure 7 . duty cycle vs fb character figure 8 . isense f eedback voltage vs ms character stb =ms =3 .0 v pwm=3 .0v ta=25 c stb= 3 v , ms=0v pwm=0v ta=25 c vcc=24v ta=25 c ? sweep up p sweep down vcc=24v ta=25 c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 1 2 3 4 5 ms[v] isense feecback voltage[v] 0 20 40 60 80 100 0 1 2 3 4 fb[v] duty cycle[%] 0 10 20 30 40 50 60 70 80 90 100 10 15 20 25 30 35 vcc[v] ist_ms[ua] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 15 20 25 30 35 vcc[v] icc[ma]
7 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 2.1 pin descriptions ? pin 1 : vcc this is the power supply pin of the ic. input range is from 1 1 .5 v to 35 v. the operation starts at more than 10 . 5 v(typ . ) and shuts down at less than 10 .2 v(typ . ) . ? pin 2 : stb this is the on/off setting terminal of the ic. i nput reset - signal to this terminal to reset ic from latch - off. at startup, internal bias starts at high leve l , and then pwm dcdc boost starts after pwm rise edge inputs. note: ic status (ic on/off) transits depending on the voltage inputted to stb and ms terminal. a void the use of inte rmediate level (from 0.8v to 2.0 v). ? pin 3 : ovp the ovp terminal is the input for over - voltage protection . if ovp is more than 3.0v (typ) , the over - voltage protection (ovp) will work. at the moment of these detections, it set s gate=l, dimout=l and starts to count up the abnormal interval . if ovp detection continued to count four gat e clocks, ic reaches latch off. ( please refer to 3 3.5.5 timing chart ) the ovp pin is high impedance, because the internal resistance is not connected to a certain bias. even if ovp function is not used, pin bias is still required because the open connecti on of this pin is not a fixed potential. the setting example is separately described in the section 3.2. 6 2936hwwlqj . ? pin 4 : uvlo u nder v oltage l ock o ut pin is the input voltage of the power stage. , ic starts the boost operation if uvlo is more than 3 . 0 v(typ) and stops if lower than 2. 7 v(typ). the uvlo pin is high impedance, because the internal resistance is not connected to a certain bias. even if uvlo function is not used, pin bias is still required because the open connection of this pin is not a fixed potential. 7khvhwwlqjh[dpsohlvvhsdudwho\ghvfulehglqwkhvhfwlrq 3.2. 5 uvlo setting ? pin 5 : ss this is the pin which sets the s oft start interval of dc/dc converter . i t performs the constant current charge of 3 $ (typ.) to external capacitance css . the switching duty of gate output will be limited during 0 v to 3.7 v (typ.) of the ss volta ge . so the soft start interval tss can be expressed as follows css: the external capacitance of the ss pin . the logic of ss pin asserts low is defined as the latch - off state or pwm is not input high level after stb reset relea se. when ss capacitance is under 1nf, take note if the in - rush current during startup is too large , or if over boost detection (fbmax ) mas k timing is too short. please refer to soft start behavior in the section 3 3.5 . 4 tim ing chart . ? pin 6 : pwm this is the pwm dimming signal input terminal. the high / low level of pwm pins are the following. state pwm input voltage pwm=h pwm=1.5v to 18. 0 v pwm=l pwm= \ 0.8v ? pin 7 : fail this is fail signal output (open drain) pin. at normal operation, pmos will be open state, during abnormality detection pmos will be in on ( 3k ohm typ.) state . and pull up to vcc . [sec] c . t ss ss ? ? ? 6 10 23 1
8 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 ? pin 8 : ms this is the input pin for analog dimming signal. in this condition, the input current is caused. please refer to terminal explanation. relationship between ms voltage and isense voltage. v m s =3v(2.7 0 ~ 1 0.0 v) >8 v isense = 0 .5 0 0v (110% dimming) v m s =2v(1.7 0 ~2.25v) >8 v isense = 0 . 455 v (100% dimming) v m s =1v(0.7 0 ~1.25v) >8 v isense = 0.341 v (75% dimming) v m s =0v( - 0 . 25 ~ 0.25v) >8 ms stand - by mode figure 9 . ms dimming ? pin 9 : rt this is the dc/dc switching frequency setting pin . dcdc frequency is decided by connected resistor. 0 . 500 v 0 . 455 v 0 . 341 v ms [ v ] 0 1 0 v 0 . 25 v isense detect level [ v ] 0 0 . 70 v 1 . 25 v 1 . 70 v 2 . 25 v 2 . 70 v ] k [ ] khz [ f r sw rt ? ? 15000
9 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 ? pin 1 1 : isense this is the input terminal for the current detection. e rror amplifier will be 3 d imming modes by the voltage input from the m s voltage. the 3 modes are compared with each det voltage. and it detects abnormal led overcurrent at isense=3.0v(typ) over. if gate terminal continues during four clks (equivalent to 40us at fosc = 100khz), it becomes latch - off. (please refer to section 3 3.5 . 7 timing chart .) figure 10 . relationship of the feedback voltage and ms figure 1 1 . isense terminal circuit example ? pin 1 2 : gnd this is the gnd pin of the ic . ? pin 13 : dimout this is the output pin for external dimming nmos. the table below shows the rough output logic of each operation state, and the output h level is reg 90 . please refer to 3 3.5 timing chart for de tailed explanations, because dimout logic has an exceptional behavior. please insert the resist or r dim between the dimming mos gate to improve the over shoot of led current, as pwm turns from low to high. status dimout output normal s ame logic to p wm ab normal gnd level ? pin 1 4 : gate this is the output terminal for driving the gate of the boost mosfet. the high level is reg90 . frequency can be set by the resistor connected to rt. r efer to pin description for the frequency setting. ? pin 1 5 : cs the cs pin has two fun ctions. 1. dc / dc current mode feedback terminal the inductor current is converted to the cs pin voltage by the sense resistor r cs. this voltage compared to the voltage set by error amplifier controls the output pulse . 2. inductor current limit (ocp) te rminal the cs terminal also has an over current protection (ocp). if the voltage is more than 0.4v (typ . ) , the switching operation will be stopped compulsorily. and the next boost pulse will be restarted to normal frequency. in addition, the cs voltage is more than 1.0v(typ.) during four gate clocks, ic will be latch off. as above ocp operation, if the current continues to flow nevertheless gate=l because of the destruction of the boost mos, ic will stops the operation completely. both of the above functio ns are enabled after 300ns (typ) when gate pin asserts high , because the leading edge blanking function (leb) is included into this ic to prevent the effect of noise. please refer to vhfwlrq 3 3.3. 1 ocp setting / calculation method for the current rating of '&'& 3duwv for detailed explanation . if the capacitance cs in the right f igure is increased to a micro order, please be careful that the limited value of nmos drain current id is more than the simple calculation. because the current id flows not only th rough rcs but also through cs, as the cs pin voltage moves according to id. figure 12. dimout terminal circuit example figure 13. cs terminal circuit example v o u t i s e n s e d i m o u t r e g 9 0 r d i m b d 9 4 0 9 - v o u t i s e n s e f b e r r o r a m p + d i m o u t b d 9 4 0 9 m s r s c s d e t l e v e l s e l e c t e r 0 . 500 v 0 . 455 v 0 . 341 v ms [ v ] 0 1 0 v 0 . 25 v isense detect level [ v ] 0 0 . 70 v 1 . 25 v 1 . 70 v 2 . 25 v 2 . 70 v v i n c s g n d b d 9 4 0 9 g a t e r c s c s i d
10 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 ? pin 1 6 : reg90 this is the 9.0 v(typ . ) output pin . available current is 15 ma (min). the characteristic of vcc line regulation at reg90 is shown as figure. vcc must be used in more than 1 1 .5v for stable 9v output. please place the ceramic capacitor connected to reg90 pin (1.0 f to 10 f) closest to reg90 - gnd pin. figure 14. reg90 line regulation 0 2 4 6 8 10 0 5 10 15 20 25 30 35 vcc[v] reg90[v]
11 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 2.6 list of the protection function d etection c ondition ( t yp c ondition) protect f unction detection p in detect c ondition release c ondition timer o peration protection t ype detection c ondition pw m ss fbmax fb fb > 4.0v h( 4 clk) ss> 3.7 v fb < 4.0v 2 1 2 clk a uto - r estart after detection (judge periodically whether normal or not) led ocp isense isense > 3.0v - - isense < 3.0v 4clk a uto - r estart after detection (judge periodically whether normal or not ) rt gnd short rt rt 5v - - release rt =high no r estart by release uvlo uvlo uvlo<2.7v - - uvlo>3.0v no r estart by release reg 90 uvlo reg 90 reg 90 < 6.0 v - - reg 90 > 6.5 v no r estart by relea se vcc uvlo vcc vcc< 10 .2 v - - vcc> 10 . 5 v no r estart by release ovp ovp ovp>3.0v - - ovp<2. 8 v 4clk a uto - r estart after detection (judge periodically whether normal or not) ocp cs cs>0.4v - - - no pulse by p ulse ocp latch cs cs> 1.0 v - - cs <1.0 v 4clk a uto - r estart after detection (judge periodically whether normal or not) to reset the latch type protection , sohdvh vhw 67% orjlf wr /? rqfh 2wkhuzlvh wkh ghwhfwlrq ri 9&&89/2 reg90 uvlo is required. the clock number of timer operation corresponds to the boost pulse clock. auto - restart clock = 2 17 clk = 131072clk. 2.7 list of t he p rotect ion f unction o peration protect f unction operation of the p rotect f unction dc/dc gate o utput dimming t ransistor (dimout) l ogic ss p in fail pin fbmax stop after latch l ow aft er latch d ischarge after latch high after timer latch led ocp stop immediately i mmediately high , l ow after latch discharge after latch high after timer latch rt gnd short stop immediately immediately low not discharge low rt high short stop immediately immediately low not discharge low stb stop immediately l ow after reg90 uvlo detects d ischarge immediately low ms_ stb stop immediately low after reg90uvlo detects discharge immediately low uvlo stop immediately immediately low discharge immediately low reg90uvlo stop immediately immediately low discharge immediately low vcc uvlo stop immediately immediately low discharge immediately low ovp stop immediately immediately low discharge after latch high after timer latch ocp stop immediately normal oper ation not discharge low ocp latch stop after latch low after latch discharge after latch high after timer latch please refer to section 3 3.5 timing chart for details .
12 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3.1 application c ircuit e xample introduce an example application using the bd 9409 f. 3.1.1 b asic a pplication e xample figure 1 5 . b asic application example 3.1.2 ms d imming or pwm d imming examples figure 1 6 . example circuit for analog dimming figure 1 7 . example circuit for pwm dimming o v p d i m o u t g a t e i s e n s e c s v c c v i n f b v c c g n d u v l o s t b r e g 9 0 r t s s m s v o u t r s r e g 9 0 p w m f a i l o v p d i m o u t g a t e i s e n s e c s v c c v i n f b v c c g n d u v l o s t b r e g 9 0 r t p w m s s m s f a i l v o u t r s o v p d i m o u t g a t e i s e n s e c s v c c v i n f b v c c g n d u v l o s t b r e g 9 0 r t p w m s s m s v o u t r s r e g 9 0 f a i l
13 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 2 external c omponents s election 3.2.1 start up operation and s oft s tart external capacitance setting the below explanation is the start up sequence of this ic figure 1 8 . startup waveform figure 1 9 . c ircuit behavior at startup ? explanation of start up sequence 1. reference voltage re g90 starts by stb= ms= h . 2. s s starts to charge at the tim e of first pwm=h. at this moment, t he ss voltage of slow - start starts to equal fb voltage , and the circuit becomes fb=ss regardless of pwm logic. 3. when fb=ss reaches the lower point of internal sawtooth waveform, gate terminal outputs pulse and starts to boost vout. 4 . it boosts vout and vout reaches the voltage to be able to flow led current. 5 . if led current flows over decided level, fb=ss circuit disconnects and startup behavior completes. 6 . then it works normal operation by feedback of isense terminal . if led current doesn't flow when ss becomes over 3.7v (typ. ) , ss=ff c ircuit completes forcibly and fbmax protection starts. ? method of setting ss external capacitance according to the sequence described above, start time tss that startup completes with fb=ss condition is the time that fb voltage reaches the feedback point. the capacit ance of ss terminal is defined as css and the feedback voltage of fb terminal is defined as vfb . the equality on t fb is as follows. if css is set to a very small value, ru s h current flows into the inductor at startup. on the contrary, if c ss is enlarged too much, led will light up gradually. since css differs in the constant set up with the characteristic searched for and differs also by factors, such as a voltage rise ratio, an output capacitance, dcdc frequency, and led current, please c onfirm with the system. setting example when css=0.1uf , iss=3 a ,and startup completes at vfb=3.7v , ss setting time is as follows . l e d _ o k s s = f b c i r c u i t s s f b 5 v o s c d r i v e r c o m p g a t e d i m o u t v o u t i l e d p w m p w m = l : s t o p 3 u a c s s i s e n s e c s [sec] ] [ 3 ] [ ] [ a v vfb f c t ss ss ? ? ? ? [sec] 123 . 0 ] [ 10 3 ] [ 7 . 3 ] [ 10 1 . 0 6 6 ? ? ? ? ? ? ? a v f t ss m s s s s l o p e p w m g a t e v o u t i l e d l e d _ o k f b o s c 2 1 3 4 5 6 s t b
14 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 2 . 2 vcc s eries r esistance setting h ere are the following effects of inserting series resistor rvcc into vcc line . (i) in order to drop the voltage vcc, it is possible to suppress the heat generation of the ic. (ii) it can limit the inflow current to vcc line. however, if resistance rvcc is set bigger, vcc voltage becomes under minimum operation voltage (vcc< 1 1 .5 v). r vcc must be set to an appropriate series resistance . ic ? s inflow current line i_in has the following inflow line s . ic ? s circuit current p icc c urrent of rreg connected to reg90 p ireg c urrent to drive fet ? s gate p i_gate the se decide the voltage v at rvcc. vcc terminal voltage at that time can be expressed as follows. here, judgement is the 11 .5 v minimum operation vo ltage. please consider a sufficient margin when setting the series resistor of vcc. setting example above equation is translated as follows. when vin=24v , icc=2.0ma , rreg=10k and idcdc=2ma , rv cc ? s value is calculated as follow s . (icc is 2.8 ma(typ.) ) . please set each values with tolerance and margin. 3. 2. 3 led current setting led current can be adjusted by setting the resistance r s [ ] which connect s to isense pin and ms [v] . relationship between r s and i led current with vms2 dimming ( 1. 7v< m s < 2.25 v) =100% dimming. setting example if i led current is 2 00ma and ms is 2 .0v, we can calculate r s as below . with vms1 dimming (0.7v 15 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3.2. 4 dcdc oscillation frequency setting r rt which connects to rt pin sets the oscillation frequency f sw of dcdc . r t r r t g a t e c s g n d r c s f r e q u e n c y ( f s w ) ] [ ] [ 7 . 2 ]) [ 7 . 2 ] [ ( ] [ 2 1 ? ? ? ? ? k v v v vin k r r det u v l o c u v l o v i n r 1 + - o n / o f f 2 . 7 v / 3 . 0 v r 2 ] [ ] [ 2 ]) [ 2 ] [ 1 ( 0 . 3 v k r k r k r v vin can ? ? ? ? ? ? ] [ 0 . 170 ] [ 7 . 2 ]) [ 7 . 2 ] [ 18 ( ] [ 30 ] [ 7 . 2 ]) [ 7 . 2 ] [ ( ] [ 2 1 ? ? ? ? ? ? ? ? ? ? k v v v k v v v vin k r r det ] [ 0 . 20 ] [ ] [ 30 ]) [ 30 ] [ 0 . 170 ( ] [ 0 . 3 ] [ 2 ]) [ 2 ] [ 1 ( 0 . 3 v v k k k v k r k r k r v vin can ? ? ? ? ? ? ? ? ? ? ? ? ? ] [ ] [ 15000 ? ? k khz f r sw rt ] [ 75 ] [ 200 15000 ] [ 15000 ? ? ? ? k khz khz f r sw rt
16 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 2. 6 ovp setting the ovp terminal is the input for over - voltage protection of output voltage . the ovp pin is high impedance, because the internal resistance is not connected to a certain bias. d etection voltage of vout is set by divid ing resistors r1 and r2 . the resistor values can be calculated by the formula below. r rt = resistor value connected to rt pin ] [ 8 . 44 ] [ ] [ 10 ] [ 10 ] [ 150 ] [ 8 . 2 ] [ 2 ]) [ 2 ] [ 1 ( 8 . 2 v v k k k v k r k r k r v vin can ? ? ? ? ? ? ? ? ? ? ? ? ? ] [ 48 . 20 10 5 . 1 ] [ 75 4096 10 5 . 1 ] [ 4096 7 7 ms k k r latch rt time ? ? ? ? ? ? ? ? ? ] [ 10 5 . 1 ] [ 131072 10 5 . 1 2 7 7 17 s k r r auto rt rt time ? ? ? ? ? ? ? ] [ 36 . 655 10 5 . 1 ] [ 75 131072 10 5 . 1 ] [ 131072 7 7 ms k k r auto rt time ? ? ? ? ? ? ? ? ? ] [ 10 5 . 1 ] [ 4096 10 5 . 1 2 7 7 12 s k r r latch rt rt time ? ? ? ? ? ? ? o v p c o v p v o u t r 2 r 1 + - o v p 2 . 8 v / 3 . 0 v ] [ ] [ 2 ]) [ 2 ] [ 1 ( 8 . 2 v k r k r k r v vin can ? ? ? ? ? ? ] [ ] [ 0 . 3 ]) [ 0 . 3 ] [ ( ] [ 2 1 ? ? ? ? ? k v v v vovp k r r det ] [ 150 ] [ 3 ]) [ 0 . 3 ] [ 48 ( ] [ 10 ] [ 0 . 3 ]) [ 0 . 3 ] [ ( ] [ 2 1 ? ? ? ? ? ? ? ? ? ? k v v v k v v v vovp k r r det
17 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 3 dcdc p arts s election 3. 3 .1. ocp setting / calculation method for the current rating of dcdc parts ocp detect ion stops the switching when the cs pin voltage is more than 0.4v (typ.) . the resistor value of cs pin, r cs needs to be considered by the coil l current. and the current rating of dcdc external parts is required more than the peak current of the coil. shown below are the calculation method of the coil peak current, the selection method of rcs (the resistor value of cs pin) and the current rating of the external dcdc parts at continu ous current mode . >& the calculation method of the coil peak current, ipeak at continuous current mode >' at first, since the ripple voltage at cs pin depends on the application condition of dcdc, the following variables are used. vout voltage =vout[v] led t otal current =iout[a] dcdc input voltage of the power stage =vin[v] efficiency of dcdc = [%] and then, the average input current iin is calculated by the following equation. $qgwkhulssohfxuuhqwriwkhlqgxfwru/?,/>$@fdqehfdofxodwhge\xvlqj dc dc the switching frequency, fsw, as follows. on the other hand, the peak current of the inductor ipeak can be expressed as follows. ? therefore, the bottom of the ripple current imin is or 0 if imin>0, the operation mode is ccm (continuous current mode), otherwise the mode is dcm (discontinuous current mode). ( the selection method of rcs at continuous current mode ) ipeak flows into rcs and that causes the voltage signal to cs pin. (please refer to the timing chart at the right) peak voltage vcspeak is as follows. as this vcspeak reaches 0.4v (typ.) , the dcdc output stops the switching. therefore, rcs value is necessary to meet the condition below. (the current rating of the external dcdc parts) the peak current as t he cs voltage reaches ocp level (0.4v (typ.) ) is defined as ipeak_det. ? the relationship among ipeak (equation (1)), ipeak_det (equation (2)) and the current rating of parts is required to meet the following please make the selection of the external parts such as fet, inductor, diode meet the above condition. the current rating of parts figure 2 5. coil current waveform 2 ] [ ] [ min a il a i i in ? ? ? v i n v o u t g a t e c s g n d r c s i l l i o u t f s w ] [ v i r vcs peak cs peak ? ? ] [ 4 . 0 ] [ v v i r peak cs ?? ? ] [ ] [ ] [ 4 . 0 _ a r v i cs det peak ? ? ?? ?? det peak peak i i _ i i n a ) ( t ) 0 . 4 v ( t ) v ) ( v ) v c s [ v ] i l [ a ] i l ( t ) n [ v ] i p e a k i m i n v c s p e a k ] [ [%] ] [ ] [ ] [ a v v a i v v i in out out in ? ? ? ? ] [ ] [ ] [ ] [ ] [ ]) [ ] [ ( a hz f v v h l v v v v v v il sw out in in out ? ? ? ? ? ? ] [ 2 ] [ ] [ a a il a i i in peak ? ? ?
18 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 [ setting example ] output voltage = vout [v] = 40v led total current = iout [a] = 0.48v dcdc input voltage of the power stage = vin [v] = 24v efficiency of dcdc = [%] = 90% averaged input current iin is calculated as follows. if the switching frequency, f sw = 200khz, and the inductor, l=100 +wkhulssohfxuuhqwriwkhlqgxfwru/?,/>$@fdqeh calculated as follows. therefore the inductor peak current , ipeak is ,i5fvlvdvvxphgwreh ?5fvydoxhfrqilupdwlrq the above condition is met. and ipeak_det, the current ocp works, is if the current rating of the used parts is 2a, this inequality meets the above relationship. the p arts selection is proper. and i min , the bottom of the il ripple current, can be calculated as follows. t his inequality implies that the operation is continuous current mode. ?fdofxodwlrquhvxowriwkhshdnfxuuhqw the current rating ?fxuuhqwudwlqjfrqilupdwlrq of dcdc parts ] [ 33 . 1 ] [ 3 . 0 ] [ 4 . 0 det _ a v i peak ? ? ? ] [ 0 . 2 ] [ 33 . 1 ] [ 13 . 1 a a a ?? ?? ? ] [ 89 . 0 [%] 90 ] [ 24 ] [ 48 . 0 ] [ 40 [%] ] [ ] [ ] [ ] [ a v a v v v a i v v a i in out out in ? ? ? ? ? ? ? ? ] [ 48 . 0 ] [ 10 200 ] [ 40 ] [ 10 100 ] [ 24 ]) [ 24 ] [ 40 ( ] [ ] [ ] [ ] [ ]) [ ] [ ( 3 6 a hz v h v v v hz f v v h l v v v v v v il sw out in in out ? ? ? ? ? ? ? ? ? ? ? ? ? ? ] [ 13 . 1 2 ] [ 48 . 0 ] [ 89 . 0 ] [ 2 ] [ ] [ a a a a a il a i ipeak in ? ? ? ? ? ? 0 ] [ 65 . 0 ] [ 48 . 0 ] [ 13 . 1 ] [ 2 ] [ ] [ ?? ? ? ? ? ? ? a a a a a il a i i in min ?? ?? v v a ipeak rcs vcs peak 4 . 0 ] [ 339 . 0 ] [ 13 . 1 ] [ 3 . 0 ?? ? ? ? ? ? ?
19 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 3.2 . inductor selection the inductor value affects the input ripple curr ent , as shown the previous section 3.3.1. where l: coil inductance [h] v out : dcdc output voltage [v] v in : input voltage [v] i out : output load current (the summation of led current) [a] i in : input current [a] f sw : oscillation frequency [ hz] in continuous current mode, % il is set to 30% to 50% of the output load current in many cases. in using smaller inductor, the boost is operated by the discontinuous current mode in which the coil current returns to zero at every period. *the cu rrent exceeding the rated current value of inductor flown through the coil causes magnetic saturation, results in decreasing in efficiency. inductor needs to be selected to have such adequate margin that peak current does not exceed the rated current value of the inductor. *to reduce inductor loss and improve efficiency, inductor with low resistance components (dcr, acr) needs to be selected 3. 3 .3. output capacitance cout selection output capacitor needs to be selected in consideration of equivalent serie s resistance required to even the stable area of output voltage or ripple voltage. be aware that set led current may not be flown due to decrease in led terminal voltage if output ripple component is high. output ripple voltage % v out is determined by equa tion (4): when the coil current is charged to the output capacitor as mos turns off, much output ripple is caused. much ripple voltage of the output capacitor may cause the led current ripple. * rating of capacitor needs to be selected to have adequate margin against output voltage. *to use an electrolytic capacitor, adequate margin against allowable current is also necessary. be aware that the led current is larger than the set value transitionally in case that led is provided with pwm dimming especially. 3. 3 . 4 . mosfet selection there is no problem if the absolute maximum rating is larger than the rated current of the inductor l, or is larger than the sum of the tolerance voltage of c out and the rectifying diode v f . the produc t with small gate capacitance (injected charge) needs to be selected to achieve high - speed switching. * one with over current protection setting or higher is recommended. * the selection of one with small on resistance results in high efficiency. 3. 3 . 5 . rectifying diode selection a schottky barrier diode which has current ability higher than the rated current of l, reverse voltage larger than the tolerance voltage of c out , and low forward voltage vf especially needs to be selected. figure 26. i nductor current waveform and diagram figure 27. o utput capacitor diagram ] [ 2 ] [ ] [ a a il a i ipeak in ? ? ? ] [ [%] ] [ ] [ ] [ a v v a i v v i in out out in ? ? ? ? i l v o u t v i n c o u t r c s l i l v out v in c out r cs l r esr i l (4) ????? ] [ v r il vout esr ? ? ] [ ] [ ] [ ] [ ] [ ]) [ ] [ ( a hz f v v h l v v v v v v il sw out in in out ? ? ? ? ?
20 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 4 . loop compensati on a current mode dcdc converter has each one pole (phase lag) f p due to cr filter composed of the output capacitor and the output resistance (= led current) and zero (phase lead) f z by the output capacitor and the esr of the capacitor. moreover, a step - u p dcdc converter has rhp zero (right - half plane zero point) f zrhp which is unique with the boost converter. this zero may cause the unstable feedback. to avoid this by rhp zero, the loop compensation that the cross - over frequency f c, set as follows, is sug gested. fc = f zrhp /5 (f zrhp : rhp zero frequency) considering the response speed, the calculated constant below is not always optimized completely. it needs to be adequately verified with an actual device. figure 2 8 . output stage and error amplifier diagram i. calculate the pole frequency fp and the rhp zero frequency f zrhp of dc/dc converter where i led = the summation of led current, (continuous current mode) ii. calculate the phase compensation of the error amp output (f c = f zrhp /5 ) above equation is described for lighting led without the oscillation. the value may cause much error if the quick response for the abrupt change of dimming signal is required. to improve the transient response, r fb1 needs to be increased, and c fb1 needs to be decreased. it needs to be adequately verified with an actual device in consideration of variation from parts to parts since phase margin is decreased. ] [ ) 1 ( 5 1 ? ? ? ? ? ? ? ? ? d v gm f i r f r out p led cs rhzp fb ] [ 2 hz c v i f out out led p ? ? ? ? out in out v v v d ? ? ] [ 10 0 . 4 4 s gm ? ? ? ] [ 1 2 5 1 2 1 1 f zrhp f fb r c f fb r c fb ? ? ? ? ? ? ? ? + - c f b 1 f b r f b 1 g m v o u t i l e d c f b 2 v o u t v i n c o u t r c s l r e s r ] [ 2 ) 1 ( 2 hz i l d v f led out zrhp ? ? ? ? ? ?
21 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 . timing c hart 3. 5 .1 pwm start up 1 ( i nput pwm s ignal a fter i nput stb s ignal) figure 29 . pwm start up 1 ( i nput pwm s ignal a fter i nput stb s ignal) ? reg90 starts up when stb and ms is changed from low to high . in the state where the pwm signal is not inputted, ss terminal is not charged and dcdc do es n ? t start to boost, eithe r. ? when reg90 is more than 6.5 v (typ.) , the reset signal is released. (* 3 ? the charge of the pin ss starts at the positive edge of pwm=l to h, and the soft start starts. and while the ss is less than 0. 4 v, the pulse does not output. the pin ss continue s charging in spite of the assertion of pwm or ovp level. (* 4 ? the soft start interval will end if the voltage of the pin ss, vss reaches 3.7 v (typ.) . by this time, it boost s v out to the voltage where the set led current flows. the abnormal detection of fbm ax starts to be monitored. (* 5 ? as stb or ms =l, the boost operation is stopped instantaneously. (discharge operation continues in the state of stb=l and reguvlo=l. please refer to section 3.5.3) (* 6 ? in this diagram, before the charge period is completed, ms is changed to high again. as ms =h again , the boost operation restarts the next pwm=h. it is the same operation as the timing of (*2). ( for capacitance setting of ss terminal, please refer to the section 3.2.1. v c c 1 0 . 5 v m s g a t e p w m r e g 9 0 6 . 5 v s s 3 . 7 v o f f s s n o r m a l s t a n d b y s s s t a n d b y 0 . 4 v 0 . 4 v f a i l s t a t e ( * 1 ) ( * 2 ) ( * 3 ) ( * 4 ) ( * 5 ) ( * 6 ) s t b
22 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 .2 pwm start up 2 ( i nput stb s ignal a fter i nputted pwm s ignal) figure 3 0 . pwm start up 2 ( i nput stb s ignal after i nputted pwm s ignal) ? reg90 starts up when stb =ms =h. ? when reg90 uvlo releases or pwm is inputted to the edge of pwm= /:+ , ss charge starts and soft start period is st arted. and while the ss is less than 0. 4 v, the pulse does not output. the pin ss continues charging in spite of the assertion of pwm or ovp level. ? the soft start interval will end if the voltage of the pin ss, vss reaches 3.7 v (typ.) . by this time, it boosts v out to the point where the set led current flows. the abnormal detection of fbmax starts to be monitored. ? as stb=l, the boost operation is stopped instantaneously (gate=l, ss=l) . (discharge operation works in the state of st b or ms= l and reg90 uvlo= h . please refer to the section 3.5.3) ? in this diagram, before the dis charge period is completed, ms is changed to high again. as ms =h again, operation will be the same as the timing of (*1). v c c m s g a t e r e g 9 0 s s 3 . 7 v s s s s s t a n d b y n o r m a l p w m 0 . 4 v 0 . 4 v 1 0 . 5 v 6 . 5 v o f f f a i l s t a t e ( * 1 ) ( * 2 ) ( * 3 ) ( * 4 ) ( * 5 ) s t b
23 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 . 3 turn o f f figure 3 2 . turn o f f ? as stb or ms= +:/ , boost operation stops and reg90 start s to discharge. the discharge curve is decided by reg90 discharge resistance an d the capacitor of the reg90 terminal . ? while stb or ms =l, reg90 uvlo=h , dimout becomes same as pwm . when reg90 = 9.0 v is less than 6. 0 v (typ.) , ic becomes off state. v out is discharged completely until this time . i t should be set to avoid a sudden brightness. reg 90 uvlo stb reg 90 6 . 0 v dimout gate vout ss on dischange off (* 1 ) (* 2 ) pwm failb state
24 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 . 4 soft s tart f unction figure 3 3 . soft s tart f unction ? the ss pin charge does not start by just stb =ms =h. pwm=h i s required to start the soft start. in the low ss voltage, the gate pin duty depends on the ss voltage. and while the ss is less than 0. 4 v, the pulse does not output. ? by the time stb or ms =l, the ss pin is discharged immediately. ? as the stb reco vered to stb =ms =h, the ss charge starts immediately by the logic pwm=h in this chart. ? the ss pin is discharged immediately by the uvlo=l . ? the ss pin is discharged immediately by the vccuvlo=l . ? the ss pin is discharged immediately by the reg 90 uvlo=l . ? the ss pin is not discharged by the abnormal detection of the latch off type such as ovp until the latch off. m s 3 . 0 v 2 . 8 v p w m o v p s s 2 . 7 v 3 . 0 v 1 0 . 2 v 1 0 . 5 v u v l o v c c u v l o r e g 9 0 u v l o 6 . 0 v 6 . 5 v f a i l 4 c l k a u t o c o u n t e r 1 3 1 0 7 2 c o u n t s t a r t e n d ( * 1 ) ( * 2 ) ( * 3 ) ( * 4 ) ( * 5 ) ( * 6 ) ( * 7 ) s t b
25 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 . 5 ovp d etection figure 3 4 . ovp d etection ? as ovp is detected, the output gate=l, dimout=l, and the abnormal counte r starts . ? if ovp is released within 4 clocks of abnormal counter of the gate pin frequency, the boost operation restarts. ? as the ovp is detected again, the boost operation is stopped. ? as the ovp detection continues up to 4 count by the abnor mal counter, ic will be latched off. after latch ed off, auto counter starts counting. ? once ic is latched off, the boost operation doesn't restart even if ovp is released. ? when auto counter reaches 131072clk ( 2 17 clk) , ic will be auto - restarted . t he auto restart interval can be calculated by the external resistor of rt pin. (please refer to the section 3.2. 7 . ) ? the operation of the ovp detection is not related to the logic of pwm. m s p w m 3 . 0 v 2 . 8 v 3 . 0 v 2 . 8 v 3 . 0 v 2 . 8 v a b n o r m a l c o u n t e r o v p s s g a t e d i m o u t s t a r t s t a r t r e s e t e n d s t a r t r e s e t l e s s t h a n g a t e 4 c o u n t g a t e 4 c o u n t l e s s t h a n g a t e 4 c o u n t n o r m a l o v p n o r m a l a b n o r m a l n o r m a l o v p n o r m a l s t a t e o v p a b n o r m a l a b n o r m a l 0 . 4 v f a i l r e g 9 0 a u t o c o u n t e r s t a r t e n d 1 3 1 0 7 2 c o u n t l a t c h o f f a n d a u t o c o u n t e r ( * 1 ) ( * 2 ) ( * 3 ) ( * 4 ) ( * 5 ) ( * 6 ) ( * 7 ) s t b
26 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 . 6 fbmax d etection figure 3 5 . fbmax d etection (*2) p d uring the soft start, it is not judged to the abnormal state even if the fb=h(fb>4.0v (typ.) ). (*3) p when the pwm=h and fb=h, the deqrupdofrxqwhugrhvq?wvwduwlpphgldwho\ (*4) p the cp counter will start if the pwm=h and the fb=h detection continues up to 4 clocks of the gate frequency. once the count starts, only fb level is monitored. (*5) p when the fbm ax detection continues till the cp counter reaches 4096 clk ( 2 1 2 clk) , ic will be latched off. the latch off interval can be calculated by the external resistor of rt pin. (please refer to the section 3.2. 7 . ) (*6) p when auto counter reaches 131072 clk ( 2 1 7 clk) , ic will be auto - restarted . the auto restart interval can be calculated by the external resistor of rt pin. (please refer to the section 3.2. 7 . ) m s g a t e f b 4 . 0 v c p c o u n t e r s s 3 . 7 v f a i l s s c p c o u n t e r n o r m a l s s s t a t e s t a n d b y l a t c h o f f a n d a u t o c o u n t e r ? ? ? ? ? ? ? ? ? ? p w m 4 . 0 v r e g 9 0 e n d s t a r t a u t o c o u n t e r s t a r t e n d 1 3 1 0 7 2 c o u n t 4 0 9 6 c o u n t ( * 1 ) ( * 2 ) ( * 3 ) ( * 4 ) ( * 5 ) ( * 6 ) s t b
27 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3. 5 . 7 led ocp d etection figure 3 6 . led ocp d etection ?,i ,6(16(!9 (typ.) , ledocp is detected, a nd gate becomes l. to detect ledocp continuously, the dimout is compulsorily high, regardless of the pwm dimming signal. ?:khqwkh/('2&3uhohdvhvzlwklqfrxqwvriwkh*$7(iuhtxhqf\wkherrvwrshudwlrquhvwduwv (*3) ? as the ledocp is detected agai n, the boost operation is stopped. ?,iwkh/('2&3ghwhfwlrqfrqwlqxhvxswrfrxqwvri*$7(iuhtxhqf\,&zlooehodwfkhgrii after latch ed off, auto counter starts counting. ?2qfh,&lvodwfkhgriiwkherrvwrshudwlrqgrhvq
wuhvwduwhyhqliwk e ledocp releases. ? when auto counter reaches 131072clk ( 2 17 clk) , ic will be auto - restarted . the auto restart interval can be calculated by the external resistor of rt pin. (please refer to the section 3.2. 7 . ) ? the operation of the ledocp detection is not related to the logic of the pwm. m s 3 . 0 v a b n o r m a l c o u n t e r i s e n s e s s g a t e d i m o u t s t a r t s t a r t r e s e t e n d s t a r t l e s s t h a n 4 c o u n t 4 c o u n t n o r m a l l e d o c p n o r m a l a b n o r m a l n o r m a l s t a t e a b n o r m a l a b n o r m a l l e d o c p l e d o c p p w m 0 . 4 v 3 . 0 v 3 . 0 v 3 . 0 v 3 . 0 v 3 . 0 v f a i l r e g 9 0 a u t o c o u n t e r s t a r t e n d l e s s t h a n 4 c o u n t r e s e t n o r m a l l a t c h o f f a n d a u t o c o u n t e r 1 3 1 0 7 2 c o u n t ( * 1 ) ( * 2 ) ( * 3 ) ( * 4 ) ( * 5 ) ( * 6 ) ( * 7 ) s t b
28 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 3.6 i/o equivalent circuits ovp uvlo ss rt pwm fail ms fb dimout / reg90 gate / reg90 / cs stb isense figure 3 7 . i/o equi valent circuits r e g 9 0 d i m o u t g n d 1 0 0 k r e g 9 0 g a t e g n d c s 1 0 0 k s t b 1 m 2 0 0 k 5 v ovp 100 k 5 v i s e n s e 2 0 k 5 v u v l o 5 0 k 5 v s s 5 v 3 k r t p w m 1 m 1 0 0 k 5 v f a i l v c c 3 k 2 0 k 5 v m s f b
29 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 operational notes 1. reverse c onnection of p ower s upply connecting the power supply in reverse polarity can damage the ic. take pr ecautions against reverse polarity when connecting the power supply , such as mounting an external diode between the power supply and the ic ? s power supply pin s. 2. power s upply l ines design the pcb layout pattern to provide low impedance supply lines. furthermore, connect a capacitor to ground at all power supply pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. g round voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. g round w iring p attern when using both small - signal and large - current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small - signal ground caused by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal c onsideration should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. in case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the maximum junction t emperature rating. 6. recommended o pe rating c onditions these conditions represent a range within which the expected characteristics of the ic can be approximately obtained . the e lectrical characteristics are guaranteed under the conditions of each parameter . 7. inrush current when power is firs t supplied to the ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the ic has more than one power supply. therefore, give special consider ation to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation u nder s trong e lectromagnetic f ield operating the ic in the presence of a strong electromagnetic field may cause the ic to malfunction . 9. testin g on a pplication b oards when testing the ic on an application board, connecting a capacitor directly to a low - impedance output pin may vxemhfwwkh,&wrvwuhvv$ozd\vglvfkdujhfdsdflwruvfrpsohwho\diwhuhdfksurfhvvruvwhs7kh,&?vsrzhuvxsso\ should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter - pin short and mounting errors ensure that the direction and position are correct when mounting the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground , power supply and output pin . inter - pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 11. unused input pins input pins of an ic are often co nnected to the gate of a mos transistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the electric field from the outside can easily charge it. the small charge acquired in this way is enough to produce a signif icant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise specified, unused input pins should be connected to the power supply or ground line.
30 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 operational notes C n n p + p n n p + p s u b s t r a t e g n d n p + n n p + n p p s u b s t r a t e g n d g n d p a r a s i t i c e l e m e n t s p i n a p i n a p i n b p i n b b c e p a r a s i t i c e l e m e n t s g n d p a r a s i t i c e l e m e n t s c b e t r a n s i s t o r ( n p n ) r e s i s t o r n r e g i o n c l o s e - b y p a r a s i t i c e l e m e n t s
31 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 ordering informatio n b d 9 4 0 9 f - e 2 part number package f:sop 1 6 packaging and forming specification e2: embossed tape and reel marking diagram s sop16(top view) b d 9 4 09 f part number marking lot number 1pin mark
32 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 physical dimension, tape and reel information package name sop1 6 (unit : mm) pkg : sop16 drawing no. : ex11 4 - 5001 (max 10.35 (include.burr))
33 / 33 ? 20 16 rohm co., ltd. all rights reserved. 01.nov.2016 rev . 001 www.rohm.com tsz22111 15 001 b d 9409f tsz02201 - 0t2t0c100230 - 1 - 2 revision history date revision changes 01 nov 2016 rev. 001 new release
notice - p ga - e rev.00 3 ? 201 5 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our p roducts are designed and manufactured for application in ordinary electronic equipment s ( such as av equipment, oa equipment, telecommunication equipment, home elec tronic appliances, amusement equipment, etc.). if you intend to use our products in devices requiring extremely high reliability ( such as medical equipment ( n ote 1 ) , transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, f uel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life , bodily injury or serious damage to property ( specific applications ) , please consult with the rohm sales represe ntative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any rohm s products for specific appl ications. ( n ote1) m edical e quipment c lassification of the s pecific applications japan usa eu china class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsi bilities, adequate safety measures including but not limited to fail - safe design against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our p roducts are designed and manufactured for use under standard conditions a nd not under any special or extraordinary environments or conditions, as exemplified below . accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohms p roduct s under any special or extraordinary environments or conditions . if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent v erification and confirmation of product performance, reliability, etc, pri or to use, must be necessary : [a] use of our products in any types of liquid, including water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the p roducts are exposed to direct sunlight or dust [c] use of our prod ucts in places where the p roducts are exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the p roducts are exposed to static electricity or electromagnetic waves [e] use of our products in p roximity to heat - producing components, plastic cords, or other flammable items [f] s ealing or coating our p roducts with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no - clean type fluxes, cleanin g residue of flux is recommended); or washing our products by using water or water - soluble cleaning agents for cleaning residue after soldering [h] use of the p roducts in places subject to dew condensation 4 . the p roducts are not subject to radiation - proo f design . 5 . please verify and confirm characteristics of the final or mounted products in using the products. 6 . in particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of pe rformance characteristics after on - board mounting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating under steady - state loading condition may negatively affect product performance and reliability. 7 . de - rate power dissipation d epending on a mbient temperature . when used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8 . confirm that operation temperature is within the specified range described in the product specification. 9 . rohm shall not be in any way responsible or liable for f ailure induced under devian t condition from what is defined in this document . precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used on a surface - mount products, the flow soldering method must be used on a through hole mount products. i f the flow soldering method is preferred on a surface - mount products , please consult with the roh m representative in advance. for details , please refer to rohm mounting specification
notice - p ga - e rev.00 3 ? 201 5 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, please allow a sufficient margin considerin g variations of the characteristics of the p roducts and external components, including transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and associated data and information contained in t his document are presented only as guidance for products use . therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in t his document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this p roduct is e lectrostatic sensitive product, which may be damaged due to e lectrostatic discharge. please take proper caution in your manufacturing process and stor age so that voltage exceeding the product s maximum rating will not be applied to p roducts. please take special care under dry condition (e .g. grounding of human body / equipment / solder iron, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate if the p roducts are stored in the places where : [a] the p roducts are exposed to sea winds or corrosive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm solderability before using p roducts of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excess ive stress applied when dropping of a carton. 4. use p roducts within the specified time after opening a humidity barrier bag. baking is required before using p roducts of which storage time is exceeding the recommended storage time period . precaution for p roduct l abel a two - dimensional barcode printed on rohm p roduct s label is for rohm s internal use only . precaution for d isposition when disposing p roducts please dispose them properly using a n authorized industry waste company. precaution for foreign e xchange and foreign t rade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information an d data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party reg arding such information or data. 2. rohm shall not have any obligations where the claims, actions or demands arising from the combination of the products with other articles such as components, circuits, systems or external equipment (including software). 3. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the products or the information contained in this document. provided, however, that rohm will not assert it s intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the products, subject to the terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whole or in part, without prior written consent of rohm. 2. the products may not be disassemble d, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. i n no event shall you use in any way whatso ever the products and the related technical information contained in the products or this document for any military purposes , including but not limited to, the development of mass - destruction weapons . 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties.
datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information.
datasheet part number BD9409F package sop16 unit quantity 2000 minimum package quantity 2000 packing type taping constitution materials list inquiry rohs yes BD9409F - web page distribution inventory

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