View MP2315SGJ_8946332.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

mp2315s 3a, 24v, 500khz, high-efficiency, synchronous, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 1 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. the future of analog ic technology the future of analog ic technology description the mp2315s is a high-efficiency, synchronous, rectified, step-down, switch mode converter with built-in, internal power mosfets. it is a next generation of the mp2315. it offers a very compact solution to achieve 3a continuous output current over a wide input supply range with excellent load and line regulation. the mp2315s uses synchronous mode operation for higher efficiency over the output current-load range. current mode operation provides fast transient response and eases loop stabilization. full protection features include over-current protection (ocp), over-voltage protection (ovp), and thermal shutdown. the mp2315s requires a minimal number of readily available, standard, external components and is available in a compact tsot23-8 package. features ? wide 4.5v to 24v operating input range ? 3a load current ? 110m ? /55m ? low r ds(on) internal power mosfets ? low quiescent current ? high-efficiency synchronous mode operation ? fixed 500khz switching frequency ? aam power save mode ? internal soft start ? output over-voltage protection (ovp) ? over-current protection (ocp) and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in a tsot23-8 package applications ? notebook systems and i/o power ? digital set-top boxes ? flat panel television and monitors all mps parts are lead-free, halogen-free, and adhere to the rohs directive. for mps green status, pleas e visit the mps website under qualit y assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 10.00
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 2 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. ordering information part number* package top marking MP2315SGJ tsot23-8 see below * for tape & reel, add suffix ?z (e.g. MP2315SGJ?z) top marking aqt: product code y: year code package reference top view tsot23-8 absolute maxi mum ratings (1) v in .................................................-0.3v to +26v v sw ..... -0.3v (-5v < 10ns) to +28v (30v < 10ns) v bst ...................................................... v sw + 6v all other pins ........................... -0.3v to +5.5v (2) continuous power dissipation (t a = +25c) (3) ... ................................................................. 1.25w junction temperature ................................150c lead temperature .....................................260c storage temperature .................. -65c to 150c recommended operating conditions (4) supply voltage (v in ) ........................... 4.5 to 24v output voltage (v out )..............0.8v to v in * d max operating junction temp (t j ). ... -40c to +125c thermal resistance (5) ja jc tsot23-8 ???????....? ..100?..55...c/w notes: 1) exceeding these ratings may damage the device. 2) for details on en?s abs max rating, please refer to the enable control section on page 9. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 3 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. electrical characteristics v in = 12v, t j = -40c to +125c. (6) typical value is tested at t j = +25c, unless otherwise noted. parameter symbol condition min typ max units supply current (shutdown) i in v en = 0v, t j = 25c 1 a supply current (quiescent) i q v en = 2v, v fb = 0.85v, aam = 0.4v 120 a hs switch on resistance hs rds-on v bst-sw = 5v 110 m ? ls switch on resistance ls rds-on v cc = 5v 55 m ? switch leakage sw lkg v en = 0v, v sw = 12v, t j = 25c 1 a current limit i limit duty cycle = 40% 4.5 5.5 6.5 a oscillator frequency f sw v fb = 750mv 400 500 600 khz foldback frequency f fb v fb = 200mv 0.5 f sw maximum duty cycle d max v fb = 750mv 90 95 % minimum on time (7) t on_min 60 ns feedback voltage v fb 783 791 800 mv feedback current i fb v fb = 820mv 10 50 na en rising threshold v en_rising 1.26 1.4 1.54 v en hysteresis v en_hys 150 mv v en = 2v 1 2 3 a en input current i en v en = 0 0 50 na en turn-off delay en td-off 5 9 13 s v in under-voltage lockout threshold rising inuv vth 3.85 4.05 4.25 v v in under-voltage lockout threshold hysteresis inuv hys 600 750 900 mv vcc regulator v cc 4.85 5.1 5.35 v vcc load regulation i cc = 5ma 1.5 % soft-start period t ss 10% to 90% 0.8 1.5 2.2 ms thermal shutdown (7) t sd 150 oc thermal hysteresis (7) t hys 20 oc aam source current i aam 6.7 a ovp rising threshold ov h _ rise fb voltage 115% 120% 125% vref ovp falling threshold ov l _ fall fb voltage 104% 109% 114% vref ovp delay (7) ov dey 2 s notes: 6) not tested in production. guaranteed by over-temperature correlation. 7) guarantee by engineering sample characterization.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 4 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical characteristics v in = 19v, v out = 5v, l = 4.9 h, t a = 25c, unless otherwise noted. 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 10.00 60 65 70 75 80 85 90 95 100 0.01 0.10 1.00 10.00 0.01 0.10 1.00 10.00 50 55 60 65 70 75 80 85 90 95 100 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 6 8 10 12 14 16 18 20 22 24 0 10 20 30 40 50 60 70 80 90 100 100 110 120 130 140 150 4 8 12 16 20 24 0 50 100 150 200 4 8 12 16 20 24 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 0123 5 5.2 5.4 5.6 5.8 6 0 10 20 30 40 50 60 1 1.5 2 2.5 3
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 5 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical performance characteristics v in = 19v, v out = 5v, l = 4.9 h, t a = 25c, unless otherwise noted. v out 2v/div. v sw 10v/div. v in 10v/div. i inductor 2a/div. v out 2v/div. v sw 10v/div. v in 5v/div. i inductor 2a/div. v out 2v/div. v sw 5v/div. v in 5v/div. i inductor 5a/div. v out 2v/div. v sw 20v/div. v en 5v/div. i inductor 2a/div. v out 2v/div. v sw 20v/div. v en 5v/div. i inductor 5a/div. v out 2v/div. v sw 20v/div. v en 5v/div. i inductor 5a/div. v out /ac 50mv/div. v sw 20v/div. v in /ac 100mv/div. i inductor 2a/div. v out 2v/div. v sw 20v/div. v en 5v/div. i inductor 2a/div. v out 2v/div. v sw 10v/div. v in 10v/div. i inductor 5a/div.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 6 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical performanc e characteristics (continued) v in = 19v, v out = 5v, l = 4.9 h, t a = 25c, unless otherwise noted. v out 200mv/div. i out 2a/div. v out /ac 20mv/div. v sw 20v/div. v in /ac 200mv/div. i inductor 2a/div. v out 2v/div. v sw 20v/div. i inductor 5a/div. v out 2v/div. v sw 20v/div. i inductor 5a/div. -60 -40 -20 0 20 40 60 1000 10000 100000 1000000 -180 -120 -60 0 60 120 180
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 7 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. pin functions pin # name description 1 aam advanced asynchronous modulation. connect aam to a voltage supply through a resistor divider to force the mp2315s into non-synchronous mode under light-load conditions. tie aam to vcc or leave aam floating to disable aam mode and force the mp2315s into ccm. 2 in supply voltage. the mp2315s operates with a 4.5v to 24v input rail. c1 is needed to decouple the input rail. connect using a wide pcb trace. 3 sw switch output. connect using a wide pcb trace. 4 gnd system ground. gnd is the reference ground of the regulated output voltage. gnd requires special consideration during pcb layout. connect gnd with copper traces and vias. 5 bst bootstrap. a capacitor and a resistor are required between sw and bst to form a floating supply across the high-side switch driver. 6 en enable. drive en high to enable the mp2315s. 7 vcc internal bias supply, internal 5.1v ldo output. decouple vcc with a 0.1 f - 0.22 f capacitor. the capacitance should be no more than 0.22 f. 8 fb feedback. connect fb to the tap of an external resistor divider from the output to gnd to set the output voltage. the frequency fo ldback comparator lowers the oscillator frequency when the fb voltage is below 400mv to prevent current-limit runaway during a short-circuit fault condition.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 8 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. block diagram figure 1: functional block diagram
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 9 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. operation the mp2315s is a high-efficiency, synchronous, rectified, step-down, switch mode converter with built-in internal power mosfets. it offers a very compact solution that achieves 3a of continuous output current with excellent load and line regulation over a wide input supply range. when the mp2315s operates in a fixed frequency, the peak-current control mode regulates the output voltage. a pulse width modulation (pwm) cycle is initiated by the internal clock. the integrated high-side power mosfet (hs-fet) turns on and remains on until its current reaches the value set by the comp voltage (v comp ). when the power switch is off, it remains off until the next clock cycle begins. if the current in the power mosfet does not reach the comp set current value within 95% of one pwm period, the power mosfet is forced off. internal regulator most of the internal circuitries are powered by the 5.1v internal regulator. this regulator takes the v in input and operates in the full v in range. when v in is greater than 5.1v, the output of the regulator is in full regulation. when v in drops below 5.1v, the output decreases. a 0.1f ceramic capacitor is required for decoupling. error amplifier (ea) the error amplifier compares the fb voltage with the internal 0.791v reference (ref) and outputs a comp voltage which is used to control the power mosfet current. the optimized internal compensation network minimizes the external component count and simplifies the control loop design. aam operation the mp2315s uses advanced asynchronous modulation (aam) power save mode in light load. set the aam voltage with the tap of an external resistor divider from vcc to gnd. under heavy-load conditions, v comp is higher than v aam . when the clock goes low, the hs- fet turns on and remains on until v ilsense reaches the value set by v comp . the internal clock resets whenever v comp is higher than v aam . under light-load conditions, the value of v comp is low. when v comp is less than v aam , and v fb is less than v ref , v comp ramps up until it exceeds v aam . during this time, the internal clock is blocked, and the mp2315s skips some pulses for pulse frequency modulation (pfm) mode and achieves a light-load power save. figure 2: simplified aam control logic enable control (en) enable (en) is a digital control that turns the regulator on and off. drive en high to turn on the regulator; drive en low to turn off the regulator. an internal 1m ? resistor from en to gnd allows en to be floated to shut down the chip. en is clamped internally using a 5.6v series zener diode. connect the en input through a pull-up resistor to the voltage on v in to limit the en input current below 100a. for example, with 19v connected to v in , r pullup (19v - 5.6v) 100a = 134k ? . connecting en directly to a voltage source without a pull-up resistor requires limiting the amplitude of the voltage source below 5.5v to prevent damage to the zener diode. under-voltage lockout (uvlo) under-voltage lockout (uvlo) is implemented to prevent the chip from operating at an insufficient supply voltage. the mp2315s uvlo comparator monitors the output voltage of the internal regulator (vcc). the uvlo rising threshold is about 4.05v, while its falling threshold is 3.3v. internal soft-start (ss) the soft start (ss) is implemented to prevent the converter output voltage from overshooting during start-up. when the chip starts up, the internal circuitry generates a soft-start voltage that ramps up from 0v. the soft-start period lasts until the voltage on the soft-start capacitor exceeds the reference voltage of 0.791v. at this point, the reference voltage takes over. the soft-start time is internally set to around 1.5ms.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 10 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. output over-voltage protection (ovp) the mp2315s monitors the fb voltage to detect output over-voltage. when the fb voltage rises higher than 120% of the reference voltage, the mp2315s enters a dynamic regulation period. during this period, the ic forces the low-side mosfet (ls-fet) on until a -800ma negative current limit is achieved. this discharges the output to keep it within the normal range. the mp2315s exits dynamic regulation when fb falls below 109% of the reference voltage. over-current protection (ocp) and hiccup the mp2315s uses a cycle-by-cycle over- current limit when the inductor current peak value exceeds the set current-limit threshold. the output voltage begins dropping until fb is below the under-voltage (uv) threshold, typically 50% below the reference. once uv is triggered, the mp2315s enters hiccup mode to restart the part periodically. this protection mode is especially useful when the output is dead-shorted to ground. the average short- circuit current is reduced greatly to alleviate the thermal issue and protect the regulator. the mp2315s exits hiccup mode once the over- current condition is removed. pre-bias start-up the mp2315s is designed for monotonic start- up into pre-biased loads. if the output is pre- biased to a certain voltage during start-up, the bst voltage is refreshed and charged, and the voltage on the soft-start capacitor is charged as well. if the bst voltage exceeds its rising threshold voltage, and the soft-start capacitor voltage exceeds the sensed output voltage at fb, the part begins working normally. thermal shutdown thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. when the silicon die temperature is higher than 150c, the entire chip shuts down. when the temperature is lower than its lower threshold, typically 130c, the chip is enabled again. floating driver and bootstrap charging the floating power mosfet driver is powered by an external bootstrap capacitor. this floating driver has its own uvlo protection with a rising threshold of 2.2v and a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, r3, c3, l1, and c2 (see figure 3). if v in - v sw is more than 5v, u2 regulates m3 to maintain a 5v bst voltage across c3. figure 3: internal bootstrap charging circuit start-up and shutdown if both v in and en are higher than their appropriate thresholds, the chip starts up. the reference block starts first, generating a stable reference voltage and current. the internal regulator is then enabled. the regulator provides a stable supply for the remaining circuitries. three events can shut down the chip: en low, v in low, and thermal shutdown. in the shutdown procedure, the signaling path is blocked first to prevent any fault triggering. v comp and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command. 3 r 3
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 11 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. application information setting the output voltage an external resistor divider is used to set the output voltage. the feedback resistor (r1) also sets the feedback loop bandwidth with the internal compensation capacitor (see typical application on page 1). r2 can then be calculated with equation (1): 1 0.791v v r1 r2 out ? = (1) the t-type network is highly recommended (see figure 4). fb 8 rt r2 r1 vout figure 4: t-type network table 1 lists the recommended t-type resistor values for common output voltages. table 1: resistor selection for common output voltages (8) v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) 1.05 20.5 62 100 1.2 20.5 39.2 75 1.8 40.2 31.6 59 2.5 40.2 18.7 40.2 3.3 40.2 12.7 33 5 40.2 7.5 20 note: 8) the recommended parameters are based on a 44f output capacitor. a different input volt age, output inductor value, and output capacitor value may affect the selection of r1, r2, and rt. for additional component parameters, please refer to the typical application circuits section on pages 15 and 16. selecting the inductor a 1h to 10h inductor with a dc current rating at least 25% percent higher than the maximum load current is recommended for most applications. for the highest efficiency, the inductor dc resistance should be less than 20m ? . for most designs, the inductance value can be derived using equation (2): out in out 1 in l osc v(vv) l vif ? = (2) where i l is the inductor ripple current. choose the inductor current to be approximately 40% of the maximum load current. the maximum inductor peak current can be calculated with equation (3): 2 i i i l load ) max ( l + = (3) under light-load conditions below 100ma, a larger inductance is recommended for better efficiency. setting the aam voltage the aam voltage is used to set the transition point from aam to pwm. it should be chosen to provide the best combination of efficiency, stability, ripple, and transient. if the aam voltage is set low, then the stability and ripple improve, but aam mode and transient efficiency degrade. likewise, if the aam voltage is set high, then aam mode and transient efficiency improves, but the stability and ripple degrade. adjust the aam threshold by connecting divider resistors from vcc to gnd. note that there is a 6.7a current source at aam (see figure 5). figure 5: aam network generally, v aam can be calculated with equation (4): 54 aam 45 r(vcc6.7 a r) v rr + = + (4) r5 should be no larger than 20k.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 12 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. the optimized aam can be found in figure 6. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 02468 figure 6: aam selection for common output voltages (v in = 4.5v - 24v) selecting the input capacitor the input current to the step-down converter is discontinuous and therefore requires a capacitor to supply ac current to the step-down converter while maintaining the dc input voltage. use low esr capacitors for best performance. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most applications, a 22f capacitor is sufficient. since the input capacitor (c1) absorbs the input switching current, it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated with equation (5): ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i (5) the worst-case condition occurs at vin = 2vout, shown in equation (6): 2 i i load 1 c = (6) for simplification, choose an input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum, or ceramic. when using electrolytic or tantalum capacitors, a small, high-quality ceramic capacitor (i.e.: 0.1 f) should be placed as close to the ic as possible. when using ceramic capacitors, ensure that they have enough capacitance to a provide sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by the capacitance can be estimated with equation (7): load out out in in sin iv v v1 fc1v v ?? = ? ?? ?? (7) selecting the output capacitor the output capacitor (c2) is required to maintain the dc output voltage. ceramic, tantalum, or low esr electrolytic capacitors are recommended. low esr capacitors are recommended to keep the output voltage ripple low. the output voltage ripple can be estimated with equation (8): out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? = ? + ?? ?? ?? ?? (8) where l 1 is the inductor value and r esr is the equivalent series resistance (esr) value of the output capacitor. for ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated with equation (9): out out out 2 in s1 vv v1 v 8f l c2 ?? =? ?? ?? (9) in the case of tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated with equation (10): out out out esr in s1 vv v1r fl v ?? =? ?? ?? (10) the characteristics of the output capacitor also affect the stability of the regulation system. the mp2315s can be optimized for a wide range of capacitance and esr values. external bootstrap diode an external bootstrap diode may enhance the efficiency of the regulator. the applicable conditions of the external bst diode are: ? v out is 5v or 3.3v ? duty cycle is high: d = in out v v > 65%
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 13 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. in these cases, an external bst diode is recommended from vcc to bst (see figure 7). figure 7: add optional external bootstrap diode to enhance efficiency the recommended external bst diode is 1n4148, and the recommended bst capacitor is 0.1 - 1 f. pcb layout guidelines (9) efficient pcb layout is critical for stable operation. for best results, refer to figure 8 and follow the guidelines below: 1. keep the connection of the input ground and gnd as short and wide as possible. 2. keep the connection of the input capacitor and in as short and wide as possible. 3. place the vcc capacitor as close to vcc and gnd as possible. 4. make the trace length of vcc - vcc capacitor anode - vcc capacitor cathode - ic gnd as short as possible. 5. ensure that all feedback connections are short and direct. 6. place the feedback resistors and compensation components as close to the ic as possible. 7. route sw away from sensitive analog areas, such as fb. note: 9) the recommended layout is based on figure 9 on page 15. figure 8: sample board layout design example table 2 is a design example following the application guidelines for the specifications below: table 2: design example v in 19v v out 5v i o 3a the detailed application schematic is shown in figure 9. the typical performance and circuit waveforms are shown in the typical performance characteristics section. for more device applications, please refer to the related evaluation board datasheets.
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 14 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical application circuits figure 9: v in = 6.5v - 24v, v out = 5v, i out = 3a figure 10: v in = 4.5v - 24v, v out = 3.3v, i out = 3a figure 11: v in = 4.5v - 24v, v out = 2.5v, i out = 3a
mp2315s ? 3a, 24v, synchrono us, step-down converter mp2315s rev. 1.0 www.monolithicpower.com 15 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. figure 12: v in = 4.5v - 24v, v out = 1.8v, i out = 3a figure 13: v in = 4.5v - 24v, v out = 1.2v, i out = 3a figure 14: v in = 4.5v - 24v, v out = 1.05v, i out = 3a
mp2315s ? 3a, 24v, synchrono us, step-down converter notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp2315s rev. 1.0 www.monolithicpower.com 16 12/21/2015 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. package information tsot23-8 front view note: 1) all dimensions are in millimeters . 2) package length does not include mold flash, protrusion or gate burr . 3) package width does not include interlead flash or protrusion . 4) lead coplanarity (bottom of leads after forming) shall be 0.10 millimeters max. 5) jedec reference is mo -193, variation ba. 6) drawing is not to scale . 7) pin 1 is lower left pin when reading top mark from left to right, (see example top mark) top view recommended land pattern seating plane side view detail ''a'' see detail '' a'' iaaaa pin 1 id see note 7 example top mark

▲Up To Search▲

Price & Availability of MP2315SGJ

	To Download MP2315SGJ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .