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this is information on a product in full production. may 2016 docid029104 rev 1 1/40 VL53L0X world smallest time-of-flight ra nging and gesture detection sensor datasheet - production data features ? fully integrated miniature module ? 940nm laser vcsel ? vcsel driver ? ranging sensor with advanced embedded micro controller ? 4.4 x 2.4 x 1.0mm ? fast, accurate distance ranging ? measures absolute range up to 2m ? reported range is independent of the target reflectance ? operates in high infrared ambient light levels ? advanced embedded optical cross-talk compensation to simplify cover glass selection ? eye safe ? class 1 laser device compliant with latest standard iec 60825-1:2014 - 3 rd edition ? easy integration ? single reflowable component ? no additional optics ? single power supply ? i2c interface for device control and data transfer ? xshutdown (reset) and interrupt gpio ? programmable i2c address applications ? user detection for personal computers/ laptops/tablets and iot (energy saving). ? robotics (obstacle detection). ? white goods (hand detection in automatic faucets, soap dispensers etc...) ? 1d gesture recognition. ? laser assisted auto-focus. enhances and speeds-up camera af system performance, especially in difficult scenes (low light levels, low contrast) or fast moving video mode. description the VL53L0X is a new generation time-of-flight (tof) laser-ranging module housed in the smallest package on the market today, providing accurate distance measurement whatever the target reflectances unlike conventional technologies. it can measure absolute distances up to 2m, setting a new benchmark in ranging performance levels, opening the door to various new applications. the VL53L0X integrates a leading-edge spad array (single photon avalanche diodes) and embeds st?s second generation flightsense tm patented technology. the VL53L0X?s 940nm vcsel emitter (vertical cavity surface-emitting laser), is totally invisible to the human eye, coupled with internal physical infrared filters, it enables longer ranging distance, higher immunity to ambient light and better robustness to cover-glass optical cross-talk. www.st.com
contents VL53L0X 2/40 docid029104 rev 1 contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 technical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3 device pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.4 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 system functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 firmware state machine description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 customer manufacturing calibration flow . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.3.1 spad and temperature calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3.2 ranging offset calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.3.3 cross-talk calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.4 ranging operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5 ranging profiles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.6 ranging profile phases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.6.1 initialization and load calibration data phase . . . . . . . . . . . . . . . . . . . . . 14 2.6.2 ranging phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.6.3 digital housekeeping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.7 getting the data: interrupt or polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.8 device programming and control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.9 power sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.9.1 power up and boot sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.10 ranging sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3 control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 i 2 c interface - timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2 i 2 c interface - reference registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.2 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
docid029104 rev 1 3/40 VL53L0X contents 3 4.3 esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4 current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 max ranging distance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3 ranging accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3.1 standard deviation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3.2 range profile examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.3.3 ranging offset error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 laser safety considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8 packaging and labeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.1 product marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.2 inner box labeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.3 packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8.3.1 tape outline drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.4 pb-free solder reflow process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.5 handling and storage precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.5.1 shock precaution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.5.2 part handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.5.3 compression force . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.5.4 moisture sensitivity level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.6 storage temperature conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 9 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 10 acronyms and abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 11 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 12 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
list of tables VL53L0X 4/40 docid029104 rev 1 list of tables table 1. technical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. VL53L0X pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. i 2 c interface - timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 4. reference registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 5. 32-bit register example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 6. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 7. recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 8. esd performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 9. consumption at ambient temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 10. digital i/o electrical characteri stics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 11. max ranging capabilit ies with 33ms timing budget . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 12. ranging accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 13. range profiles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 14. ranging offset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 15. recommended solder profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 16. recommended storage conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 17. ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 18. acronyms and abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 19. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
docid029104 rev 1 5/40 VL53L0X list of figures 5 list of figures figure 1. VL53L0X block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. VL53L0X pinout (bottom view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. VL53L0X schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. VL53L0X system functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. firmware state machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. customer manufacturing calibration flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. range offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. cross-talk compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. typical initialization / ranging / housekeeping phases . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. power up and boot sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 11. power up and boot sequence with xshut not cont rolled . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 12. ranging sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 13. data transfer protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. VL53L0X i2c device address: 0x 52 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8 figure 15. VL53L0X data format (write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 16. VL53L0X data format (read) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. VL53L0X data format (sequential write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9 figure 18. VL53L0X data format (sequential read) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 figure 19. i 2 c timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 20. typical ranging (default mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 21. typical ranging - long range mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 22. outline drawing (page 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 23. outline drawing (page 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 24. outline drawing - with liner (page 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 25. class 1 laser product label . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 26. example of marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 27. tape outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 28. solder profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
overview VL53L0X 6/40 docid029104 rev 1 1 overview 1.1 technical specification 1.2 system block diagram figure 1. VL53L0X block diagram table 1. technical specification feature detail package optical lga12 size 4.40 x 2.40 x 1.00 mm operating voltage 2.6 to 3.5 v operating temperature: -20 to 70c infrared emitter 940 nm i 2 c up to 400 khz (fast mode) serial bus address: 0x52 9//;prgxoh 9//;vlolfrq 'hwhfwlrqduud\ 6lqjoh3krwrq $ydodqfkh'lrgh63$' 1rq9rodwloh 0hpru\ 520 5$0 0lfurfrqwuroohu $gydqfhg 5dqjlqj&ruh 9&6(/'ulyhu qp ,5 ,5 $9'' $9''9&6(/ $9669&6(/ ;6+87 *3,2 6&/ 6'$ *1'
docid029104 rev 1 7/40 VL53L0X overview 37 1.3 device pinout figure 2 shows the pinout of the VL53L0X (see also figure 22 ). figure 2. VL53L0X pinout (bottom view) table 2. VL53L0X pin description pin number signal name signal type signal description 1 avddvcsel supply vcsel supply, to be connected to main supply 2 avssvcsel ground vcsel ground, to be connected to main ground 3 gnd ground to be connected to main ground 4 gnd2 ground to be connected to main ground 5 xshut digital input xshutdown pin, active low 6 gnd3 ground to be connected to main ground 7 gpio1 digital output interrupt output. open drain output. 8 dnc digital input do not connect, must be left floating. 9sda digital input/output i 2 c serial data 10 scl digital input i 2 c serial clock input 11 avdd supply supply, to be connected to main supply 12 gnd4 ground to be connected to main ground $9''9&6(/ $9669&6(/ *1' *1' ;6+87 $9'' 6&/ 6'$ '1& *3,2 *1' *1'
overview VL53L0X 8/40 docid029104 rev 1 1.4 application schematic figure 3 shows the application schematic of the VL53L0X. figure 3. VL53L0X schematic note: capacitors on external supply avdd shou ld be placed as close as possible to the avddvcsel and avssvcsel module pins. note: external pull-up resistors values can be foun d in i2c-bus specificatio n. pull-up are typically fitted only once per bus, near the host. recommended values for pull-up resistors for an avdd of 2.8v and 400khz i 2 c clock would be 1.5k to 2k ohms. note: xshut pin must always be driven to avoi d leakage current. pull-up is needed if the host state is not known. xshut is needed to use hw standby mode (no i 2 c comm). note: xshut and gpio1 pull up recommended values are 10k ohms note: gpio1 to be left unconnected if not used 9//; ;6+87 *3,2 6'$ 6&/ +267 '1& $9''9&6(/ $9'' q) ?) $9'' $9669&6(/ *1' *1' *1' *1' ,29''
docid029104 rev 1 9/40 VL53L0X functional description 37 2 functional description 2.1 system functi onal description figure 4 shows the system level functional descrip tion. the host customer application is controlling the VL53L0X device using an api (application progr amming interface). the api is exposing to the customer applicatio n a set of high level functions that allows control of the VL53L0X firmware (fw) like initialization/calibrat ion, ranging start/stop, choice of accuracy, choice of ranging mode. the api is a turnkey solution, it consists of a set of c functions which enables fast development of end user applications, without th e complication of direct multiple register access. the api is structured in a way that it can be compiled on any kind of platform through a well isolated platform layer. the api package allows the user to ta ke full benefit of VL53L0X capabilities. a detailed description of the api is availabl e in the VL53L0X api user manual (separate document, docid029105). VL53L0X fw fully manages the hardware (hw) register accesses. section 2.2: firmware state machine description details the firmware state machine. figure 4. VL53L0X system functional description +267 &xvwrphu $ssolfdwlrq 9//; $3, 9//; ,& )lupzduh +dugzduh
functional description VL53L0X 10/40 docid029104 rev 1 2.2 firmware state machine description figure 5 shows the firmware state machine. figure 5. firmware state machine 5dqjh0rgh 3rzhu2ii +rvwuhpryhv$9'' +rvwdssolhv$9'' +z6wdqge\ +rvworzhuv;6+87 +rvwudlvhv;6+87 )z,qlwldo%rrw 6z6wdqge\ +rvwlqlwldwhv67$57 &rqwlqxrxv 5dqjh0hdv 1h[wvwduwvwduwv dxwrpdwlfdoo\diwhu wkhodvwkdvilqlvkhg 6lqjoh 5dqjh0hdv $xwrpdwlfpryhwr6:vwdqge\ 5dqjh0hdv ,qwhu0hdv 6wdqge\ ,qwhuphdvxuhphqw shulrgqrwfrpsohwhg &rqwlqxrxv7lphg +rvwlqlwldwhv6723
docid029104 rev 1 11/40 VL53L0X functional description 37 2.3 customer manufacturing calibration flow figure 6 shows the recommended calibration flow that should be applied at customer level, at factory, once only. this flow takes into account all parameters (cover glass, temperature & voltage) from the application. figure 6. customer manufacturing calibration flow 2.3.1 spad and temperature calibration in order to optimize the dynamic of the system, the reference spads have to be calibrated. reference spad calibration needs to be done only once during the initial manufacturing calibration, the calibration data sh ould then be stored on the host. temperature calibration is the calibration of tw o parameters (vhv and phase cal) which are temperature dependent. these two parameters are used to set the device sensitivity. calibration should be performed during init ial manufacturing calib ration, it must be performed again when temperature varies more than 8degc compared to the initial du????o]??]}v~?eu?? ]]v]?]o]?]}vv???]vp? ~?eu?? ^w?o]??]}v~?u?? k((??o]??]}v~??u?? ?}??dolo]??]}v~??? /v]?]oo]??]}vr??]?}vo?}vu z}???}??}?o?x o]??]}v????}???]?z e?p??u????zvpx /v]?]o]??]}vr ?}oo}v(??]??? dv(??]vp o]??]}v(o} ?wd]u]vp??p]v(}?]v(}?u?]}v}vo?u?z? v???v]vp}v?z,}???]o]?]?
functional description VL53L0X 12/40 docid029104 rev 1 calibration temperature. for more details on spad and temperature calibration please refer to the VL53L0X api user manual. 2.3.2 ranging offset calibration ranging offset can be characterized by the mean offset, which is the centering of the measurement versus the real distance. offset calibration should be performed at factory for optimal performances (recommended at 10cm). the offset calibration should take into account: ? supply voltage and temperature ? protective cover glass above VL53L0X module figure 7. range offset 2.3.3 cross-talk calibration cross-talk is defined as the signal return fr om the cover glass. the magnitude of the cross- talk depends on the type of glass and air gap. cross-talk results in a range error which is proportional to the ratio of the cross-talk to the signal return from the target. figure 8. cross-talk compensation full offset and cross-talk calibration procedure is described in the VL53L0X api user manual. actual range measured range p2p_offset calibration actual range measured range cross-talk compensation
docid029104 rev 1 13/40 VL53L0X functional description 37 2.4 ranging operating modes there are 3 ranging modes available in the api: 1. single ranging ranging is performed only once after the api function is called. system returns to sw standby automatically. 2. continuous ranging ranging is performed in a continuous way afte r the api function is called. as soon as the measurement is finished, anothe r one is started without delay. user has to stop the ranging to return to sw standby. the last measurement is completed before stopping. 3. timed ranging ranging is performed in a continuous way after the api function is called. when a measurement is finished, another one is started after a user defined delay. this delay (inter-measurement period) can be defined through the api. user has to stop the ranging to return to sw standby. if the stop request comes during a range measurement, the measurement is completed before stopping. if it happens during an in ter-measurement period, the range measurement stops immediately. 2.5 ranging profiles there are 4 different ranging profiles available via api example code. customers can create their own ranging profile dependent on their use case performance requirements. for more details please refer to the VL53L0X api user manual. 1. default mode 2. high speed 3. high accuracy 4. long range 2.6 ranging profile phases each range profile consists of 3 consecutive phases: ? initialization and load calibration data ? ranging ? digital housekeeping
functional description VL53L0X 14/40 docid029104 rev 1 figure 9. typical initialization / ranging / housekeeping phases 2.6.1 initialization and lo ad calibration data phase initialization and calibration phase is performed before the first ranging or after a device reset, see figure 9 . the user may then have to repeat the temper ature calibration phase in a periodic way, depending on the use case. for more details on the calibration functions pl ease refer to the vl53 l0x api user manual. 2.6.2 ranging phase the ranging phase consists of a r ange setup then range measurement. during the ranging operation, several vcsel infrared pulses are emitted, then reflected back by the target object, and detected by the receiving array. the photo detector used inside VL53L0X is using advanced ultra-fast spad technology (single photon avalanche diodes), protected by several patents. the typical timing budget for a range is 33ms (init/ranging/housekeeping), see figure 12 , with the actual range meas urement taking 23ms, see figure 9 . the minimum range measurement period is 8ms. >}o]??]}v?~?u?? /vo?~ ^?^wo]??]}vu ^?du?o]??]}vu ^?k((??o]??]}v? ^??}??r?olso zvp???~ ??u?? zvpu??uv?~ ???u?? ]p]?o??}??]vp~ ?x?u?? ]]v]?]o]?]}vv???]vp? ~?eu?? ?wd]u]vp??p]v(}?]v(}?u?]}v}vo?u?z? v???v]vp}v?z,}???]o]?]? /v]?]o]?]}vvo]??]}v ~?}oo(??] ??? zvp]vp ]p]?o z}?l?]vp
docid029104 rev 1 15/40 VL53L0X functional description 37 note: the minimum range timing budget is 20ms . maximum is 5 seconds. the longer the timing budget, the higher th e accuracy and th e ranging distance capability. 2.6.3 digital housekeeping digital processing (housekeeping) is the last operation inside the ranging sequence that computes, validates or rejects a ranging meas urement. part of this processing is performed internally while the other part is executed on the host by the api. at the end of the digital processing, the ranging distance is computed by VL53L0X itself. if the distance could not be measured (weak sign al, no target?), a corresponding error code is provided. the following functions are performed on the device itself: ? signal value check (weak signal) ? offset correction ? cross-talk correction (in case of cover glass) ? final ranging value computation while the api performs the following: ? return ignore threshold rit check (signal check versus cross talk) ? sigma check (accuracy condition) ? final ranging state computation if the user wants to enhance the ranging accuracy, some extra processing (not part of the api) can be carried out by the host, for example, rolling average, hyster esis or any kind of filtering. 2.7 getting the data: interrupt or polling user can get the final data using a polling or an interrupt mechanism. polling mode: user has to check the status of the ongoing measurement by polling an api function. interrupt mode: an in terrupt pin (gpio1) sends an interrupt to the host when a new measurement is available. the description of these 2 modes is ava ilable in the VL53L0X api user manual. 2.8 device programming and control device physical cont rol interface is i 2 c, described in section 3: control interface . a software layer (api) is provided to cont rol the device. the api is described in the VL53L0X api user manual.
functional description VL53L0X 16/40 docid029104 rev 1 2.9 power sequence 2.9.1 power up and boot sequence there are two options available for device power up/boot. option 1 : xshut pin connected and controlled from host. this option helps to optimize power consumption as the VL53L0X can be completely powered off when not used, and then woken up through host gpio (using xshut pin). hw standby mode is defined as the period when avdd is present and xshut is low. figure 10. power up and boot sequence t boot is 1.2ms max. option 2 : xshut pin not controlled by host, and tied to avdd through pull-up resistor. in case xshut pin is not controlled, the power up sequence is presented in figure 11 . in this case, the device is go ing automatically in sw stan dby after fw boot, without entering hw standby. figure 11. power up and boot sequence with xshut not controlled t boot is 1.2ms max.
docid029104 rev 1 17/40 VL53L0X functional description 37 2.10 ranging sequence figure 12. ranging sequence t timing_budget is a parameter set by the user, using a dedicated api function. default value is 33ms.
control interface VL53L0X 18/40 docid029104 rev 1 3 control interface this section specifies the control interface. the i 2 c interface uses two signals: serial data line (sda) and serial clock line (scl). each dev ice connected to the bu s is using a unique address and a simple master / slave relationships exists. both sda and scl lines are connected to a positive supply voltage using pull-up resistors located on the host. lines are only actively driven low. a high condition occurs when lines are floating and the pull-up resistors pull lines up . when no data is transmitted both lines are high. clock signal (scl) generation is performed by the master device. the master device initiates data transfer. the i 2 c bus on the VL53L0X has a maximum speed of 400 kbits/s and uses a device address of 0x52. figure 13. data transfer protocol information is packed in 8-bit packets (bytes) always followed by an acknowledge bit, ac for VL53L0X acknowledge and am for master ackn owledge (host bus master). the internal data is produced by sampling sda at a rising edge of scl. the external data must be stable during the high period of scl. the exceptions to this are start (s) or stop (p) conditions when sda falls or rises resp ectively, while scl is high. a message contains a series of bytes preceded by a start condition and followed by either a stop or repeated start (another start condit ion but without a preceding stop condition) followed by another message. the first byte c ontains the device address (0x52) and also specifies the data direction. if the least signifi cant bit is low (that is, 0x52) the message is a master write to the slave. if the lsb is set (tha t is, 0x53) then the message is a master read from the slave. figure 14. VL53L0X i2c device address: 0x52 all serial interface communications with th e camera module must begin with a start condition. the VL53L0X module acknowledges the receipt of a valid address by driving the sda wire low. the state of the read/write bit (lsb of the address byte) is stored and the next byte of data, sampled from sd a, can be interpreted. during a write sequence the second byte received provide a 8-bit index which points to one of the internal 8-bit registers. 12 7 8 ac/am start condition stop condition sda scl acknowledge p s 3 4 56 address or data byte msb lsb msbit lsbit 0101001r/w
docid029104 rev 1 19/40 VL53L0X control interface 37 figure 15. VL53L0X data format (write) as data is received by the slave it is written bit by bit to a serial/parallel register. after each data byte has been received by the slave, an acknowledge is generated, the data is then stored in the internal register addressed by the current index. during a read message, the contents of the register addressed by the current index is read out in the byte following the device address byte. the contents of this register are parallel loaded into the serial/parallel register and clocked out of t he device by the falling edge of scl. figure 16. VL53L0X data format (read) at the end of each byte, in both read and write message sequences, an acknowledge is issued by the receiving device (that is, the VL53L0X for a write and the host for a read). a message can only be terminated by the bus ma ster, either by issuing a stop condition or by a negative acknowledge (that is, not pulling the sda line low) after reading a complete byte during a read operation. the interface also supports auto-increment indexing. after the first data byte has been transferred, the index is automatically incremented by 1. the master can therefore send data bytes continuously to the slave until the slave fails to provide an acknowledge or the master terminates the write communication wi th a stop condition. if the auto-increment feature is used the master does not have to send address indexes to accompany the data bytes. figure 17. VL53L0X data format (sequential write) VL53L0X acknowledges acknowledge from VL53L0X s ac address[7:0] index[7:0] ac data[7:0] ac p 0x52 (write) start stop valid address s ac address[7:0] index[7:0] ac p 0x52 (write) s ac address[7:0] am data[7:0] p 0x53 (read) s ac address[7:0] index[7:0] ac 0x52 (write) p ac data[7:0] ac data[7:0] ac data[7:0]
control interface VL53L0X 20/40 docid029104 rev 1 figure 18. VL53L0X data format (sequential read) 3.1 i 2 c interface - timi ng characteristics timing characteristics are shown in table 3 . please refer to figure 19 for an explanation of the parameters used. timings are given for all pvt conditions. s ac address[7:0] index[7:0] ac p 0x52 (write) s ac address[7:0] am data[7:0] p 0x53 (read) am data[7:0] am data[7:0] am data[7:0] am data[7:0] table 3. i 2 c interface - timing characteristics symbol parameter minimum typical maximum unit f i2c operating frequency (standard and fast mode) 0-400 (1) 1. the maximum bus speed is also limited by the comb ination of 400pf load capaci tance and pull-up resistor. please refer to the i 2 c specification for further information. khz t low clock pulse width low 1.3 - - s t high clock pulse width high 0.6 - - s t sp pulse width of spikes which are suppressed by the input filter - - 50 ns t buf bus free time between transmissions 1.3 - - ms t hd.sta start hold time 0.26 - - s t su.sta start set-up time 0.26 - - s t hd.dat data in hold time 0 - 0.9 s t su.dat data in set-up time 50 - - ns t r scl/sda rise time - - 120 ns t f scl/sda fall time - - 120 ns t su.sto stop set-up time 0.6 - - s ci/o input/output capacitance (sda) - - 10 pf cin input capacitance (scl) - - 4 pf c l load capacitance - 125 400 pf
docid029104 rev 1 21/40 VL53L0X control interface 37 figure 19. i 2 c timing characteristics all timings are measured from either v il or v ih . 3.2 i 2 c interface - re ference registers the registers shown in the table below can be used to validate the user i 2 c interface. note: i2c read/writes can be 8,16 or 32-bit. mult i-byte reads/writes ar e always addressed in ascending order with msb first as shown in table 5. sda scl t hd.sta t r t high t f t su.dat t hd.dat t su.sta t su.sto ... ... t hd.sta t low t buf stop start stop start v ih v il v ih v il table 4. reference registers address (after fresh reset, without api loaded) 0xc0 0xee 0xc1 0xaa 0xc2 0x10 0x51 0x0099 0x61 0x0000 table 5. 32-bit register example register address byte address msb address + 1 .. address + 2 .. address + 3 lsb
electrical characteristics VL53L0X 22/40 docid029104 rev 1 4 electrical characteristics 4.1 absolute maximum ratings note: stresses above those listed in table 6. may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sect ions of the specification is not implied. exposure to absolute maximum rating conditi ons for extended periods may affect device reliability. 4.2 recommended operating conditions 4.3 esd VL53L0X is compliant with esd values presented in table 8 table 6. absolute maximum ratings parameter min. typ. max. unit avdd -0.5 - 3.6 v scl, sda, xshut and gpio1 -0.5 - 3.6 v table 7. recommended operating conditions (1) 1. there are no power supply sequencing requirements. the i/os may be high, low or floating when avdd is applied. the i/os are internally failsa fe with no diode connecting them to avdd parameter min. typ. max. unit voltage (avdd) 2.6 2.8 3.5 v io (iovdd) (2) 2. xshut should be high level only when avdd is on. standard mode 1.6 1.8 1.9 v 2v8 mode (3)(4) 3. sda, scl, xshut and gpio1 high levels have to be equal to avdd in 2v8 mode. 4. the default api mode is 1v8. 2v8 mode is programmable using dev ice settings loaded by the api. for more details please refer to the VL53L0X api user manual. 2.6 2.8 3.5 v temperature (normal operating) -20 +70 c table 8. esd performances parameter specification conditions human body model js-001-2012 +/- 2kv, 1500 ohms, 100pf charged device model jzsd22-c101 +/- 500v
docid029104 rev 1 23/40 VL53L0X electrical characteristics 37 4.4 current consumption table 9. consumption at ambient temperature (1) 1. all current consumption values in clude silicon process variations. te mperature and voltage are at nominal conditions (23degc and 2.8v). all values include avdd and avddvcsel. parameter min. typ. max. unit hw standby 3 5 7 ua sw standby (2v8 mode) (2) 2. in standard mode (1v8), pull-ups have to be modi fied, then sw standby consumption is increased by +0.6ua. 469ua timed ranging inter measurement 16 ua active ranging average consumption (including vcsel) (3)(4) 3. active ranging is an average value, measured using default api settings (33ms timing budget). 4. peak current (including vcsel) can reach 40ma. 19 ma average power consumption at 10hz with 33ms ranging sequence 20 mw
electrical characteristics VL53L0X 24/40 docid029104 rev 1 4.5 electrical characteristics table 10. digital i/o el ectrical characteristics symbol parameter minimum typical maximum unit interrupt pin (gpio1) v il low level input voltage - - 0.3 iovdd v v ih high level input voltage 0.7 iovdd - - v v ol low level output voltage (i out = 4 ma) --0.4v v oh high level output voltage at (i out = 4 ma) iovdd- 0.4 --v f gpio operating frequency (c load = 20 pf) 0 - 108 mhz i 2 c interface (sda/scl) v il low level input voltage -0.5 - 0.6 v v ih high level input voltage 1.12 - iovdd+0.5 v v ol low level output voltage (i out = 4 ma in standard and fast modes) --0.4v i il / ih leakage current (1) 1. avdd = 0 v --10a leakage current (2) 2. avdd = 2.85 v; i/o voltage = 1.8 v - - 0.15 a
docid029104 rev 1 25/40 VL53L0X performance 37 5 performance 5.1 measurement conditions in all measurement tables in the document, it is considered that the full field of view (fov) is covered. VL53L0X system fov is 25degrees. reflectance targets are standard ones (grey 17% n4.74 and white 88% n9.5 munsell charts). unless mentioned, device is controlled through the api using the default settings (refer to VL53L0X api user manual fo r api settings description). figure 20. typical ranging (default mode) api_rangevalue (mm) vs. actual target distance (mm) reflectance grey17 white88 actual target distance (mm) 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 0 100 200 300 400 500 600 700 800 900 1000 1100 1200
performance VL53L0X 26/40 docid029104 rev 1 figure 21. typical ranging - long range mode 5.2 max ranging distance table 11 presents the ranging specification for VL53L0X bare module, without cover glass, at room temperature (23degreesc) and with nominal voltage (2.8volts). note (1): using long range api profile api_rangevalue (mm) vs. actual target distance (mm) reflectance grey17 white88 actual target distance (mm) 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 table 11. max ranging capabilities with 33ms timing budget target reflectance level (full fov) conditions indoor (2) outdoor overcast (2) white target (88%) typical 200cm+ (1) 80cm minimum 120cm 60cm grey target (17%) typical 80cm 50cm minimum 70cm 40cm
docid029104 rev 1 27/40 VL53L0X performance 37 note (2): ? indoor: no infrared ? outdoor overcast corresponds to a parasitic noise of 10kcps/spad for VL53L0X module. for reference, this corresponds to a 1.2w/m2 at 940nm, and is equivalent to 5klux daylight, while ranging on a grey 17% chart at 40cm measurement conditions: ? targets reflectance used : grey (17%), white (88%) ? nominal voltage (2.8v) and temperature (23degreesc) ? all distances are for a complete field of view covered (fov = 25degrees) ? 33ms timing budget all distances mentioned in this table are gua ranteed for a minimum detection rate of 94% (up to 100%). detection rate is the worst case percentage of measurements that will return a valid measurement when target is detected. 5.3 ranging accuracy 5.3.1 standard deviation ranging accuracy can be characterized by st andard deviation. it includes measure-to- measure and part-to-pa rt (silicon) dispersion. measurement conditions: ? targets reflectance used: grey (17%), white (88%) ? offset correction done at 10cm from sensor. ? indoor: no infrared / outdoor: eq. 5klux equivalent sunlight (10kcps/spad) ? nominal voltage (2v8) and temperature (23degreesc) ? all distances are for a complete field of view covered (fov = 25degrees) ? detection rate is considered at 94% minimum table 12. ranging accuracy indoor (no infrared ) outdoor target reflectance level (full fov) distance 33ms 66ms distance 33ms 66ms white target (88%) at 120cm 4% 3% at 60cm 7% 6% grey target (17%) at 70cm 7% 6% at 40cm 12% 9%
performance VL53L0X 28/40 docid029104 rev 1 5.3.2 range profile examples table 13 details typical performance for the four example ranging profiles, as per measurement conditions in section 5.3: ranging accuracy . 5.3.3 ranging offset error the table below shows how range offset may drift over distance, voltage and temperature. assumes offset calibrated at 10cm. see VL53L0X api user manual for details on offset calibration. table 13. range profiles range profile range timing budget typi cal performance typical application default mode 30ms 1.2m, accuracy as per table 12 standard high accuracy 200ms 1.2m, accuracy < +/- 3% precise measurement long range 33ms 2m, accuracy as per table 12 long ranging, only for dark conditions (no ir) high speed 20ms 1.2m, accuracy +/- 5% high speed where accuracy is not priority table 14. ranging offset nominal conditions measure point typical offset from nominal maximum offset from nominal ranging distance offset calibration at 10cm (?zero?) white 120cm (indoor) grey 70cm (indoor) white 60cm (outdoor) grey 40cm (outdoor) < 3% voltage drift 2.8v 2.6v to 3.5v +/- 10mm +/- 15mm temperature drift 23c -20c to +70c +/- 10mm +/- 30mm
docid029104 rev 1 29/40 VL53L0X outline drawing 37 6 outline drawing figure 22. outline drawing (page 1/3) ? ? 3,1 ,1326 ? ? ? $5($5(6(59(' )250$5.,1* 127(6 ',0(16,2166+2:1:,7+ $5(,163(&7,21',0(16,216 68%675$7(:,//$/:$<6%(,16,'(7+(02'8/(287/,1(',0(16,216 8163(&,),('5$',, 3:%62/'(53$77(51 &211(&7,217$%/( 3$' 1r )81&7,21 $9''9&6(/ $9669&6(/ *1' *1' ;6+87 *1' *3,2 '1& 6'$ 6&/ $9'' *1' 5(9,6,217$%/( 5(9 '(6&5,37,21 '$7( ,1,7,$/5(/($6( '5$:,1*7,7/(83'$7( $ % & ' ( ) $ % & ' ( ) 678$5752%(57621 $ % & ' ( ) $ % & ' ( ) 9//; /,1(502'8/( 287/,1('5$:,1* 2) )(% $ % & ' ( ) $ % & ' ( ) /lqhdu 3odfh'hflpdov? 3odfh'hflpdov? 3odfh'hflpdov? $qjxodu?ghjuhhv 'ldphwhu 3rvlwlrq 6xuidfh)lqlvkplfurqv $ % & ' ( ) $ % & ' ( ) $ % & ' ( ) $ % & ' ( ) 6fdoh ,qwhusuhwgudzlqjshu%6 5'$qjoh3urmhfwlrq $ % & ' ( ) $ % & ' ( ) 6khhw 7lwoh 0dwhuldo )lqlvk 7rohudqfhvxqohvvrwkhuzlvhvwdwhg 'udzq 'dwh 3duw1r $ooglphqvlrqv lqpp 'r1rw6fdoh 670lfurhohfwurqlfv ,pdjlqj'lylvlrq '0
outline drawing VL53L0X 30/40 docid029104 rev 1 figure 23. outline drawing (page 2/3) ? ? 2)&21( $7'$780
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docid029104 rev 1 31/40 VL53L0X outline drawing 37 figure 24. outline drawing - with liner (page 3/3) 5 ,1326 ? ? 3527(&7,9(/,1(5 6&$/( '(/,9(5('&21),*85$7,21 5(9 $ % & ' ( ) $ % & ' ( ) 678$5752%(57621 $ % & ' ( ) $ % & ' ( ) 2) $ % & ' ( ) $ % & ' ( ) /lqhdu 3odfh'hflpdov? 3odfh'hflpdov? 3odfh'hflpdov? $qjxodu?ghjuhhv 'ldphwhu 3rvlwlrq 6xuidfh)lqlvkplfurqv $ % & ' ( ) $ % & ' ( ) $ % & ' ( ) $ % & ' ( ) 6fdoh ,qwhusuhwgudzlqjshu%6 5'$qjoh3urmhfwlrq $ % & ' ( ) $ % & ' ( ) 6khhw 7lwoh 0dwhuldo )lqlvk 7rohudqfhvxqohvvrwkhuzlvhvwdwhg 'udzq 'dwh 3duw1r $ooglphqvlrqv lqpp 'r1rw6fdoh 670lfurhohfwurqlfv ,pdjlqj'lylvlrq 9//; /,1(502'8/( 287/,1('5$:,1* '0 )(%
laser safety considerations VL53L0X 32/40 docid029104 rev 1 7 laser safety considerations the VL53L0X contains a laser emitter and corresponding drive circuitry. the laser output is designed to remain within class 1 laser safety limits under all reasonably foreseeable conditions including single faults in compliance with iec 60825-1:2014 (third edition). the laser output will remain within class 1 lim its as long as the stmicroelectronics recommended device settings (api settings) are used and the operating conditions specified are respected. the laser output power must not be increased by any means and no optics should be used with the intention of focusing the laser beam. caution: use of controls or adjustments or performa nce of procedures other than those specified herein may result in hazardous radiation exposure. figure 25. class 1 laser product label
docid029104 rev 1 33/40 VL53L0X packaging and labeling 37 8 packaging and labeling 8.1 product marking a 2-line product marking is applied on the backside of the module (i.e. on the substrate). the first line is the silicon product code, and the second line, the internal tracking code. figure 26. example of marking 8.2 inner box labeling the labeling follows the st standar d packing acceptance specification. the following information will be on the inner box label: ? assembly site ? sales type ? quantity ? trace code ? marking ? bulk id number 8.3 packing at customer / subcontractor level, it is recommended to mount theVL53L0X in a clean environment to avoid foreign material deposition. to help avoid any foreign mate rial contamination at phone assembly level the modules will be shipped in a tape and reel format with a protec tive liner. the packaging will be vacuum- sealed and include a desiccant. the liner is compliant with reflow at 260c. it must be removed during assembly of the customer device, just before mounting the cover glass.
packaging and labeling VL53L0X 34/40 docid029104 rev 1 8.3.1 tape outline drawings figure 27. tape outline drawing 8.4 pb-free solder reflow process figure 28 and table 15 shows the recommended and maximum values for the solder profile. customers will have to tune the reflow profile depending on the pcb, solder paste and material used. we expect customers to follow the ?recommended? reflow profile, which is specifically tuned for VL53L0X package. for any reason if a customer must perform a reflow profile which is different from ?recommended? one (especially peak >240c), this new profile must be qualified by the customer at its own risk. in any case, the profile have to be within the ?maximum? profile limit described in table 15 . pin 1
docid029104 rev 1 35/40 VL53L0X packaging and labeling 37 table 15. recommended solder profile figure 28. solder profile note: temperature mentioned in table 15 is measured at the top of VL53L0X package. note: the component should be limited to a maximum of 3 passes through this solder profile. 8.5 handling and storage precautions 8.5.1 shock precaution proximity sensor modules house numerous internal components that are susceptible to shock damage. if a unit is subj ect to excessive shock, is dropped onto the floor, or a tray/reel of units is dropped onto the floor, it must be rejected, even if no apparent damage is visible. parameters recommended maximum units minimum temperature (t s min) maximum temperature (t s max) time t s (t s min to t s max) 130 200 90-110 150 200 60 - 120 c c seconds temperature (t l ) time (t l ) ramp up 217 55-65 +2 217 55 - 65 +3 c seconds c/second temperature (t p-10 ) time (t p-10 ) ramp up - - - 250 10 +3 c seconds c/second peak temperature (tp) 240 260 max c time to peak 300 300 seconds ramp down (peak to t l ) -4 -6 c/second
packaging and labeling VL53L0X 36/40 docid029104 rev 1 8.5.2 part handling handling must be done with non-marring esd safe carbon, plastic, or teflon tweezers. ranging module are susceptible to damage or contamination. a clean assembly process is advised at customer after un-taping the parts, and until a protective cover glass is mounted. 8.5.3 compression force a maximum compressive load of 25n shall be applied on the module. 8.5.4 moisture sensitivity level moisture sensitivity is level 3 (msl) as described in ipc/jedec jstd-020-c 8.6 storage temper ature conditions table 16. recommended storage conditions parameter min. typ. max. unit temperature (storage) -40 +85 c
docid029104 rev 1 37/40 VL53L0X ordering information 37 9 ordering information 10 acronyms and abbreviations table 17. ordering information sales type package packing vl53l0cxv0dh/1 optical lga12 with liner tape and reel table 18. acronyms and abbreviations acronym/ abbreviation definition esd electrostatic discharge i 2 c inter-integrated circuit (serial bus) nvm non volatile memory rit return ignore threshold spad single photon avalanche diode vcsel vertical cavity surface emitting laser
ecopack ? VL53L0X 38/40 docid029104 rev 1 11 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark.
docid029104 rev 1 39/40 VL53L0X revision history 39 12 revision history table 19. document revision history date revision changes 30-may-2016 1.0 initial release.
VL53L0X 40/40 docid029104 rev 1 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics ? all rights reserved

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