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up to 600 v to load v cc v b v s ho lo com hin v ss lin v cc v ss lin hin v cc v b v s ho lo com hin lin up to 600 v to load v cc lin hin data sheet no. pd60262 typical connection high and low side driver features floating channel designed for bootstrap operation fully operational to +600 v tolerant to negative transient voltage, dv/dt immune gate drive supply range from 10 v to 20 v undervoltage lockout for both channels 3.3 v and 5 v input logic compatible matched propagation delay for both channels logic and power ground +/- 5 v offset lower di/dt gate driver for better noise immunity output source/sink current capability 1.4 a/1.8 a rohs compliant irs21814 irs2181 irs2181/irs21814(s)pbf www.irf.com 1 (refer to lead assignments for correct pin configuration). these diagrams show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. description the irs2181/irs21814 are high voltage, high speed power mosfet and igbt drivers with independent high-side and low-side referenced output channels. proprietary hvic and latch immune cmos technolo- gies enable ruggedized monolithic construction. the logic input is com- patible with standard cmos or lsttl output, down to 3.3 v logic. the output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high-side configuration which operates up to 600 v. packages 8-lead pdip irs2181 14-lead soic irs21814s 2181 com 21814 hin/lin no none v ss /com 180/220 2183 internal 400 com 21834 hin/lin yes program 400-5000 v ss/ com 180/220 2184 internal 400 com 21844 in/sd yes program 400-5000 v ss /com 680/270 14-lead pdip irs21814 feature comparison part input logic cross- conduction prevention logic deadtime (ns) ground pins t on /t off (ns) 8-lead soic irs2181s
irs2181/irs21814(s)pbf www.irf.com 2 symbol definition min. max. units v b high-side floating absolute voltage -0.3 620 (note 1) v s high-side floating supply offset voltage v b - 20 v b + 0.3 v ho high-side floating output voltage v s - 0.3 v b + 0.3 v cc low-side and logic fixed supply voltage -0.3 20 (note 1) v lo low-side output voltage -0.3 v cc + 0.3 v in logic input voltage (hin & lin) v ss - 0.3 v cc + 0.3 v ss logic ground (irs21814 only) v cc - 20 v cc + 0.3 dv s /dt allowable offset supply voltage transient ? 50 v/ns (8-lead pdip) ? 1.0 p d package power dissipation @ t a +25 c (8-lead soic) ? 0.625 (14-lead pdip) ? 1.6 (14-lead soic) ? 1.0 (8-lead pdip) ? 125 rth ja thermal resistance, junction to ambient (8-lead soic) ? 200 (14-lead pdip) ? 75 (14-lead soic) ? 120 t j junction temperature ? 150 t s storage temperature -50 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c/w w c note 2: logic operational for v s of -5 v to +600 v. logic state held for v s of -5 v to -v bs . (please refer to the design tip dt97-3 for more details). vb high-side floating supply absolute voltage v s + 10 v s + 20 v s high-side floating supply offset voltage note 2 600 v ho high-side floating output voltage v s v b v cc low-side and logic fixed supply voltage 10 20 v lo low-side output voltage 0 v cc v in logic input voltage (hin & lin) v ss v cc v ss logic ground (irs21814 only) -5 5 t a ambient temperature -40 125 c v symbol definition min. max. units recommended operating conditions the input/output logic timing diagram is shown in fig. 1. for proper operation the device should be used within the recommended conditions. the v s and v ss offset rating are tested with all supplies biased at a 15 v differential. note 1: all supplies are fully tested at 25 v and an internal 20 v clamp exists for each supply. irs2181/irs21814(s)pbf www.irf.com 3 dynamic electrical characteristics v bias (v cc , v bs ) = 15 v, v ss = com, c l = 1000 pf, t a = 25 c . symbol definition min. typ. max. units test conditions t on turn-on propagation delay 180 270 v s = 0 v t off turn-off propagation delay 220 330 v s = 0 v or 600 v mt delay matching, hs & ls turn-on/off 0 35 t r turn-on rise time 40 60 t f turn-off fall time 20 35 ns static electrical characteristics v bias (v cc , v bs ) = 15 v, v ss = com and t a = 25 c unless otherwise specified. the v il , v ih, and i in parameters are referenced to v ss /com and ar e applicable to the respective input leads hin and lin. the v o , i o, and r on parameters are referenced to com and are applicable to the respective output leads: ho and lo. symbol definition min. t yp. max. units test conditions v ih logic 1 input voltage 2.5 v il logic 0 input voltage 0.8 v oh high level output voltage, v bias - v o 1. 4i o = 0 a v ol low level output voltage, v o 0.2 i o = 20 ma i lk offset supply leakage current 50 v b = v s = 600 v i qbs quiescent v bs supply current 20 60 150 i qcc quiescent v cc supply current 50 120 240 i in+ logic 1 input bias current 25 60 v in = 5 v i in- logic 0 input bias current 5 .0 v in = 0 v v ccuv+ v cc and v bs supply undervoltage positive going 8.0 8.9 9.8 v bsuv+ threshold v ccuv- v cc and v bs supply undervoltage negative going 7.4 8.2 9.0 v bsuv- threshold v ccuvh hysteresis 0.3 0.7 v bsuvh i o+ output high short circuit pulsed current 1.4 1.9 v o = 0 v, pw 10 s i o- output low short circuit pulsed current 1.8 2.3 v o = 15 v, pw 10 s v a v a v s = 0 v v cc = 10 v to 20 v v in = 0 v or 5 v irs2181/irs21814(s)pbf www.irf.com 4 functional block diagrams 2181 lin uv detect delay hin vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift com lo vcc 21814 lin uv detect delay com lo vcc hin vss vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift irs2181/irs21814(s)pbf www.irf.com 5 lead assignments 8-lead pdip 8-lead soic lead definitions symbol description hinlogic input for high- side gate driver output (ho), in phase (irs2181/irs21814) linlogic input for low- side gate driver output (lo), in phase (irs2181/irs21814) vss logic ground (irs21814 only) v b high- side floating supply hohigh- side gate drive output v s high- side floating supply return v cc low- side and logic fixed supply lolow- side gate drive output comlow- side return irs2181pbf irs2181spbf 1 2 3 4 8 7 6 5 hin lin com lo v b ho v s v cc 1 2 3 4 8 7 6 5 hin lin com lo v b ho v s v cc 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 hin lin vss com lo v cc v b ho v s 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 hin lin vss com lo v cc v b ho v s 14-lead pdip 14-lead soic irs21814pbf irs21814spbf irs2181/irs21814(s)pbf www.irf.com 6 figure 1. input/output timing diagram figure 2. switching time waveform definitions figure 3. delay matching waveform definitions irs2181/irs21814(s)pbf www.irf.com 7 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) t yp. m ax. figure 4a. turn-on propagation delay vs. temperature 0 10 0 200 300 400 50 0 10 12 14 16 18 2 0 supply voltage (v) figure 4b. turn-on propagation delay vs. supply voltage t yp. m ax. 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 temperature ( o c) typ. max. figure 5a. turn-off propagation delay vs . te m pe rature 0 10 0 200 300 400 50 0 600 10 12 14 16 18 2 0 supply voltage (v ) figure 5b. turn-off propagation delay vs. supply voltage typ. m ax. turn-on propagation delay (ns) turn-on propagation delay (ns) turn-off propagation delay (ns) turn-off propagation delay (ns) irs2181/irs21814(s)pbf www.irf.com 8 0 20 40 60 80 -50 -25 0 25 50 75 100 125 temperature ( o c) typ max. figure 7a. turn-off fall time vs. temperature 0 20 40 60 80 10 12 14 16 18 20 supply voltage (v) figure 7b. turn-off fall time vs. supply voltage typ. max. 0 20 40 60 80 100 120 -50 -25 0 25 50 75 100 125 temperature ( o c) typ. max figure 6a. turn-on rise time vs. temperature 0 20 40 60 80 100 120 10 12 14 16 18 20 supply voltage (v) figure 6b. turn-on rise time vs. supply voltage typ. max. t u r n - o n r i s e t i m e ( n s ) t u r n - o f f f a l l t i m e ( n s ) t u r n - o n r i s e t i m e ( n s ) t u r n - o f f f a l l t i m e ( n s ) pdf created with pdffactory trial version www.pdffactory.com irs2181/irs21814(s)pbf www.irf.com 9 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "0" input voltage (v) max. figure 9a. logic "0" input voltage vs. temperature 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) logic "0" input voltage (v) figure 9b. logic "0" input voltage vs. supply voltage max. 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) input voltage (v) figure 8a. logic "1" input voltage vs . te m perature min. 0 1 2 3 4 5 6 10 12 14 16 18 20 v bais supply voltage (v) input voltage (v) figure 8b. logic "1" input oltage vs. supply voltage min. irs2181/irs21814(s)pbf www.irf.com 10 0.0 0.1 0.2 0.3 0.4 0.5 -50 -25 0 25 50 75 100 125 temperature ( o c) l o w l e v e l o u t p u t ( v ) figure 11a. low level output vs. temperature 0.0 0.1 0.2 0.3 0.4 0.5 10 12 14 16 18 20 supply voltage (v) l o w l e v e l o u t p u t ( v ) figure 11b. low level output vs. supply voltage max. max. max. 0.0 1.0 2.0 3.0 4.0 5.0 -50 -25 0 25 50 75 100 125 temperature ( o c) h i g h l e v e l o u t p u t v o l t a g e ( v ) figure 10a. high level output voltage vs. temperature (i o = 0 ma) max 0.0 1.0 2.0 3.0 4.0 5.0 10 12 14 16 18 20 v bais supply voltage (v) h i g h l e v e l o u t p u t v o l t a g e ( v ) figure 10b. high level output voltage vs. supply voltage (i o = 0 ma) irs2181/irs21814(s)pbf www.irf.com 11 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) offset supply leakage c urrent ( a) max. figure 12a. offset supply leakage current vs. tem perature 0 10 0 200 300 400 50 0 100 200 300 400 500 600 v b boost voltage (v) offset supply leakage c urren t ( a) figure 12b. offset supply leakage current vs. v b boost voltage max. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs supply c urrent ( a) mi n. figure 13a. v bs supply current vs . tem pe rature typ. max. 0 50 10 0 15 0 200 250 10 12 14 16 18 2 0 v bs floating supply voltage (v) v bs supply c urren t ( a) figure 13b. v bs supply current vs . v bs floating supply voltage typ. max. mi n. irs2181/irs21814(s)pbf www.irf.com 12 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc supply c urrent ( a) mi n. figure 14a. v cc supply current vs . v cc temperature typ. max. 0 10 0 200 300 400 50 0 10 12 14 16 18 2 0 v cc supply v oltage (v ) v cc supply c urrent ( a) figure 14b. v cc supply current vs . v cc supply voltage typ. max. mi n. 0 20 40 60 80 100 120 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "1" input bias current ( m a) figure 15a. logic "1" input bias current vs. tem perature typ. max. 0 20 40 60 80 10 0 12 0 10 12 14 16 18 2 0 supply voltage (v) logic "1" input b ias current ( a) figure 15b. logic "1" input bias current vs . supply voltage typ. max. irs2181/irs21814(s)pbf www.irf.com 13 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v c c a n d v b s u v t h r e s h o l d ( + ) ( v ) min. figure 17. v cc and v bs undervoltage threshold (+) vs. temperature typ. max. 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v c c a n d v b s u v t h r e s h o l d ( - ) ( v ) min. figure 18. v cc and v bs undervoltage threshold (-) vs. temperature typ. max. max 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature (c) l o g i c " 0 " i n p u t b i a s c u r r e n t ( a ) figure 16a. logic "0" input bias current vs. temperature max 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) l o g i c " 0 " i n p u t b i a s c u r r e n t ( a ) figure 16b. logic "0" input bias current vs. voltage irs2181/irs21814(s)pbf www.irf.com 14 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) output source current (a) mi n. figure 19a. output source current vs. temperature typ. 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) output source current (a) figure 19b. output source current vs. supply voltage typ. mi n. 1.0 2.0 3.0 4.0 5.0 -50 -25 0 25 50 75 100 125 temperature ( o c) output sink current (a) mi n. figure 20a. output sink current vs. temperature typ. 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) output sink current (a) figure 20b. output sink current vs. supply voltage typ. mi n. irs2181/irs21814(s)pbf www.irf.com 15 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temprature ( o c) 140 v 70 v 0 v figure 21. irs2181 vs. freque ncy (irfbc20), r gate =33 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140 v 70 v 0 v figure 23. irs2181 vs. freque ncy (irfbc40), r gate =15 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) figure 24. irs2181 vs. freque ncy (irfpe50), r gate =10 ? , v cc =15 v 70 v 0 v 140 v 20 40 60 80 10 0 12 0 14 0 1 10 100 1000 140 v 70 v 0 v figure 22. irs2181 vs . fre quency (irfbc30), r gate =22 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency ( k h z ) tempratur e ( o c) frequency (khz) temprature ( o c) irs2181/irs21814(s)pbf www.irf.com 16 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140 v 70 v 0 v figure 25. irs21814 vs . fre que ncy (irfbc20), r gate =33 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) figure 26. irs21814 vs . fre que ncy (irfbc30), r gate =22 ? , v cc =15 v 140 v 70 v 0 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140 v 70 v 0 v figure 27. irs21814 vs . fre que ncy (irfbc40), r gate =15 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 70 v 0 v figure 28. irs21814 vs . fre que ncy (irfpe50), r gate =10 ? , v cc =15 v 140 v irs2181/irs21814(s)pbf www.irf.com 17 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) figure 29. irs2181s vs. frequency (irfbc20), r gate =33 ? , v cc =15 v 140 v 70 v 0 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140 v 70 v 0 v figure 30. irs2181s vs. frequency (irfbc30), r gate =22 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 0 v figure 31. irs2181s vs. frequency (irfbc40), r gate =15 ? , v cc =15 v 140 v 70 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) tempreture ( o c) figure 32. irs2181s vs. frequency (irfpe50), r gate =10 ? , v cc =15 v 140 v 70 v 0 v irs2181/irs21814(s)pbf www.irf.com 18 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140 v 70 v 0 v figure 33. irs21814s vs. frequency (irfbc20), r gate =33 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140 v 70 v 0 v figure 35. irs21814s vs. frequency (irfbc40), r gate =15 ? , v cc =15 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) figure 36. irs21814s vs. frequen cy (irfpe50), r gate =10 ? , v cc =15 v 140 v 70 v 0 v 20 40 60 80 10 0 12 0 14 0 1 10 100 1000 140 v 70 v 0 v figure 34. irs21814s vs. frequency (irfbc30), r gate =22 ? , v cc =15 v frequency (khz) temperature ( o c) irs2181/irs21814(s)pbf www.irf.com 19 01-6014 01-3003 01 (ms-001ab) 8-lead pdip case outlines 01-6027 01-0021 11 (ms-012aa) 8-lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & toleranc ing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mold protrusions no t to exc eed 0.25 [.010]. 7 dimension is the length of lead for soldering to a substrate. mold protrusions no t to exc eed 0.15 [.006]. 0.25 [.010] cab e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 basic 0.635 basic irs2181/irs21814(s)pbf www.irf.com 20 01-6010 01-3002 03 (ms-001ac) 14-lead pdip 01-6019 01-3063 00 (ms-012ab) 14-lead soic (narrow body) irs2181/irs21814(s)pbf www.irf.com 21 carrier tape dimension for 8soicn code min max min max a 7 .9 0 8.1 0 0. 31 1 0 .3 18 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5 .4 5 5.5 5 0. 21 4 0 .2 18 e 6 .3 0 6.5 0 0. 24 8 0 .2 55 f 5 .1 0 5.3 0 0. 20 0 0 .2 08 g 1 .5 0 n/a 0.059 n/a h 1 .5 0 1.6 0 0. 05 9 0 .0 62 m etr ic im p erial reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1 .9 5 2.4 5 0. 76 7 0 .0 96 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 m etr ic im p erial e f a c d g a b h n ot e : co ntrolling d imension in mm load ed ta pe feed direction a h f e g d b c tape & reel 8-lead soic irs2181/irs21814(s)pbf www.irf.com 22 carrier tape dimension for 14soicn code min max min max a 7 .9 0 8.1 0 0. 31 1 0 .3 18 b 3.90 4.10 0.153 0.161 c 15.70 16.30 0.618 0.641 d 7 .4 0 7.6 0 0. 29 1 0 .2 99 e 6 .4 0 6.6 0 0. 25 2 0 .2 60 f 9 .4 0 9.6 0 0. 37 0 0 .3 78 g 1 .5 0 n/a 0.059 n/a h 1 .5 0 1.6 0 0. 05 9 0 .0 62 m etr ic im p erial reel d im ension s for 14so ic n code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1 .9 5 2.4 5 0. 76 7 0 .0 96 e 98.00 102.00 3.858 4.015 f n/a 22.40 n/a 0.881 g 18.50 21.10 0.728 0.830 h 16.40 18.40 0.645 0.724 m etr ic im p erial e f a c d g a b h n ot e : co ntrolling d imension in mm load ed ta pe feed direction a h f e g d b c tape & reel 14-lead soic irs2181/irs21814(s)pbf www.irf.com 23 8-lead pdip irs2181pbf 14-lead pdip irs21814pbf 8-lead soic irs2181spbf 14-lead soic irs21814spbf 8-lead soic tape & reel irs2181strpbf 14-lead soic tape & reel irs21814strpbf order information . ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 leadfree part marking information lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code s soic 8 & 14 are msl 2 qualified. this product has been designed and qualified for the industrial level. qualification standards can be found at www.irf.com data and specifications subject to change without notice. 11/2 7 /2006 |
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