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rev. 1.0 copyright ? 2015 by silicon laboratories SI5344-EVB SI5344-EVB si5344 e valuation b oard u ser ? s g uide description the SI5344-EVB is used for evaluating the si5344 any- frequency, any-output, jitter attenuating clock multiplier. the si5344 combines 4th generation dspll and multisynth tm technologies to enable any-frequency clock generation for applications that require the highest level of jitter performance. the SI5344-EVB has 4 independent input clocks and 10 independent output clocks. the SI5344-EVB can be controlled and configured using the clockbuilder pro tm (cbpro tm ) software tool features ? powered from usb port or external power supply ? onboard 48 mhz xtal or reference sma inputs allow holdover mode of operation on the si5344. ? cbpro tm gui-programmable vdd supply allows device to operate from 3.3, 2.5, or 1.8 v. ? cbpro tm gui-programmable vddo supplies allow each of the 10 outputs to have its own supply voltage selectable from 3.3, 2.5, or 1.8 v ? cbpro tm gui-controlled voltage, current, and power measurements of vdd and all vddo supplies. ? status leds for power supplies and control/status signals of si5344 ? sma connectors for input clocks, output clocks, and optional external timing reference clock si5344 evaluation board
SI5344-EVB 2 rev. 1.0 1. functional block diagram below is a functional block diagram of the SI5344-EVB. this evb can be connected to a pc via the main usb connector for programming, control, and monitoring. see section ?3. quick start? or section ?9. installing clockbuildpro (cbpro) desktop software? for more information. figure 1. SI5344-EVB functional block diagram
SI5344-EVB rev. 1.0 3 2. si5344 evb support documentation and clockbulderpro tm software all si5344 schematics, boms, user?s guides, and software can be found on-line at the following link: http://www.silabs.com/products/clocksoscillators/pages/si538x-4x-evb.aspx 3. quick start 1. install clockbuilderpro? desktop software: http://www.silabs.com/cbpro 2. connect a usb cable from the SI5344-EVB to the pc where the software is installed. 3. leave the jumpers as installed from the factory, and launch the clockbuilderpro? software. 4. you can use clockbuilderpro? to create, download, and run a frequency plan on the SI5344-EVB. 5. for the si5344 data sheet go here: http://www.silabs.com/timing 4. jumper defaults si5340 evb jumper defaults location type i = installed 0 = open location type i = installed 0 = open jp1 2 pin i jp14 2 pin o jp2 2 pin i jp15 2 pin o jp3 2 pin o jp16 3 pin all open jp4 2 pin o jp17 3 pin all open jp5 3 pin 1 to 2 jp18 2 pin o jp6 2 pin o jp19 2 pin o jp7 2 pin o jp20 3 pin all open jp8 2 pin o jp21 3 pin all open jp9 2 pin o jp22 2 pin o jp10 2 pin o jp23 2 pin o jp11 2 pin o jp24 3 pin all open jp12 2 pin o jp13 2 pin o jp17 5x2 hdr all 5 installed note: refer to the si5344 evb schematics for the functionality associated with each jumper.
SI5344-EVB 4 rev. 1.0 5. status leds d11 is illuminated when usb +5v supply voltage is present. d12 and d13 are status leds showing on-board mcu activity. figure 2. status leds si5340 evb status leds location silkscreen color status function indication d5 intrb blue dut interrupt d7 lolb blue dut loss of lock d8 losxaxbb blue dut loss of reference d11 +5v main green main usb +5v present d12 ready green mcu ready d13 busy green mcu busy
SI5344-EVB rev. 1.0 5 6. external reference input (xa/xb) an external reference (xtal) is used in combination with the internal oscillator to produce an ultra-low jitter reference clock for the dspll and for providing a stable reference for the free-run and holdover modes. the SI5344-EVB can also accommodate an external reference clock instead of a crystal. to evaluate the device with a refclk, c93 and c94 must be populated and the xtal removed (see figure 3). the refclk can then be applied to j25 and j26. figure 3. external reference input circuit 7. clock input circuits (inx/inxb and fb-in/fb-inb) the SI5344-EVB has eight sma connectors (iin0/in0b ? in2/in2b and in3(fb_in)/in3b(fb_inb)) for receiving external clock signals. all input clocks are terminated as shown in figure 4. input clocks are ac coupled and 50- ? terminated. this represents 4 differential input clock pairs. single-ended clocks can be used by appropriately driving one side of the differential pair with a single-ended clock. for details on how to configure inputs as single-ended, please refer to the si5344 data sheet. figure 4. input clock termination circuit
SI5344-EVB 6 rev. 1.0 8. clock output circuits (outx/outxb) each of the 8 outputs (4 differential pairs) is ac coupled to its respective sma connector. the output clock termination circuit is shown in figure 5. the output signal has no dc bias. if dc coupling is required, the ac coupling capacitors can be replaced with a resistor of appropriate value. the SI5344-EVB provides pads for optional output termination resistors and/or low frequency capacitors. note: components with schematic ?ni? designation are not normally populated on the SI5344-EVB and provide locations on the pcb for optional dc/ac terminations by the end user. figure 5. output clock termination circuit 9. installing clockbuildpro (cbpro) desktop software to install the cbpro software on any windows 7 (or later version) pc do the following: 1. go to http://www.silabs.com/cbpro/ and download clockbuilderpro? software. 2. installation instructions and user?s guide for clockbuilderpro? can be found at the download link shown above. please follow the instructions as indicated. 10. using si5344 evb 10.1. connecting the evb to your host pc once clockbuilderpro? software in installed, connect to the evb with a usb cable as shown in figure 6. figure 6. evb connection diagram
SI5344-EVB rev. 1.0 7 10.2. overview of clockbuilderpro tm applications the clockbuilderpro? installer installs two main applications: the clockbuilderpro wizard and the evb gui. figure 7. application #1: clockbuilderpro wizard use the cbpro wizard to do the following: ? create a new design ? review or edit an existing design ? export: create in-system programming figure 8. application #2: evb gui use the evb gui to do the following: ? download configuration to evb?s dut (si5344) ? control the evb?s regulators ? monitor voltage, current, power on the evb
SI5344-EVB 8 rev. 1.0 10.3. common clockbuilderpro tm work flow scenarios there are three common workflow scenarios when using cbpro and the si5344 evb. these workflow scenarios are as follows: ? workflow scenario #1: testing a silicon labs-created default configuration ? workflow scenario #2: modifying the default silicon labs-created device configuration ? workflow scenario #3: testing a user-created device configuration each is described in more detail in the following sections. 10.3.1. workflow scenario #1: testing a silicon labs created default configuration the flow for using the evb gui to initialize and control a device on the evb is as follows. 1. once the pc and evb are connected, launch clockbuilder pro by clicking on this icon on your pc?s desktop. figure 9. clockbuilderpro desktop icon 2. when the evb is detected, click on the open default plan button on the wizard?s main menu. cbpro automatically detects the evb and device type. figure 10. open default plan
SI5344-EVB rev. 1.0 9 3. once you open the default plan (based on your evb model number), a popup window opens. figure 11. write design to evb dialog 4. select yes to write the default plan to the si5344 device mounted on your evb. this ensures the device is completely reconfigured per the silicon labs default plan for the dut type mounted on the evb. figure 12. writing design status 5. after cbpro writes the default plan to the evb, click on open evb gui. figure 13. open evb gui
SI5344-EVB 10 rev. 1.0 6. the evb gui opens. all power supplies are set to the values defined in the device?s default cbpro project file created by silicon labs, as shown in figure 14. figure 14. evb gui window verify free-run mode operation assuming no external clocks have been connected to the input clock differential sma connectors (labeled ?inx/inxb?) located around the perimeter of the evb, the dut should now be operating in free-run mode, as the dut will be locked to the crystal in this case. you can run a quick check to determine if the device is powered up and generating output clocks (and consuming power) by clicking on the read all button (bottom right-hand corner of figure 14) and then reviewing the voltage, current, and power readings for each vddx supply. note: shutting the vdd and vdda power supplies ?off? and then ?on? will power-down and reset the dut. every time you do this, to reload the silicon labs-created default plan into the dut?s register space, you must go back to the wizard?s main menu and select write design to evb . figure 15. write design to evb failure to do the step above will cause the device to read in a pre-programmed plan from its non-volatile memory (nvm). however, the plan loaded from the nvm may not be the latest plan recommended by silicon labs for evaluation. at this point, you should verify the presence and frequencies of the output clocks (running in free-run mode from the crystal) using appropriate external instrumentation connected to the output clock sma connectors. to verify the output clocks are toggling at the correct frequency and signal format, click on view design report as highlighted in figure 16.
SI5344-EVB rev. 1.0 11 figure 16. view design report
SI5344-EVB 12 rev. 1.0 your configuration?s design report opens in a new window, as shown in figure 17. compare the observed output clocks to the frequencies and formats noted in your default project?s design report. figure 17. design report window verify locked mode operation assuming you connect the correct input clocks to the evb (as noted in the design report shown above), the dut on your evb will be running in ?locked? mode.
SI5344-EVB rev. 1.0 13 10.3.2. workflow scenario #2: modifying the default silicon labs created device configuration to modify the ?default? configuration using the cbpro wizard, click on edit configuration with wizard . figure 18. edit configuration with wizard you will now be taken to the wizard?s step-by-step menus to allow you to change any of the default plan?s operating configurations. figure 19. design wizard note: you can click on the icon on the lower left hand of the menu to confirm that your frequency plan is valid. after making your desired changes, you can click on write to evb to update the dut to reconfigure your device in real-time. the design write status window opens each time you make a change.
SI5344-EVB 14 rev. 1.0 figure 20. writing design status 10.3.3. workflow scenario #3: testing a user created device configuration 1. to test a previously-created user configuration, open the cbpro wizard by clicking the icon on your desktop and then selecting open design project file. figure 21. open design project file 2. locate your cbpro design file (*.slabtimeproj or *.sitproj file) design file in the windows file browser. figure 22. browse to project file
SI5344-EVB rev. 1.0 15 3. select yes when the write design to evb popup appears: figure 23. write design to evb dialog 4. the progress bar is launched. once the new design project file has been written to the device, verify the presence and frequencies of your output clocks and other operating configurations using external instrumentation. 10.4. exporting the register map file for device programming by a host processor you can also export your configuration to a file format suitable for in-system programming by selecting export as shown in figure 24. figure 24. export register map file you can now write your device?s complete configuration to file formats suitable for in-system programming.
SI5344-EVB 16 rev. 1.0 figure 25. export settings 11. writing a new frequency plan or device configuration to non-volatile memory (otp) note: writing to the device non-volatile memory (otp) is not the same as writing a configuration into the si5344 using clock- builderpro on the si5344 evb. writing a configuration into the evb from clockbuilderpro is done using si5344 ram space and can be done virtually unlimited number of times. writing to otp is limited as described below. refer to the si534x/8x family reference manuals and device datasheets for information on how to write a configuration to the evb dut?s non-volatile memory (otp). the otp can be programmed a maximum of two times only. care must be taken to ensure the configuration desired is valid when choosing to write to otp. 12. serial device communications (si5344 mcu) 12.1. on-board spi support the mcu on-board the SI5344-EVB communicates with the si5344 device through a 4-wire spi (serial peripheral interface) link. the mcu is the spi master and the si5344 device is the spi slave. the si5344 device can also support a 2-wire i2c serial interface, although the SI5344-EVB does not support the i2c mode of operation. spi mode was chosen for the evb because of the relatively higher speed transfers supported by spi vs. i2c. 12.2. external i2c support i 2 c can be supported if driven from an external i 2 c controller. the serial interface signals between the mcu and si5344 pass through shunts loaded on header j17. these jumper shunts must be installed in j17 for normal evb operation using spi with cbpro. if testing of i 2 c operation via external controller is desired, the shunts in j17 can be removed thereby isolating the on-board mcu from the si5344 device. the shunt at jp1 (i2c_sel) must also be removed to select i 2 c as si5344 interface type. an external i2c controller connected to the si5344 side of j17 can then communicate to the si5344 device. (for more information on i 2 c signal protocol, please refer to the si5344 data sheet.) figure 26 below illustrates the j17 header schematic. j17 even numbered pins (2, 4, 6, etc.) connect to the si5344 device and the odd numbered pins (1, 3, 5, etc.) connect to the mcu. once the jumper shunts have been removed from j17 and jp1, i 2 c operation should use j17 pin 4 (dut_sda_sdio) as the i 2 c sda and j17 pin 8
SI5344-EVB rev. 1.0 17 (dut_sclk) as the i 2 c sclk. please note the external i 2 c controller will need to supply its own i 2 c signal pull-up resistors. figure 26. serial communications header j17 13. SI5344-EVB schematic and bill of materials (bom) the si5344 evb schematic and bill of materials (bom) can be found online at: http://www.silabs.com/products/clocksoscillators/pages/si538x-4x-evb.aspx please be aware the si5344 evb schematic is in orcad capture hierarchical format and not in a typical ?flat? schematic format.
SI5344-EVB 18 rev. 1.0 d ocument c hange l ist revision 1.0 ? initial release
SI5344-EVB rev. 1.0 19 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 please visit the silicon labs technical support web page: https://www.siliconlabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. patent notice silicon labs invests in research and development to help our customers differentiate in the market with innovative low-power, s mall size, analog- intensive mixed-signal solutions. silicon labs' extensive patent portfolio is a testament to our unique approach and world-clas s engineering team. silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. the information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. additionally, silicon laboratories assumes no responsibility for the functioning of undescribed fea- tures or parameters. silicon laboratories reserves the right to make changes without further notice. silicon laboratories makes no warran- ty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does silicon laborato ries assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation consequential or incidental damages. silicon laboratories products are not designed, intended, or authorized for use in applica tions intend- ed to support or sustain life, or for any other application in which the failure of the silicon laboratories product could create a situation where personal injury or death may occur. should buyer purchase or use silicon laboratories products for any such unintended or unaut horized application, buyer shall indemnify and hold silicon laboratories harmless against all claims and damages.

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