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wideband, 38 db isolation at 1 ghz, cmos 1.65 v to 2.75 v, spst switch enhanced product adg901 - ep rev. a document feedback information furn ished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademark s and register ed trademark s are the property of their respective owners. one technology way, p.o. box 9106, norwoo d, ma 02062 - 9106, u.s.a. tel: 78 1.32 9.47 00 ? 2016 analog devices, inc. all rights reserved. technica l support www.analog.com features wideba nd switch : ? 3 db at 4.5 ghz a bsorptive switch high off isolation: 38 db at 1 ghz low insertion loss: 0.8 db at 1 ghz single 1.65 v to 2.75 v power supply cmos/lvttl control logic t iny 3 mm 3 mm lfcsp package low power consumption (<2.5 a) enhanced product fea tures supports defense and aerospace applications (aqec standard) military temperature range: ?55c to +125c controlled manufacturing baseline 1 assembly/test site 1 fabrication site enhanced product change notification qualification data available on request applications wireless communications general - purpose radio frequency (rf) switching dual - band applications high speed filter selection digital transceiver front - end switch if switching tune r modules antenna diversity switching lis t general description the adg901 - ep is a wideband switch that uses a cmos process to provide high isolation and low insertion loss to 1 ghz. the adg901 - ep is an absorptive (matched) switch with 50 ? terminated shunt legs. this switch is designed such that the isolation is high over the dc to 1 ghz frequency range. the adg901 - ep has on - board cmos control logic, thus eliminating t he need for external controlling circuitry. the control inputs are both c mos and lvttl compatible. the low power consump - ti on of this cmos device makes it ideally suited to wireless applications and general - purpose high frequency switching. additional application and technical information can be found in the adg901 data sheet. functional block dia gram ADG901-EP rf2 rf1 ctrl 50 50 14327-001 figure 1 . product highlights 1. ?38 db off isolation at 1 ghz 2. 0.8 db inserti on loss at 1 ghz 3. tiny 8 - lead lfcsp package 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10k 100k 100m 1m 10m 1g 10g frequency (hz) isolation (db) v dd = 2.5v v dd = 1.8v t a = 25c 14327-002 figure 2 . off isolation vs. frequency ?3.0 ?2.8 ?2.2 ?1.6 ?1.2 ?3.0 ?2.6 ?2.4 ?2.0 ?1.8 ?1.4 ?1.0 ?0.8 ?0.6 ?0.4 10k 100k 100m 1m 10m 1g 10g frequency (hz) insertion loss (db) v dd = 2.5v t a = 25c 14327-003 figure 3 . insertion loss vs. frequency
ADG901-EP enhanced product rev. a | page 2 of 11 table of contents features .............................................................................................. 1 ? enhanced product features ............................................................ 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? product highlights ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? continous current per channel ................................................ 4 ? absolute maximum ratings ............................................................5 ? thermal resistance .......................................................................5 ? esd caution...................................................................................5 ? pin configurations and function descriptions ............................6 ? typical performance characteristics ..............................................7 ? terminology .......................................................................................9 ? test circuits ..................................................................................... 10 ? outline dimensions ....................................................................... 11 ? ordering guide .......................................................................... 11 ? revision history 12 /2016rev. 0 to rev. a change to product title ................................................................... 1 9/2016revision 0: initial version
enhanced product adg901 -ep rev. a | page 3 of 11 specifications v dd = 1.65 v to 2.75 v, gnd = 0 v, input power = 0 dbm, temperature range = ?55c to +125c, unless otherwise noted . table 1. parameter symbol te s t conditions /comments min ty p 1 max unit ac electrical characteristics ?3 db frequency 2 4.5 ghz insertion loss s 21 , s 12 dc to 100 mhz; v dd = 2.5 v 10%, see figure 19 0.4 0.7 db 500 mhz; v dd = 2.5 v 10% 0.6 1 db 1000 mhz; v dd = 2.5 v 10% 0.8 1.25 db isolation rf1 to rf2 s 21 , s 12 100 mhz 55 61 db 500 mhz 40 45 db 1000 mhz 31 38 db return loss (on channel) 2 s 11 , s 22 dc to 100 mhz 18 28 db 500 mhz 25 db 1000 mhz 20 db return loss (off channel) 2 s 11 , s 22 dc to 100 mhz 15 23 db 500 mhz 21 db 1000 mhz 19 db on switching time 2 t on 50% ctrl to 90% rf, see figure 16 4 6.5 ns off switching time 2 t off 50% ctrl to 10% rf, see figure 16 6.5 10.5 ns rise time 2 t ri se 10% to 90% rf, see figure 17 3.1 5.5 ns fall time 2 t fa l l 90% to 10% rf, see figure 17 6.0 9.5 ns third - order intermodulation intercept ip3 900 mhz/901 mhz, 4 dbm, see figure 21 28.5 36 dbm video feedthrough 3 see figure 20 2.5 mv p - p input power 1 db input compression 4 p1db 1000 mhz; se e figur e 22 17 dbm dc electrical characteristics input high voltage v inh v dd = 2.25 v to 2.75 v 1.7 v v inh v dd = 1.65 v to 1.95 v 0.65 v dd v input low voltage v inl v dd = 2.25 v to 2.75 v 0.7 v v inl v dd = 1.65 v to 1.95 v 0.35 v dd v input leakage current i i 0 v in 2.75 v 0.1 1 a capacitance 2 rf1/rf2, rf port on capacitance c rf on f = 1 mhz 1.2 pf ctrl input capacitance c ctr l f = 1 mhz 2.1 pf power requirements v dd 1.65 2.75 v quiescent power supply current i dd digital inputs = 0 v or v dd 0.1 2.5 a 1 typical values ar e at v dd = 2.5 v and 25c, unless otherwise s pecified . 2 guaranteed by design, not subject to production test. 3 video feedthrough is the dc transience at the output of any port of the switch when the control voltage is switched from high to low or low to high in a 50 ? test setup, measured with 1 ns rise time pulses and 500 mhz bandwidth . 4 for less than 100 mhz, refer to the an - 952 application note for more information about power handling.
adg901 -ep enhanced product rev. a | page 4 of 11 continous current per channel table 2. parameter 25c 85c 105c 125c unit test conditions/comments continuous current per channe l 1 8- l ead lfcsp , ja = 48 c/w , dc b ias = 0.5 v v dd = 2.75 v, v ss = 0 v 70 7 3.85 2.8 ma maximum v dd = 1.65 v, v ss = 0 v 56 7 3.85 2.8 ma maximum 1 g uaranteed by design, not subject to production test.
enhanced product adg901 -ep rev. a | page 5 of 11 absolute maximum rat ings t a = 25 c, unless otherwise specified. table 3. parameter rating v dd t o gnd 1 0.5 v to +4 v inputs to gnd 1 , 2 0.5 v to v dd + 0.3 v continuous current data 3 + 15% input power 4 18 dbm operating temperature range (industrial) ?55c to +125c storage temperature range ? 65 c to +150 c junction temperature 150 c lead temper ature, soldering (10 sec) 300 c ir reflow, peak temperature (<20 sec) 235 c esd 1 kv 1 tested at 125c. 2 when rf1 and rf2 are in the open position , the input to ground rating is ? 0.5 v to v dd ? 0.5 v . 3 see table 2 . 4 t he swi tch is tested in both the open and close d position s . in the closed condition, power i s applied to rf 1 , and rf 2 i s terminated to a 50 ? resistor to gnd. in the open condition, power i s applied to rf1 and rf2 . stresses at or above those listed under absolut e maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. thermal resistance thermal performance is directly linked to printed circuit board (pcb) design and operating environment. careful attention to pcb thermal design is required. table 4 . thermal resistance package type ja jc unit cp - 8 - 13 1 48 1 c/w 1 test condition: thermal impedance simulated values are based on jedec 2s2p thermal test board with four thermal vias. see jedec jesd51. esd caution
ADG901-EP enhanced product rev. a | page 6 of 11 pin configurations and function descriptions notes 1. the lfcsp package has an exposed pad. the exposed pad must be tied to the substrate, gnd. 3 4 1 2 6 5 8 7 v dd ctrl gnd rf1 rf2 gnd gnd gnd ADG901-EP top view (not to scale) 14327-004 figure 4. 8-lead lfcsp pin configuration table 5. pin function descriptions pin no. mnemonic description 1 v dd power supply input. these devices can be operated from 1.65 v to 2.75 v; decouple v dd to gnd. 2 ctrl cmos or lvttl logic level. ctrl input must not exceed v dd . logic 0: rf1 isolated from rf2. logic 1: rf1 to rf2. 3, 5, 6, 7 gnd ground reference point for all circuitry on the device. 4 rf1 rf1 port. 8 rf2 rf2 port. epad exposed pad. the lfcsp package ha s an exposed pad. the exposed pad must be tied to the substrate, gnd. table 6. truth table ctrl signal path 0 rf1 isolated from rf2 1 rf1 to rf2
enhanced product ADG901-EP rev. a | page 7 of 11 typical performance characteristics ?0.4 ?3.0 ?2.2 ?2.0 ?1.8 ?1.6 ?1.4 ?2.8 ?2.6 ?2.4 ?1.2 ?1.0 ?0.8 ?0.6 10k 100k 100m 1m 10m 1g 10g frequency (hz) insertion loss (db) t a = 25c v dd = 2.5v v dd = 2.75v v dd = 2.25v 14327-005 figure 5. insertion loss vs. frequency over supplies (s 12 and s 21 ) ? 0.40 ?1.00 ?0.85 ?0.80 ?0.75 ?0.70 ?0.65 ?0.95 ?0.90 ?0.60 ?0.55 ?0.50 ?0.45 10k 100k 100m 1m 10m 1g 10g frequency (hz) insertion loss (db) v dd = 2.75v v dd = 2.25v v dd = 2.5v t a = 25c 14327-006 figure 6. insertion loss vs. frequency over supplies (s 12 and s 21 ) (zoomed figure 5 plot) ? 0.4 ?3.0 ?2.2 ?2.0 ?1.8 ?1.6 ?1.4 ?2.8 ?2.6 ?2.4 ?1.2 ?1.0 ?0.8 ?0.6 10k 100k 100m 1m 10m 1g 10g frequency (hz) insertion loss (db) v dd = 1.8v v dd = 1.95v v dd = 1.65v t a = 25c 14327-007 figure 7. insertion loss vs. frequency over supplies (s 12 and s 21 ) ?3.0 ?0.5 ?2.0 ?1.5 ?1.0 ?0.5 0 10k 100k 100m 1m 10m 1g 10g frequency (hz) insertion loss (db) v dd = 2.5v 14327-008 t a = ?55c t a = +25c t a = +85c t a = +125c figure 8. insertion loss vs. frequency over temperature (s 12 and s 21 ) 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 ?95 ?85 ?75 ?65 ?55 ?45 ?35 ?25 ?15 ?5 10k 100k 100m 1m 10m 1g 10g frequency (hz) isolation (db) v dd = 2.5v v dd = 1.8v t a = 25c 14327-009 figure 9. off isolation vs . frequency over supplies (s 12 and s 21 ) ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10k 100k 100m 1m 10m 1g 10g frequency (hz) isolation (db) v dd = 2.5v 14327-010 t a = ?55c t a = +25c t a = +85c t a = +125c figure 10. off isolation vs. frequency over temperature (s 12 and s 21 )
ADG901-EP enhanced product rev. a | page 8 of 11 0 ?35 ?30 ?20 ?10 ?25 ?15 ?5 10k 100k 100m 1m 10m 1g 10g frequency (hz) return loss (db) t a = 25c v dd = 2.5v on switch off switch 14327-011 figure 11. return loss vs. frequency (s 11 ) ch1 = ctrl = 1v/div ch2 = rfx = 100mv/div t rise = 2.8ns t fall = 5.1ns ch2 ch1 14327-012 figure 12. switch timing ch1 500mv ch2 1mv 10.0ns 1 2 ctrl rfx ch2 pk-pk 2.016mv 14327-013 figure 13. video feedthrough 40 0 5 10 15 20 25 30 35 250 350 450 550 650 750 850 frequency (mhz) ip 3 (dbm) v dd = 2.5v t a = 25c 14327-014 figure 14. ip 3 vs. frequency 20 0 2 4 6 8 10 12 14 16 18 0 250 500 750 1000 1250 1500 frequency (mhz) p ?1db (dbm) v dd = 2.5v t a = 25c 14327-015 figure 15. p1db vs. frequency (dc bias not used)
enhanced product adg901 -ep rev. a | page 9 of 11 terminology v dd most positive powe r supply potential. i dd positive supply current. gnd ground (0 v) reference. ctrl logic control input. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i in l (i inh ) input current of the digital input. c in digital input capacitance. t on delay between applying the digital control input and the output switching on. t off delay between applying the digital control input and the output switching off. t rise rise time. time for the rf signal to rise from 10% to 90% of the on level. t fall fall time. time for the rf signal to fall from 90% to 10% of the on level. off isolation the attenuation between input and output ports of the switch when the switch control voltage is in the off condition. insertion loss the a ttenuation between input and output ports of the switch when the switch control voltage is in the on condition. p 1db 1 db compression point. the rf input power level at which the switch insertion loss increases by 1 db over its low level value. it is a me asure of how much power the on switch can handle before the insertion loss increases by 1 db. ip 3 third - order intermodulation intercept. this is a measure of the power in false tones that occur when closely spaced tones are passed through a switch, whereb y the nonlinearity of the switch causes these false tones to be generated. return loss the amount of reflected power relative to the incident power at a port. large retur n loss indicates good matching. by measuring return loss the vswr can be calculated from conversion charts. voltage standing wave ratio ( vswr ) indicates the degree of matching present at a switch rf port. video feedthrough the s purious signals present at the rf ports of the switch when the control voltage is switched from high to low o r low to high without an rf signal present.
adg901 -ep enhanced product rev. a | page 10 of 11 test c ircuits v dd v dd 0.1f v s ctrl rf2 rf1 gnd r l 50 v out v ctrl 50% 50% v out t on t off 90% 10% 14327-016 figure 16 . switching timing: t on , t off v dd v dd 0.1f v s ctrl rf2 rf1 gnd r l 50 v out v ctrl 50% 50% v out t rise t fall 90% 90% 10% 10% 14327-017 figure 17 . switch timing: t ris e , t f al l v s v out v s 50 network analyzer v out r l 50 0.1f v ctrl gnd rf2 ctrl ADG901-EP rf1 50 50 v dd v dd off isolation = 20 log 14327-018 figure 18 . off isolation v s 50 network analyzer v out r l 50 0.1f v dd v ctrl gnd rf2 ctrl ADG901-EP rf1 50 50 v dd insertion loss = 20 log v out v s 14327-019 fi gure 19 . insertion loss oscilloscope 0.1f v dd v ctrl nc rf2 ctrl rf1 gnd ADG901-EP 50 50 v dd 14327-020 figure 20 . video feedthrough combiner rf source rf source spectrum analyzer 0.1f v dd v ctrl gnd rf2 ctrl ADG901-EP rf1 50 50 v dd 14327-021 figure 21. ip3 rf source spectrum analyzer 0.1f gnd rf2 ctrl ADG901-EP rf1 50 50 v dd v ctrl v dd v s 14327-022 figur e 22. p1db
enhanced product adg901 -ep rev. a | page 11 of 11 outline dimensions 8 1 5 4 0.30 0.25 0.20 pin 1 index are a sea ting plane 0.80 0.75 0.70 1.55 1.45 1.35 1.84 1.74 1.64 0.203 ref 0.05 max 0.02 nom 0.50 bsc exposed pa d 3.10 3.00 sq 2.90 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. coplanarity 0.08 0.50 0.40 0.30 compliant to jedec standards mo-229-weed-4 05- 1 1-2016- a pin 1 indic at or (r 0.15) top view bot t om view side view f igure 23. 8- lead lead frame chip scale package [lfcsp] 3 mm 3 mm body and 0.75 mm package height (cp -8- 13 ) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding adg901scpz - ep ?55c to +12 5c 8- lead lead frame chip scale package [lfcsp] cp -8- 13 s4k adg901 scpz - ep - rl7 ?55c to +12 5c 8- lead lead frame chip scale package [lfcsp] cp -8- 13 s4k 1 z = rohs comp liant part. ? 2016 analog devices, inc. all rights reserved. trade marks and registered trademarks are the property of their respective owners. d14327-0-1 2/16(a)

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