indus t rial po wer & con trol eic e dr iv er ? high voltage gate driver ic datas h eet , 15.04.2015 6e d f a mil y - 2 nd g e nera tion 3 phase 600 v gate drive ic 6ed003l06 - f2 6ed003l02 - f2 eicedriver ?
edition 15.04.2015 published by infineon technologies ag 81726 munich, germany ? 2015 infineon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respe ct to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitati on, warranties of non - infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies components may be used in life - support devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life - support device or system or to affect th e safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 3 , 15.04.2015 revision history page or item su bjects (major changes since previous revision) , 15.04.2015 all revised wording for test temperature p. 14 inserted figure 14 : itrip input filter time p.17 revised figure 8 and figure 9 trademarks of infineon technologies ag aurix?, bluemoon?, c166?, canpak?, cipos?, cipurse?, comneon?, econopack?, coolmos?, coolset ?, corecontrol?, crossave?, dave?, easypim?, econobridge?, econodual?, econopim?, eicedriver?, eupec?, fcos?, hitfet?, hybridpack?, i2rf?, isoface?, isopack?, mipaq?, modstack?, my - d?, novalithic?, omnitune?, optimos?, origa?, primarion?, primepack?, prime stack?, pro - sil?, profet?, rasic?, reversave?, satric?, sieget?, sindrion?, sipmos?, smarti?, smartlewis?, solid flash?, tempfet?, thinq!?, trenchstop?, tricore?, x - gold?, x - pmu?, xmm?, xposys?. other trademarks advance design system? (ads) of agilent tech nologies, amba?, arm?, multi - ice?, keil?, primecell?, realview?, thumb?, vision? of arm limited, uk. autosar? is licensed by autosar development partnership. bluetooth? of bluetooth sig inc. cat - iq? of dect forum. colossus?, firstgps? of trimble navigatio n ltd. emv? of emvco, llc (visa holdings inc.). epcos? of epcos ag. flexgo? of microsoft corporation. flexray? is licensed by flexray consortium. hyperterminal? of hilgraeve incorporated. iec? of commission electrotechnique internationale. irda? of infrare d data association corporation. iso? of international organization for standardization. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. microtec?, nucleus? of mentor graphics corporation. mifare? of nxp. mipi? of mipi alliance, inc. mi ps? of mips technologies, inc., usa. murata? of murata manufacturing co., microwave office? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. openwave? openwave systems inc. red hat? red hat, inc. rfmd? rf micro devices, inc . sirius? of sirius satellite radio inc. solaris? of sun microsystems, inc. spansion? of spansion llc ltd. symbian? of symbian software limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. tektronix? of tektronix inc. toko? of toko kabushiki ka isha ta. unix? of x/open company limited. verilog?, palladium? of cadence design systems, inc. vlynq? of texas instruments incorporated. vxworks?, wind river? of wind river systems, inc. zetex? of diodes zetex limited . last trademarks update 2010 - 10 - 26
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 4 , 15.04.2015 table of contents 1 overview ................................ ................................ ................................ ................................ ............. 5 2 blockdiagram ................................ ................................ ................................ ................................ ...... 6 3 pin configuration, description, and functionality ................................ ................................ ........... 7 3.1 low side and high side control pins (pin 2, 3, 4, 5, 6, 7) ................................ ................................ .. 7 3.2 en (gate driver enable, pin 10) ................................ ................................ ................................ .......... 8 3.3 /fault (fault feedback, pin 8) ................................ ................................ ................................ .......... 8 3.4 itrip and rcin (over - current detection function, pin 9, 11) ................................ ........................... 9 3.5 vcc, vss and com (low side supply, pin 1, 12,13) ................................ ................................ ........ 9 3.6 vb1,2,3 and vs1,2,3 (high side supplies, pin 18, 20, 22, 24, 26, 28) ................................ ............... 9 3.7 lo1,2,3 and ho1,2,3 (low and high side outputs, pin 14, 15, 16, 19, 23, 27) ................................ . 9 4 electrical parameters ................................ ................................ ................................ ....................... 10 4.1 absolute maximum ratings ................................ ................................ ................................ ............... 10 4.2 required operation conditions ................................ ................................ ................................ ........... 11 4.3 operating range ................................ ................................ ................................ ................................ 11 4.4 stat ic logic function table ................................ ................................ ................................ ................... 12 4.5 static parameters ................................ ................................ ................................ ............................... 12 4.6 dynamic parameters ................................ ................................ ................................ .......................... 14 5 timing diagrams ................................ ................................ ................................ ............................... 15 6 package ................................ ................................ ................................ ................................ ............. 18 6.1 pg - dso - 28 ................................ ................................ ................................ ................................ ........ 18 6.2 pg - tssop - 28 ................................ ................................ ................................ ................................ .... 19 list of figures figure 1 typical application ................................ ................................ ................................ ............................... 6 figure 2 block diagram for 6ed003l06 - f2 / 6ed003l02 - f2 ................................ ................................ ............ 6 figure 3 pin configuration of 6ed003l06 - f2 and 6ed003l02 - f2 ................................ ................................ ... 7 figure 4 input pin structure ................................ ................................ ................................ ................................ . 7 figure 5 input filter timing diagram ................................ ................................ ................................ ..................... 8 figure 6 en pin structures ................................ ................................ ................................ ................................ .. 8 figure 7 /fault pin structures ................................ ................................ ................................ .......................... 8 figure 8 timing of short pulse suppression ................................ ................................ ................................ ..... 15 figure 9 timing of internal deadtime ................................ ................................ ................................ ................ 15 figure 10 enable delay time definition ................................ ................................ ................................ ............... 15 figure 11 input to output propagation delay times and switching times definition ................................ ............. 16 figure 12 operating areas ................................ ................................ ................................ ................................ .. 16 figure 13 itrip - timing ................................ ................................ ................................ ................................ ...... 16 figure 14 itrip input filter time ................................ ................................ ................................ .......................... 17 figure 15 package drawing ................................ ................................ ................................ ................................ 18 fi gure 16 pcb reference layout ................................ ................................ ................................ ......................... 18 figure 17 package drawing ................................ ................................ ................................ ................................ 19 figure 18 pcb reference layout (according to jedec 1s0p) left: reference layout right: detail of footprint 19 list of tables table 1 members of 6ed family C 2 nd generation ................................ ................................ ............................. 5 table 2 pin description ................................ ................................ ................................ ................................ ..... 7 table 3 abs. maximum ratings ................................ ................................ ................................ ........................ 10 table 4 required operation conditions ................................ ................................ ................................ .......... 11 table 5 operating range ................................ ................................ ................................ ................................ . 11 tabl e 6 static parameters ................................ ................................ ................................ ............................... 12 table 7 dynamic parameters ................................ ................................ ................................ .......................... 14 table 8 data of reference layout ................................ ................................ ................................ ..................... 19
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 5 , 15.04.2015 eicedriver? 3 phase 600 v gate drive ic 1 overview main features ? thin - film - soi - technology ? maximum blocking voltage +600v ? separate control circuits for all six drivers ? cmos and lsttl compatible input (negative logic) ? signal interlocking of every phase to prevent cross - conduction ? detection of over current and under voltage supply ? externally programmable delay for fault clear after over current detection product highlights ? insensitivity of the bridge output to negative transient voltages up to - 50v given by soi - technology ? 'shut down' of all switches during error conditions typical applications ? home appliances ? f ans, pumps ? general purpose drives product family table 1 members of 6ed family C nd generation sales name high side control input hin1,2,3 and lin1,2,3 typ. uvlo - thresholds bootstrap diode package 6ed003l06 - f 2 / 6ed003l02 - f2 negative logic 11.7 v / 9.8 v no dso28 / tssop28 description the device s are full bridge driver s to control power devices like mos - transistors or igbts in 3 - phase systems with a maximum blocking voltage of +600 v. based on the used soi - technology there is an excellent ruggedness on transient voltages. no parasitic thyri stor structures are present in the device. hence, no parasitic latch - up may occur at all temperatures and voltage conditions. the six independent drivers are controlled at the low - side using cmos resp. lsttl compatible signals, down to 3.3 v logic. the dev ice includes an under - voltage detection unit with hysteresis characteristic and an over - current detection. the over - current level is adjusted by choosing the resistor value and the threshold level at pin itrip. both error conditions (under - voltage and over - current) lead to a definite shut down of all six switches. an error signal is provided at the fault open drain output pin. the blocking time after over - current can be adjusted with an rc - network at pin rcin. the input rcin owns an internal current source of 2.8 a. therefore, the resistor r rcin is optional. the typical output current can be given with 165 ma for pull - up and 375 ma for pull down. because of system safety reasons a 310 ns interlocking time has been realised. the function of input en can optionally be extended with an over - temperature detection, using an external ntc - resistor (see fig.1). pg - dso28 pg - tssop28
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 6 , 15.04.2015 figure 1 typical application 2 blockdiagram figure 2 block d iagram for 6ed003l06 - f2 / 6ed003l02 - f2 v c c f a u l t l i n 1 , 2 , 3 e n r c i n i t r i p v s s v b 1 , 2 , 3 h o 1 , 2 , 3 v s 1 , 2 , 3 l o 1 , 2 , 3 c o m t o l o a d v s s e n r r c i n c r c i n h i n 1 , 2 , 3 h i n 1 , 2 , 3 l i n 1 , 2 , 3 f a u l t v c c d c - b u s r s h 5 v v c c l o 1 l o 2 l o 3 c o m v s s s e t d o m i n a n t l a t c h s r q u v - d e t e c t b i a s n e t w o r k / v d d 2 d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n z d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n d e l a y d e l a y d e l a y v s s / c o m l e v e l - s h i f t e r v s s / c o m l e v e l - s h i f t e r v s s / c o m l e v e l - s h i f t e r g a t e - d r i v e g a t e - d r i v e g a t e - d r i v e > 1 i n p u t n o i s e f i l t e r l i n 3 i n p u t n o i s e f i l t e r h i n 3 i n p u t n o i s e f i l t e r l i n 2 i n p u t n o i s e f i l t e r h i n 2 i n p u t n o i s e f i l t e r l i n 1 v s 3 h o 3 v b 3 b i a s n e t w o r k / v b 3 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t v s 2 h o 2 v b 2 b i a s n e t w o r k - v b 2 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t v s 1 h o 1 v b 1 b i a s n e t w o r k - v b 1 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t g a t e - d r i v e i n p u t n o i s e f i l t e r h i n 1 f a u l t > 1 r c i n v d d 2 i r c i n i t r i p i n p u t n o i s e f i l t e r i n p u t n o i s e f i l t e r e n g a t e - d r i v e g a t e - d r i v e
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 7 , 15.04.2015 3 pin configuration, description, and functionality figure 3 pin configuration of 6ed 003l06 - f2 and 6ed003l02 - f2 table 2 pin description symbol description vcc low side power supply vss logic ground / hin1,2,3 high side logic input / lin1,2,3 low side logic input / fault indicates over - current and under - voltage (negative logic, open - drain output) en enable i/o functionality (positive logic) itrip analog input for over - current shut down, activates fault and rcin to vss rcin e xternal rc - network to define fault clear delay after fault - signal (t fltclr ) com low side gate driver reference vb1,2,3 high side positive power supply ho1,2,3 high side gate driver output vs1,2,3 high side negative power supply lo1,2,3 low side gate driver output nc not connected 3.1 low side and high side control pins (pin 2, 3, 4, 5, 6, 7) the schmitt trigger input threshold of them are such to guarantee lsttl and cmos compatibility down to 3.3 v controller outputs. input schmitt trigger and noise filter provide beneficial noise rejection to short input pulses according to figure 4 and figure 5 . figure 4 input pin structure v c c 1 2 8 v b 1 h i n 1 2 2 7 h o 1 h i n 2 3 2 6 v s 1 h i n 3 4 2 5 l i n 1 5 2 4 v b 2 l i n 2 6 2 3 h o 2 l i n 3 7 2 2 v s 2 f a u l t 8 2 1 i t r i p 9 2 0 v b 3 e n 1 0 1 9 h o 3 r c i n 1 1 1 8 v s 3 v s s 1 2 1 7 c o m 1 3 1 6 l o 1 l o 3 1 4 1 5 l o 2 n c n c n c u z = 1 0 . 5 v i n p u t n o i s e f i l t e r v c c s c h m i t t - t r i g g e r s w i t c h l e v e l v i h ; v i l l i n x h i n x
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 8 , 15.04.2015 an internal pull - up of about 75 k ? (negative logic) pre - biases the input during supply start - up and a esd zener clamp is provided for pin p rotection purposes. the zener diodes are therefore designed for single pulse stress only and not for continuous voltage stress over 10v. figure 5 input filter timing diagram it is anyway recommended for proper work of the driver not to provide input pulse - width lower than 1 s. the 6ed - f2 driver ic provide additionally a shoot through prevention capability which avoids the simultaneous on - state of two channels of the same leg (i.e. ho1 and lo1, ho2 and lo2, ho3 and lo3). when two inputs of a same leg are activated, only one leg output is activated, so that the leg is kept steadily in a safe state. please refer to the application note an - gatedrive - 6ed2 - 1 for a detailed description. a minimum dead time i nsertion of typ. 310 ns is also provided, in order to reduce cross - conduction of the external power switches. 3.2 en (gate driver enable, pin 10) the signal applied to pin en controls directly the output stages. all outputs are set to low, if en is at low logi c level. the internal structure of the pin is given in figure 6 . t he switchin g levels of the schmitt - trigger are here v en,th+ = 2.1 v and v en,th - = 1.3 v. the typi cal propagation delay time is t en = 780 ns. the re is an intern al pull down resistor (75 k ? ), which keeps the gate outputs off in case of broken pcb connection. figure 6 en pin structures 3.3 /fault (fault feedback, pin 8) /fault pin is an active low open - drain output indicating the status of the gate driver (see figure 7 ). the pin is active (i.e. forces low voltage level) when one of the following conditions occur: ? under - voltage condition of vcc supply: in this case the fault condition is released as soon as the supply voltage condition returns in the normal operation range (please refer to vcc pin description for more details). ? over - current detection (itrip): the fault condition is latched until current trip condition is finished and rcin input is released (please refer to itrip pin). figure 7 /fault pin structures l i n h i n h i n l i n h o l o h i g h l o w o n o f f o n t f i l i n t f i l i n o f f o n o f f l o h o v z = 1 0 . 5 v i n p u t n o i s e f i l t e r e n i e n + , i e n - v e n , t h + , v e n , t h - 6 e d f a m i l y C 2 n d g e n e r a t i o n f a u l t > 1 f r o m u v - d e t e c t i o n v c c r o n , f l t v d d f r o m i t r i p - l a t c h 6 e d f a m i l y C 2 n d g e n e r a t i o n
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 9 , 15.04.2015 3.4 itrip and rcin (over - current detection function, pin 9, 11) the 6ed family C 2 nd generation provides an over - current detection function by connecting the itrip input with the motor current feedback. the itrip comparator threshold (typ 0.44 v) is referenced to vss ground. a input noise filter (typ . t itripmin = 230 ns) prevents the driver to detect false over - current events. over - current detection generates a hard shut down of all outputs of the gate driver and provides a latched fault feedback at /fault pin. rcin input/output pin is used to determine the rese t time of the fault condition. as soon as itrip threshold is exceeded the external capacitor connected to rcin is fully discharged. the capacitor is then recharged by the rcin current generator when the over - current condition is finished. as soon as rcin v oltage exceeds the rising threshold of typ v rcin,th = 5.2 v, the fault condition releases and the driver returns operational following the ontrol input pins according to section 3.1 . please refer to an - gatedrive - 6ed2 - 1 for details on setting rcin time constant. 3.5 vcc, vss and com (low side supply, pin 1, 12,13) vcc is the low side supply and it provides power both to input logic and to low side output power stage. input logic is referenced to vss ground as well as the under - voltage detection circuit. output power stage is referenced to com ground. com ground is floating respect to vss ground with a maximum range of ope ration of +/ - 5.7 v. a back - to - back zener structure protects grounds from noise spikes. the under - voltage circuit enables the device to operate at power on when a typical supply voltage higher than v ccuv+ is present. the ic shuts down all the gate drivers power outputs, when the vcc supply voltage is below v ccuv - = 9.8 v . this prevents the external power switches from critically low gate voltage levels during on - state and therefore from excessive power dissipation. please consult the individual output chara cteristic of the driven transistor. 3.6 vb1,2,3 and vs1,2,3 (high side supplies, pin 18, 20, 22, 24, 26, 28) vb to vs is the high side supply voltage. the high side circuit can float with respect to vss following the external high side power device emitter/sou rce voltage. due to the low power consumption, the floating driver stage can be supplied by bootstrap topology connected to vcc. the device operating area as a function of the supply voltage is given in figure 12 . details on bootstrap supply section and transient immunity can be found in application note an - gatedrive - 6ed2 - 1 . 3.7 lo1,2,3 and ho1,2,3 (low and high side outputs, pin 14, 15, 16, 19, 23, 27) low side and high side power outputs are specifically designed for pulse operation such as gate drive of igbt and mosfet devices. low side outputs (i.e. lo1,2,3) are state triggered by the respective inputs, while high side outputs (i.e. ho1,2,3) are edge triggered by the respective inputs. in particular, after an under voltage condition of the vbs supply, a new turn - on signal (edge) is necessary to activate the respective high side output, while after a under voltage co ndition of the vcc supply, the low side outputs switch to the state of their respective inputs.
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 10 , 15.04.2015 4 electrical parameters 4.1 absolute maximum ratings all voltages are absolute voltages referenced to v ss - potential unless otherwise specified. all parameters are v alid for t a =25 c. table 3 abs. maximum ratings parameter symbol min. max. unit high side offset voltage (note 1 ) dso28 tssop28 v s v cc - v bs - 6 600 180 v high side offset voltage ( t p <500ns , note 1 ) v cc - v bs C C v b v cc C t p <500ns , note 1 ) v cc C C v b vs. v s ) (internally clamped) v bs - 1 20 high side output voltage ( v ho vs. v s ) v ho - 0.5 v b + 0.5 low side supply voltage (internally clamped) v cc - 1 20 low side supply voltage ( v cc vs. v com ) v ccom - 0.5 25 gate driver ground v com - 5.7 5.7 low side output voltage ( v lo vs. v com ) v lo - 0.5 v ccom + 0.5 input voltage / lin, / hin, en, itrip v in - 1 10 fault output voltage v flt - 0.5 v cc + 0.5 rcin output voltage v rcin - 0.5 v cc + 0.5 power dissipation (to package) note 2 dso28 tssop28 p d C C r th(j - a) C C t j C t s - 40 150 offset voltage slew rate (note 3) d v s /dt 50 v/ns note :the value for esd immunity is 1.0kv ( human body model). esd immunity for pins inside the low side ( i.e. vcc, / hinx, / linx, fault, en, rcin, itrip, vss, com, lox) and esd immunity for pins inside each high side itself ( i.e. vbx, hox, vsx) is guaranteed up to 1.5kv (human body model). n ote 1 : insensitivity of bridge output to negative transient voltage up to C 50v is not subject to production test C verified by design / characterization. external bootstrap diode is mandatory. refer to application note. note 2: consistent power dissipatio n of all outputs . all parameters inside operating range. note 3: not subject of production test, verified by characterisation
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 11 , 15.04.2015 4.2 required operation conditions all voltages are absolute voltages referenced to v ss - potential unless otherwise specified. all parameters are valid for t a =25 c. table 4 required operation conditions parameter symbol min. max. unit high side offset voltage (note 1 ) dso28 tssop28 v b 7 620 200 v low side supply voltage ( v cc vs. v com ) dso28 tssop28 v ccom 10 25 4.3 operating range all voltages are absolute voltages referenced to v ss - potential unless otherwise specified. ( t a = 25c) table 5 operating range parameter symbol min. max. unit high side floating supply offset voltage v s v cc - v bs - 1 500 v high side floating supply offset voltage ( v b vs. v cc , statically) v bcc - 1.0 500 high side floating supply voltage ( v b vs. v s , note 1) v bs 13 17.5 high side output voltage ( v ho vs. v s ) v ho 10 v bs low side output voltage ( v lo vs. v com ) v lo 0 v cc low side supply voltage v cc 13 17.5 low side ground voltage v com - 2.5 2.5 logic input voltages / lin, / hin, en, itrip ( note 2) v in 0 5 fault output voltage v flt 0 v cc rcin input voltage v rcin 0 v cc pulse width for on or off (note 3) t in 1 C t a - 40 95 c note 1 : logic operational for v b ( v b vs. v s s ) > 7,0v note 2 : all input pins ( / hinx, / linx) and en, itrip pin are internally clamped (see abs. maximum ratings) note 3 : in case of input pulse width at / linx and / hinx below 1 s the input pulse may not be transmitted properly
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 12 , 15.04.2015 4.4 static l ogic f unction t able vcc vbs rcin itrip enable fault lo1,2,3 ho1,2,3 < v ccuv C v bsuv C ? v it,th+ 3.3 v 0 0 0 15v 15v > v rcin,th 0 3.3 v high imp /lin1,2,3 /hin1,2,3 15v 15v > v rcin,th 0 0 high imp 0 0 4.5 s tatic p arameters v cc = v bs = 15v unless otherwise specified. all parameters are valid for t a =25 c. table 6 static parameters parameter symbol values unit test condition min. typ. max. high level input voltage v ih 1.7 2.1 2.4 v low level input voltage v il 0.7 0.9 1.1 en positive going threshold v en,th+ 1.9 2.1 2.3 en negative going threshold v en,th - 1.1 1.3 1.5 itrip positive going threshold v it,th+ 380 445 510 mv itrip input hysteresis v it,hys 45 70 rcin positive going threshold v rcin,th - 5.2 6.4 v rcin input hysteresis v rcin,hys - 2.0 - input clamp voltage (/hin, / lin , en, itrip) v in,clmap 9 10.3 12 i in = 4ma input clamp voltage at high impedance (/hin, /lin) v in,float - 5.3 5.8 controller output pin floating high level output voltage lo1,2,3 ho1,2,3 v oh - - v c c - 0.7 v b - 0.7 v c c - 1.4 v b - 1.4 i o = 20ma low level output voltage lo1,2,3 ho1,2,3 v ol - - v com + 0.2 v s + 0.2 v com + 0.6 v s + 0.6 i o = - 20ma v cc and v bs supply undervoltage positive going threshold v ccuv+ v bsuv + 11 11.7 12.5 v cc and v bs supply undervoltage negative going threshold v ccuv C v bsuv C 9.5 9.8 10.8 v v cc and v bs supply undervoltage lockout hysteresis v ccuvh v bsuvh 1.2 1.9 -
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 13 , 15.04.2015 table 6 static parameters parameter symbol values unit test condition min. typ. max. high side leakage current betw. vs and vss i lvs+ - 1 12. 5 a v s = 600v high side leakage current betw. vs and vss i lvs+ 1 - 10 - t j = 125c, v s = 600v high side leakage current between vsx and vsy (x=1,2,3 and y=1,2,3) i lvs C 1 - 10 - t j = 125c v sx - v sy = 600v quiescent current v bs supply (vb only) i qbs1 - 210 400 a ho=low quiescent current v bs supply (vb only) i qbs2 - 210 400 ho=high quiescent current v cc supply (vcc only) i qcc1 - 1.1 1.8 ma v lin =float. quiescent current v cc supply (vcc only) i qcc2 - 1.3 2 v lin =0 , v hin = 3.3 v input bias current i lin+ - 70 100 a v lin =3.3 v input bias current i lin - - 110 200 a v lin =0 input bias current i h in+ - 70 100 v h in =3.3 v input bias current i h in - - 110 200 v h in =0 input bias current (itrip=high) i itrip+ 45 120 v itrip =3.3 v input bias current (en=high) i en+ - 45 120 v enable =3.3 v input bias current rcin (internal current source) i rcin 2.8 v rcin = 2 v mean output current for load capacity charging in range from 3 v (20%) to 6 v (40%) i o+ 120 165 - ma c l =10 nf peak output current turn on (single pulse) i opk+ 1 240 r l = 0 ? t p <10 s mean output current for load capacity discharging in range fr om 12 v (80%) to 9 v (60%) i o - 250 375 - c l =10 nf peak output current turn off (single pulse) i opk - 1 420 r l = 0 ? t p <10 s rcin low on resistance of the pull down transistor r on,rcin - 40 100 v rcin =0.5 v fault low on resistance of the pull down transistor r on,flt - 45 100 v fault =0.5 v 1 not subject of production test, verified by characterisation
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 14 , 15.04.2015 4.6 dynamic parameters v cc = v bs = 15 v , v s = v s s = v com unless otherwise specified. all parameters are valid for t a =25 c. table 7 dynamic parameters parameter symbol values unit test condition min. typ. max. turn - on propagation delay t on 400 530 800 ns v lin/hin = 0 or 3.3 v turn - off propagation delay t off 360 490 760 turn - on rise time t r - 60 100 v lin/hin = 0 or 3.3 v c l = 1 nf turn - off fall time t f - 26 45 shutdown propagation delay enable t en - 780 1 1 00 v en =0 shutdown propagation delay itrip t itrip 400 670 1000 v itrip = 1 v input filter time itrip t itripmin 155 230 380 propagation delay itrip to fault t flt - 420 700 input filter time at lin/hin for turn on and off t filin 120 300 - v lin/hin = 0 & 3.3 v input filter time en t filen 300 600 - fault clear time at rcin after itrip - fault, (c rcin =1nf) t fltclr 1.0 1.9 3.0 ms v lin/hin = 0 & 3.3 v v itrip = 0 dead time dt 150 310 - ns v lin/hin = 0 & 3.3 v matching delay on, max(ton) - min(ton), ton are applicable to all 6 driver outputs mt on - 20 100 external dead time > 500 ns matching delay off, max(toff) - min(toff), toff are applicable to all 6 driver outputs mt off - 40 100 external dead time >500 ns output pulse width matching. pw in - pw out pm 40 100 pw in > 1 s
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 15 , 15.04.2015 5 timing diagrams figure 8 timing of short pulse suppression figure 9 timing of internal deadtime figure 10 enable delay time definition h i n / l i n h i n / l i n h o / l o h o / l o l o w t i n < t f i l i n t i n t i n > t f i l i n t i n t f i l i n h i n / l i n h i n / l i n h o / l o h o / l o h i g h t i n < t f i l i n t i n t i n > t f i l i n t i n t f i l i n l i n 1 , 2 , 3 h i n 1 , 2 , 3 h o 1 , 2 , 3 l o 1 , 2 , 3 1 2 v 3 v 3 v 1 2 v 1 . 6 5 v 1 . 6 5 v d t d t l o 1 , 2 , 3 t e n 3 v h o 1 , 2 , 3 e n
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 16 , 15.04.2015 figure 11 input to output propagation delay times and switching times definition figure 12 operating areas figure 13 itrip - timing l i n 1 , 2 , 3 h i n 1 , 2 , 3 h o 1 , 2 , 3 l o 1 , 2 , 3 1 . 6 5 v 1 . 6 5 v 1 2 v 3 v 3 v 1 2 v p w o u t t o n t o f f t r t f p w i n o n o f f o n r e c o m m e n d e d a r e a o n f o r b i d d e n a r e a o n o n r e c o m m e n d e d a r e a o n o f f 2 0 1 7 . 5 1 3 1 1 . 7 9 . 8 v c c v b s t i c s t a t e v c c m a x , v b s m a x v c c u v + , v b s u v + v c c u v - , v b s u v - v r c i n i t r i p 1 v f a u l t a n y o u t p u t v r c i n , t h 0 . 1 v 0 . 1 v t f l t c l r 0 . 5 v t f l t t i t r i p 3 v
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 17 , 15.04.2015 figure 14 itrip input filter time i t r i p / f a u l t h i g h t i n t i t r i p m i n t i n t i t r i p m i n t f l t c l r
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 18 , 15.04.2015 6 package 6.1 pg - dso - 28 figure 15 package drawing dimensions 80.0 ? 80.0 ? 1.5 mm3 ? therm [ w/m ? k] material fr4 0.3 metal (copper) 70m 388 figure 16 pcb reference layout
eicedriver? 6ed003l06 - f2, 6ed003l02 - f2 datasheet 19 , 15.04.2015 6.2 pg - tssop - 28 footprint for reflow soldering e = 0.65 a = 6.10 l = 1.30 b = 0.40 figure 17 package drawing figure 18 pcb reference layout (according to jedec 1s0p) left: reference layout right: detail of footprint table 8 data of reference layout dimensions material metal (copper) 76.2 ? 114.3 ? 1.5 mm3 fr4 ( ? therm = 0.3 w/mk) 70m ( ? therm = 388 w/mk)
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