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1 for more information www.linear.com/LT8631 v in LT8631 v in 6.5v to 100v v out 5v, 1a 2.2f 0.1f 22h 1m 191k 0.1f 2.2f 25.5k f sw = 400khz 8631 ta01a en/uv pg intv cc rt sync/mode bst sw ind gnd v out fb tr/ss 47f 4.7pf typical a pplica t ion fea t ures descrip t ion 100v, 1a synchronous micropower step-down regulator the lt ? 8631 is a current mode pwm step-down dc/dc converter with internal synchronous switches that provide current for output loads up to 1 a. the wide input range of 3 v to 100 v makes the LT8631 suitable for regulating power from a wide variety of sources, including automotive and industrial systems and 36 v to 72 v telecom supplies. low ripple burst mode operation enables high efficiency operation down to very low output currents while keeping the output ripple below 10mv p-p . resistor programmable 100khz to 1 mhz frequency range and synchronization ca- pability enable optimization between efficiency and external component size. the soft-start feature controls the ramp rate of the output voltage, eliminating input current surge during start-up, while also providing output tracking. a power good flag signals when the output voltage is within 7.5% of the regulated output. undervoltage lockout can be programmed using the en/uv pin. shutdown mode reduces the total quiescent current to < 5 a. the LT8631 is available in a 20- lead tssop package with exposed pad for low thermal resistance and high voltage lead spacing. a pplica t ions l, lt , lt c , lt m , linear technology, burst mode and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. n ultrawide input voltage range: 3v to 100v n output voltage range: 0.8v to 60v n internal synchronous switches n low ripple burst mode ? operation: 16 a i q at 12v in to 5 v out output ripple <10mv p-p 7a i q at 48v in to 5v out output ripple <10mv p-p n low dropout: 99% maximum duty cycle n peak current mode control n fixed frequency operation: 100khz to 1mhz n synchronization input n programmable under voltage lockout n power good flag n flexible output voltage tracking n short-circuit protection n low shutdown current: 5a n tolerates pin open/short faults n thermally enhanced 20-lead tssop with high v oltage lead spacing n automotive supplies n telecom supplies n distributed supply regulation 5v, 1a step-down converter efficiency vs load current load current (a) 0 efficiency (%) 95 90 80 70 85 75 65 60 55 50 0.4 0.2 0.6 0.7 0.8 0.9 8631 ta01b 1 0.30.1 0.5 f sw = 400khz v in = 12v v in = 24v v in = 48v lt 8631 8631f
2 for more information www.linear.com/LT8631 p in c on f igura t ion a bsolu t e maxi m u m r a t ings (note 1) fe package variation fe20(16) 20-lead plastic tssop 1 3 5 6 7 8 9 10 top view 20 18 16 15 14 13 12 11 v in en/uv pg nc sync/mode rt nc tr/ss sw bst intv cc nc ind nc v out fb 21 gnd ja = 40c/w, jc( pad ) = 10c/w exposed pad ( pin 21) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range LT8631efe#pbf LT8631efe#trpbf 8631fe 20-lead plastic tssop C40c to 125c LT8631ife#pbf LT8631ife#trpbf 8631fe 20-lead plastic tssop C40c to 125c LT8631hfe#pbf LT8631hfe#trpbf 8631fe 20-lead plastic tssop C40c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ v in , en / uv , pg ........................................................ 10 0 v ind , v out , ...................................................... 60 v /C 0.3 v sync / mode ............................................................... 6 v fb , tr / ss ................................................................... 4 v operating junction temperature range lt 8631 efe ( note 2) ............................... C 40 c to 125 c lt 8631 ife ( note 2) ................................ C 40 c to 125 c lt 8631 hfe ( note 2) ............................... C 40 c to 150 c storage temperature range .................. C 65 c to 150 c lt 8631 8631f
3 for more information www.linear.com/LT8631 e lec t rical c harac t eris t ics parameter conditions min typ max units en/uv voltage threshold v en/uv rising l 1.14 1.19 1.24 v en/uv voltage hysterisis 13 17 25 mv en/uv input current 5 100 na v in undervoltage lockout v fb = 0.9v l 2.74 2.8 3.05 v quiescent current from v in v en/uv = 0v v fb = 0.9v, v vout = 0v v fb = 0.9v, v vout = 5v l l l 5 16 3.6 11 50 8.0 a a a quiescent current from v out v fb = 0.9v, v vout = 5v l 10 45 a v in current in regulation v vout = 5v, i load = 100a v vout = 5v, v sync/mode = 2v, i load = 100a v vout = 5v, i load = 1ma 90 180 475 160 350 650 a a a feedback bias current v fb = 0.8v C25 C15 na feedback voltage (v fbref ) v vout = 5v, i load = 100ma l 796 808 820 mv feedback voltage line regulation feedback voltage load regulation v in = 7v to 100v, v out = 5v, i load = 500ma v in = 15v, v out = 5v, i load = 100ma to 1a C1.5 0.01 C0.3 0.2 %/v %/a track/soft-start sour ce current v fb = 0.9v, v tr/ss = 0 C6.5 C4.5 C2.5 a track/soft-start voh v fb = 0.9v 2.9 3.0 3.2 v track/soft-start sink current v fb = 0.9v, v tr/ss = 0.1v 15 30 45 a track/soft-start vol v fb = 0v 50 75 mv track/soft-start to feedback offset v tr/ss = 0.4v, v vout = 5v, i load = 100ma C25 5 25 mv track/soft-start sink current por (note 4) v fb = 0.9v, v tr/ss = 0.2v 180 230 a pg leakage current v fb = 0v, v pg = 100v C200 0 200 na pg lower threshold % of v fbref (note 5) v fb rising l C10.5 C7.5 C4.5 % pg upper threshold % of v fbref (note 5) v fb falling l 4.5 7.5 10.5 % pg hysterisis (note 5) 1.4 1.9 2.3 % pg sink current v fb = 0.7v, v pg = 0.2v 900 a switching frequency r rt =187k, v vout = 5v, i load = 100ma r rt = 19.6k, v vout = 5v, i load = 100ma r rt = 8.66k, v vout = 5v, i load = 100ma l 75 460 925 100 500 1000 125 540 1075 khz khz khz minimum switch on t ime v in = 15v, r rt = 8.66k, v vout = 1.5v, i load = 500ma 100 120 ns minimum switch off time v in = 5v, r rt = 8.66k, v vout = 5v, i load = 500ma 190 ns ind to v out burst current (note 6) 280 ma ind to v out peak current (note 7) 1.4 2.1 2.8 a maximum v out current in regulation v in = 7.5v, r rt = 19.6k, v vout = 5v, l = 15h v in = 50v, r rt = 19.6k, v vout = 5v, l = 15h l 1.00 1.2 1.35 1.8 1.8 2.4 a a switch pin leakage current v sw = 0v v sw = 100v, v in =100v 50 0.5 500 2.0 na a top switch on-resistance 775 m bottom switch on-resistance 550 m bst pin current v bst = 18v 180 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t j = 25c. v in = 15v, v en/uv = 2v, unless otherwise specified. (note 2) lt 8631 8631f
4 for more information www.linear.com/LT8631 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t j = 25c. v in = 15v, v en/uv = 2v, unless otherwise specified. (note 2) parameter conditions min typ max units bst pin threshold (note 8) 2.4 v sync/mode pin current v sync/mode = 3v 2 3.4 5.5 a sync/mode threshold 1.0 1.5 2.0 v synchronization range 100 1000 khz note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LT8631efe is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LT8631ife is guaranteed over the full C40c to 125c operating junction temperature range. the LT8631hfe is guaranteed over the full C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 3: the LT8631 includes overtemperature protection that is intended to protect the device during thermal overload conditions. internal junction temperature will exceed 150c when the overtemperature circuitry is active. note 4: an internal power on reset (por) latch is set on the positive transition of the en/uv pin through its threshold or thermal shutdown. the output of the latch activates a current source on the tr/ss pin which typically sinks 230a while discharging the tr/ss capacitor. the latch is reset when the tr/ss pin is driven below the soft-start por threshold or the en/uv pin is taken below its threshold. note 5: the threshold is expressed as a percentage of the feedback reference voltage. note 6: the ind to v out burst current is defined as the maximum value of current flowing from the ind pin to the v out during a switch cycle when operating in burst mode. note 7: the ind to v out peak current is defined as the maximum value of current flowing from the ind pin to the v out during a switch cycle. note 8: the bst pin threshold is defined as the minimum voltage between the bst and sw pins to keep the top switch on. if the the voltage falls below the threshold when the top switch is on, a minimum switch off pulse will be generated. lt 8631 8631f
5 for more information www.linear.com/LT8631 typical p er f or m ance c harac t eris t ics efficiency at v out = 3.3v efficiency shutdown supply current en/uv thresholds v in undervoltage lockout reference voltage efficiency at v out = 5v efficiency at v out = 3.3v efficiency at v out = 5v load current (a) 0 efficiency (%) 95 90 80 70 85 75 65 60 55 50 0.4 0.2 0.6 0.7 0.8 0.9 8631 g01 1 0.30.1 0.5 f sw = 400khz v in = 12v v in = 24v v in = 48v load current (a) 0 efficiency (%) 100 90 95 80 70 85 75 65 60 55 50 0.4 0.2 0.6 0.7 0.8 0.9 8631 g02 1 0.30.1 0.5 f sw = 400khz v in = 12v v in = 24v v in = 48v load current (a) efficiency (%) 8631 g03 100 80 90 60 70 40 50 20 30 0 10 0.00001 0.0001 0.1 1 0.01 0.001 v in = 12v v in = 24v v in = 48v f sw = 400khz load current (a) efficiency (%) 8631 g04 100 80 90 60 70 40 50 20 30 0 10 0.00001 0.0001 0.1 1 0.01 0.001 v in = 12v v in = 24v v in = 48v f sw = 400khz temperature (c) ?50 voltage (v) 2.90 2.85 2.80 2.70 2.75 25 75 100 125 8631 g08 150 0?25 50 temperature (c) ?50 voltage (mv) 812 810 808 806 804 802 798 800 25 75 100 125 8631 g09 150 0?25 50 load = 0ma load = 100ma load = 1a switching frequency (khz) efficiency (%) 100 90 95 80 70 85 75 400 200 600 700 800 900 8631 g05 1000 300 100 500 v in = 12v v out = 5v load = 0.5a i lripple = 0.4a temperature (c) ?50 current (a) 20.0 15.0 17.5 10.0 0 5.0 2.5 12.5 7.5 25 75 100 125 8631 g06 150 0?25 50 temperature (c) ?50 voltage (v) 1.195 1.185 1.190 1.175 1.155 1.165 1.160 1.180 1.170 25 75 100 125 8631 g07 150 0?25 50 en/uv falling en/uv rising lt 8631 8631f
6 for more information www.linear.com/LT8631 typical p er f or m ance c harac t eris t ics burst frequency no load supply current no load supply current sleep quiescent currents peak switch current peak switch current switching frequency minimum on-time switch resistance temperature (c) ?50 frequency (khz) 525 520 515 510 505 500 495 475 490 485 480 25 75 100 125 8631 g10 150 0?25 50 r rt = 19.6k input voltage (v) 0 current (a) 25 20 15 0 10 5 30 50 60 70 80 90 8631 g13 100 2010 40 v out = 3.3v v out = 5v output voltage (v) 2.5 current (a) 20 18 16 12 10 8 6 14 0 4 2 3 3.25 3.5 3.75 8631 g14 4 2.75 i qvin i qvout temperature (c) ?50 current (a) 2.1 2.0 1.9 1.8 1.3 1.7 1.6 1.5 1.4 25 75 100 125 8631 g15 150 0?25 50 duty cycle = 20% duty cycle = 80% duty cycle (%) 0 current (a) 2.3 2.1 1.1 1.9 1.7 1.5 1.3 40 60 80 8631 g16 100 20 temperature (c) ?50 current (a) 60 50 40 30 0 20 10 25 75 100 125 8631 g12 150 0?25 50 v in = 12v v out = 3.3v v out = 5v temperature (c) ?50 resistance () 1.4 1.2 1.0 0.8 0 0.6 0.4 0.2 25 75 100 125 8631 g18 150 0?25 50 top switch bottom switch load current (ma) 0 burst frequency (khz) 450 400 350 300 250 200 0 150 100 50 15 25 30 35 45 45 8631 g11 50 105 20 v in = 12v v out = 5v l = 22h frequency = 400khz temperature (c) ?50 time (ns) 200 180 160 140 120 100 0 80 60 40 20 25 75 100 125 8631 g17 150 0?25 50 load = 500ma on-time lt 8631 8631f
7 for more information www.linear.com/LT8631 typical p er f or m ance c harac t eris t ics line regulation load regulation fb to tr/ss offset voltage soft-start tracking pg high thresholds input voltage (v) 0 change in v out (%) 1.0 0.5 ?1.0 0.0 ?0.5 75 8631 g19 100 25 50 v out = 5v load = 0.5a load current (a) 0 change in v out (%) 1.0 0.5 ?1.0 0.0 ?0.5 0.75 8631 g20 1 0.25 0.5 v in = 12v v out = 5v temperature (c) ?50 v fb ? v tr/ss (mv) 10 9 8 7 6 2 5 4 3 25 75 100 125 8631 g21 150 0?25 50 v tr/ss = 0.4v load = 0.5a tr/ss voltage (v) 0 fb voltage (v) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0 0.3 0.2 0.1 0.3 0.5 0.6 0.7 0.8 0.9 8631 g22 1 0.20.1 0.4 load = 0.5a temperature (c) ?50 pg offset from v ref (%) 12 11 10 9 8 5 7 6 25 75 100 125 8631 g23 150 0?25 50 v fb rising v fb falling pg low thresholds dropout voltage temperature (c) ?50 pg offset from v ref (%) ?5 ?6 ?7 ?8 ?9 ?12 ?10 ?11 25 75 100 125 8631 g24 150 0?25 50 v fb rising v fb falling load current (a) 0 output voltage (v) 5.50 5.25 5.00 4.75 4.50 3.50 4.25 4.00 3.75 0.3 0.5 0.6 0.7 0.8 0.9 8631 g25 1 0.20.1 0.4 v in 5v v out set to 5v burst waveforms front page application v in = 12v load = 5ma v sw 5v/div v out 20mv/div i l 200ma/div 5s/div 8631 g26 lt 8631 8631f
8 for more information www.linear.com/LT8631 typical p er f or m ance c harac t eris t ics burst waveforms switching waveforms switching waveforms load transient response input voltage transient response start-up dropout performance front page application v in = 100v load = 50ma v sw 50v/div v out 20mv/div i l 500ma/div 5s/div 8631 g27 front page application v in = 12v load = 1a v sw 5v/div v out 20mv/div i l 1a/div 1s/div 8631 g28 front page application v in = 100v load = 1a v sw 50v/div v out 20mv/div i l 1a/div 1s/div 8631 g29 front page application 12v to 100v input voltage transient load = 100ma c out = 2 47f v in 20v/div v out 200mv/div 20s/div 8631 g31 front page application 200ma to 800ma load transient v in = 15v i l 200ma/div v out 100mv/div 50s/div 8631 g30 front page application i load = 500ma 50ms/div 8631 g32 v in v out 1v/div lt 8631 8631f
9 for more information www.linear.com/LT8631 p in func t ions v in ( pin 1): the v in pin powers the internal control circuitry and is monitored by an undervoltage lockout comparator. the v in pin is also connected to the drain of the on chip power switch. the v in pin has high di/dt edges and must be decoupled to the gnd pin of the device. the input decouple capacitor should be placed as close as possible to the v in and gnd pins. en/uv (pin 3): the en/uv pin is used to enable the LT8631 or to program the undervoltage lockout threshold with ex - ternal resistors. the l t8631 is in shutdown mode( i q < 5 a) when the en/uv pin voltage is below 1.19 v and active mode when the voltage exceeds 1.19v. tie en/uv to the v in pin if the en/uv feature isnt required. pg (pin 5): the pg pin is an open drain output that sinks current when the feedback voltage deviates from the regula - tion point by 7.5%. the pg pin has 1.9% of hysteresis. nc6 ( pin 6): no internal connection. leave this pin open or connect to gnd. sync/mode (pin 7): the voltage present at the sync/ mode pin determines the LT8631 operating mode. ground this pin for low ripple burst mode operation at low output loads. apply a dc voltage greater than the sync/mode threshold for pulse- skipping operation at low output loads. the LT8631 will synchronize its switching frequency to an external clock applied to the sync/mode pin. the external clock signal must have a duty cycle between 20% and 80% and be within the specified frequency range. the LT8631 will operate in pulse- skipping mode when the sync/ mode pin is driven with an external clock. rt (pin 8): a resistor with a value between 8.66 k and 187k must be connected between the rt pin and the gnd pin. the r t resistor sets the switching frequency . do not leave this pin floating. nc9 (pin 9): no internal connection. leave this pin open or connect to gnd. tr / ss ( pin 10): a capacitor with a minimum value of 100 pf must be connected between the tr/ss pin and the gnd pin. the voltage ramp rate on the tr/ss pin determines the output voltage ramp rate. this pin can also be used for voltage tracking. do not leave this pin floating. fb (pin 11): the fb pin is the negative input to the er- ror amplifier . the output switches to regulate this pin to 0.808v with respect to the gnd pin. v out (pin 12): the v out pin is the output to the internal sense resistor that measures current flowing in the in- ductor. connect the output capacitor from the v out pin to the gnd pin. nc13 (pin 13): no internal connection. leave this pin open or connect to gnd. ind (pin 14): the ind pin is the input to the internal sense resistor that measures current flowing in the inductor. nc15 (pin 15): no internal connection. leave this pin open or connect to gnd. intv cc (pin 16): the intv cc pin is the bypass pin for the internal 3 v regulator. connect a 2.2 f bypass capacitor from the intv cc pin to the gnd pin. do not load the intv cc pin with external circuitry. bst (pin 18): the bst pin is used to provide a drive voltage, higher than the v in voltage, to the topside power switch. place a 0.1 f capacitor between the bst and sw pins as close as possible to the device. sw (pin 20): the sw pin is the output of the internal power switches. place the inductor and bst capacitor as close as possible to keep the sw pcb trace short. gnd ( exposed pad pin 21): the exposed pad gnd pin is the only ground connection for the device. the exposed pad should be soldered to a large copper area to reduce thermal resistance. the gnd pin also serves as small signal ground. for ideal operation all small signal ground paths should connect to the gnd pin at a single point avoiding any high current ground returns. lt 8631 8631f
10 for more information www.linear.com/LT8631 b lock diagra m the LT8631 is a monolithic, constant frequency, current mode step-down dc/dc converter. when the voltage on the en/uv pin is below its 1.19 v threshold, the LT8631 is shutdown and draws less than 5 a from the input supply. when the en/ uv pin is driven above 1.19v , the internal bias circuits turn on generating an internal regulated voltage, 0.808v feedback reference, a 4.5 a soft-start current reference, and a power on reset (por) signal. during power-up the por signal is set and in turn sets the soft-start latch. when the soft-start latch is set, the tr/ss pin will be discharged to ground to ensure proper start-up operation. when the tr/ss pin drops below 50 mv, the figure 1. block diagram o pera t ion soft-start latch is reset. once the latch is reset the soft-start capacitor starts to charge with a typical value of 4.5a. the error amplifier is a transconductance amplifier that compares the fb pin voltage to the lowest voltage present at either the tr/ss pin or an internal 0.808 v reference. since the tr/ss pin is driven by a constant current source, a single capacitor on the soft-start pin will generate a controlled linear ramp on the output voltage. the voltage on the output of the error amplifier ( internal v c node in figure 1) sets the peak current of each switch cycle and also determines when to enable low quiescent current burst mode operation. v in v in 2.8 1.19 8631 bd intv cc v out v out bst sw c4 c3 l1 ind en/uv r3c1 r4 r5 c2 sync/mode rt ss oscillator switch on logic burst detect v c clamp tsd itrip v c 7.5% por por latch ? + ? + uvlo comp rt ref ? + rt amp v in uvlo 50mv intv cc ? + ss comp s r q switch latch intv cc s r q qb ldo intv cc fault slope comp ? + ineg current comp fb gnd pg r1 c5 c6 r2 ?7.5% 0.808 ? ? + error amp ? + fb comp lt 8631 8631f
11 for more information www.linear.com/LT8631 o pera t ion the regulators maximum output current occurs when the internal v c node is driven to its maximum clamp value by the error amplifier. the value of the typical maximum switch current is 2 a. if the current demanded by the output exceeds the maximum current dictated by the internal v c clamp, the tr/ss pin will be discharged, lowering the regulation point until the output voltage can be supported by the maximum current. once the overload condition is removed, the regulator will soft-start from the overload regulation point. en/uv pin control or thermal shutdown will set the soft- start latch, resulting in a complete soft-start sequence. comparators monitoring the fb pin voltage will pull the pg pin low if the output voltage varies more the 7.5% from the feedback reference voltage. the pg comparators have 1.9% of hysteresis. in light load situations ( low v c voltage), the LT8631 oper- ates in burst mode to optimize efficiency. between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 16a. in a typical application, 16a will be consumed from the input supply when regulating with no load. the sync/ mode pin is tied low to use burst mode operation and can be tied to a logic high to use pulse-skipping mode. during pulse-skipping mode and light loads, switch pulses are skipped to regulate the output and the quiescent current will be typically several hundred a. to improve efficiency across all loads, supply current to internal circuitry is sourced from the v out pin when its biased at 3.5 v or above. if the v out pin is below 3.5 v the internal supply current is sourced from v in . the internal oscillator generates a clock signal at a fre- quency determined by the resistor connected from the rt pin to ground. alternatively, if a synchronization signal is detected by the LT8631 sync/mode pin, the internal clock will be generated at the incoming frequency on the rising edge of the synchronization pulse. when the voltage on the v c node rises above the switching threshold, the clock set- pulse sets the driver flip- flop, which turns on the internal top power switch. this causes current from v in , through the top switch, inductor, and internal sense resistor, to increase. when the voltage drop across the internal sense resistor exceeds a predetermined level set by the voltage on the internal v c node, the flip-flop is reset and the internal top switch is turned off. once the top switch is turned off the inductor will drive the volt - age at the sw pin low. the synchronous power switch will turn on, decreasing the current in the inductor, until the next clock cycle or the inductor current falls to zero. however, if the internal sense resistor voltage exceeds the predetermined level at the start of a clock cycle, the flip-flop will not be set resulting in a further decrease in the inductor current. alternatively, if the current through the inductor doesn't exceed the current demanded by the v c voltage during the clock cycle, the top switch will stay on until the required current is reached or the voltage on the boost pin falls below its minimum required value. since the output current is controlled by the internal v c voltage, output regulation is achieved by the error amplifier continuously adjusting the v c voltage. lt 8631 8631f
12 for more information www.linear.com/LT8631 achieving low quiescent current to enhance efficiency at light loads, the LT8631 operates in low ripple burst mode operation, which keeps the out - put capacitor charged to the desired output voltage while minimizing the input quiescent current and output voltage ripple. in burst mode operation the LT8631 delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor. while in sleep mode the LT8631 typically consumes 16a. as the output load decreases, the frequency of single cur - rent pulses decreases ( see figure 2) and the percentage of time the LT8631 is in sleep mode increases, resulting in much higher light load efficiency than for typical convert - ers. by maximizing the time between pulses, the converter quie scent current approaches 16 a for a typical application when there is no output load. therefore, to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as a load current. a pplica t ions i n f or m a t ion while in burst mode operation the peak inductor current is approximately 280 ma resulting in output voltage ripple shown in figure 3. increasing the output capacitance will decrease the output ripple proportionately. as load ramps upward from zero the switching frequency will increase but only up to the switching frequency programmed by the resistor at the rt pin as shown in figure 2. the out - put load at which the LT8631 reaches the programmed frequency varies based on input voltage, output voltage, and inductor choice. figure 2. burst frequency vs load current figure 3. burst mode operation load current (ma) 0 burst frequency (khz) 450 400 350 300 250 200 0 150 100 50 15 25 30 35 8631 f02 40 105 20 v in = 12v v out = 5v l = 22h frequency = 400khz front page application v in = 12v load = 5ma v sw 5v/div v out 20mv/div i l 200ma/div 5s/div 8631 f03 for some applications it is desirable for the LT8631 to operate in pulse-skipping mode. in pulse-skipping mode, the full switching frequency is reached as a lower output load than in burst mode operation at the expense of increased quiescent current. to enable pulse-skipping mode, the sync/mode pin is tied high either to a logic output or to the intv cc pin. when an external clock signal is applied to the sync/mode pin, the LT8631 will operate in pulse-skipping mode. lt 8631 8631f
13 for more information www.linear.com/LT8631 a pplica t ions i n f or m a t ion choosing the output voltage the output voltage is programmed with a resistor divider between the output and the fb pin. choose the 1% resis - tors according to: r1 = r2 v out 0.808 C 1 ? ? ? ? ? ? reference designators refer to the block diagram in figure 1. if low input quiescent current and good light - load efficiency are desired, use large resistor values for the fb resistor divider. the current flowing in the divider acts as a load current, and will increase the no-load input current to the converter, which is approximately: i q = i qvin + i qvout + v out r1 + r2 ? ? ? ? ? ? ? ? ? ? ? ? ? v out v in ? ? ? ? ? ? ? 1 n ? ? ? ? ? ? where i qvin is the quiescent current of the LT8631 and the second term is the quiescent current drawn from the output (iqvout) plus current in the feedback divider reflected to the input of the buck operating at its light load efficiency n. for a 5 v application with r1 = 1 m and r2 = 191k, the feedback divider draws 4.2 a. with v in = 12 v i qvin = 3.6 a, i qvout = 10 a and n = 50%, the no-load quies- cent current is approximately 16 a. for applications with output voltages less than 2.8 v, i qvout = 0 a and i qvin is typically 16 a. graphs of i qvin and i qvout vs v out are in the typical performance characteristics section. when using fb resistors greater than 200 k , a 4.7 pf to 10pf phase lead capacitor should be connected from v out to fb . choosing the switching frequency the LT8631 switching frequency can be programmed over a 100 khz to 1 mhz range by using a resistor tied from rt to ground. a table showing the necessary r t value for a desired switching frequency is shown in table 1. the switching frequency selected determines the efficiency , solution size, and input voltage range for the desired frequency. high frequency operation permits the use of smaller inductor and capacitor values which reduces the overall solution size . however, as the switching frequency increases. efficiency decreases as well as the input voltage range for constant frequency operation. table 1. sw frequency vs r t value frequency (khz) r rt (k) 100 187 200 60.4 300 35.7 400 25.5 500 19.6 600 15.8 700 13.3 800 11.5 900 10 1000 8.66 switching frequency and input voltage range once the switching frequency has been determined, the input voltage range for fixed frequency operation of the regulator can be determined. the minimum input voltage for fixed frequency operation is determined by either the v in undervoltage lockout, or the following equation: v in(min) = v out + v sw(bot) 1C f sw ? t off(min) C v sw(bot) + v sw(top) where v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.775v, ~0.550 v, respec- tively at maximum load), f sw is the switching frequency (set by rt ), and t off(min) is the minimum switch off-time (see the electrical characteristics). if the input voltage falls below v in( min) ( dropout mode), the LT8631 will automatically reduce the switching frequency from the programmed value to obtain the highest possible output voltage. the lower limit on the switching frequency in dropout mode is determined by the boost threshold. when the voltage between the bst and sw pins is less than the boost threshold, a minimum off-time pulse is generated to recharge the boost capacitor. lt 8631 8631f
14 for more information www.linear.com/LT8631 the maximum input voltage for fixed frequency operation is determined by either the 100 v maximum input voltage, or the following equation: f sw(max) = v out + v sw(bot) t on(min) ? v in C v sw(top) + v sw(bot) ( ) where v in is the typical input voltage, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.775v, ~0.550 v, respectively at maximum load) and t on(min) is the minimum top switch on-time ( see the electrical characteristics). if the input voltage rises above v in(max) , the LT8631 will automatically reduce the switching frequency from the programmed value to maintain output regulation. inductor selection and maximum output current a good first choice for the inductor value is: l = v out + v sw(bot) 0.6 ? f sw where f sw is the switching frequency in mhz, v out is the output voltage, and v sw(bot) is the bottom switch drop (~0.550v) and l is the inductor value in h. the inductor must be chosen with an rms current rating that is greater than the maximum expected output load of the application. in addition, the saturation current ( typically labeled isat) rating of the inductor must be higher than the load current plus 1/2 of the inductor ripple current: i l(peak) = i load(max) + 1/2 il where il is the inductor ripple current and i load(max) is the maximum output load for a given application. the peak-to-peak ripple current in the inductor can be calculated as follows: il = v out l ? f sw ? 1C v out v in(max) ? ? ? ? ? ? where f sw is the switching frequency in mhz and l is the value of the inductor in h. therefore, the maximum output current that the LT8631 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. the inductor value may have to be increased if the inductor ripple current does not allow suf - ficient maximum current (i out(max) ) given the switching frequency and maximum input voltage used in the desired application. overload or short-circuit conditions can cause the induc - tor current to exceed the LT8631's peak current limit in less than the typical minimum on-time ( tonmin) of 100ns. once the LT8631's typical peak current limit ( ilimpk) of 2a is exceeded, it will not switch on until the current in the inductor has dropped below the peak current limit. if the loaded/shorted condition still exists when the LT8631 resumes switching, the maximum inductor current will be greater than the LT8631 peak current and at worst case will be: i l(max) = v inmax l ? tonmin + ilimpk the LT8631 safely tolerates this condition. however, if this condition can occur, the isat rating of the inductor should be increased from i l(peak) to i l(max) . the optimum inductor for a given application may differ from the one indicated by this design guide. a larger value inductor provides a higher maximum load current and reduces the output voltage ripple. for applications requir - ing smaller load currents, the value of the inductor may be lower and the LT8631 may operate with higher ripple current. this allows use of a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current. for more information about maximum output current and discontinuous operation, see linear technologys application note 44. finally, for duty cycles greater than 50% ( v out /v in > 0.5), a minimum inductance is required to avoid subharmonic oscillation. see application note 19. input capacitor selection bypass the LT8631 input with a 2.2 f or higher ceramic capacitor of x7r or x5r type placed as close as possible a pplica t ions i n f or m a t ion lt 8631 8631f
15 for more information www.linear.com/LT8631 to the v in pin and ground. y5v types have poor perfor- mance over temperature and applied voltage, and should not be used. note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a low performance electrolytic capacitor. a word of caution regarding the use of ceramic capacitors at the input. a ceramic input capacitor can combine with stray inductance to form a resonant tank circuit. if power is applied quickly ( for example, by plugging the circuit into a live power source) this tank can ring, doubling the input voltage and damaging the LT8631. the solution is to either clamp the input voltage or dampen the tank circuit by adding a lossy capacitor in parallel with the ceramic capacitor. for details, see application note 88. output capacitor selection the output capacitor has two essential functions. along with the inductor, it filters the square wave generated by the LT8631 to produce the dc output. in this role it determines the output ripple, thus low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the LT8631's control loop. since the LT8631 uses current mode control, it does not require the presence of output capacitor series resistance ( esr) for stability. low esr or ceramic capacitors should be used to achieve very low output ripple and small circuit size. a 47 f, x5r or x7r ceramic capacitor with a voltage rating greater than the desired output voltage is an excellent first choice for most applications. the 47 f output capacitor will provide low output ripple with good transient response. increasing the value will reduce the output voltage ripple and improve transient response, but may increase application cost and require more board space. decreasing the value may save cost and board space but will increase output voltage ripple, degrade transient performance, and may cause loop instability. increasing or decreasing the output capacitor may require increasing or decreasing the 4.7pf feedforward capacitor placed between the v out and fb pins to optimize transient response. see the typical ap- plications section in the data sheet for suggested output and feedforward capacitor values. note that even x5r and x 7r type ceramic capacitors have a dc bias effect which reduces their capacitance when a dc voltage is applied. it is not uncommon for capacitors offered in the smallest case sizes to lose more than 50% of their capacitance when operated near their rated volt - age. as a result it is sometimes necessary to use a larger capacitance value, larger case size, or use a higher voltage rating in order to realize the intended capacitance value. consult the manufacturers data for the capacitor you select to be assured of having the necessary capacitance for the application. ceramic capacitors ceramic capacitors are small, robust, and have very low esr. however, ceramic capacitors can cause problems when used with the LT8631 due to their piezoelectric nature. when in burst mode operation, the LT8631's switching frequency depends on the load current, and at very light loads the LT8631 can excite the ceramic capacitor at audio frequencies, generating audible noise. since the LT8631 operates at a lower current limit during burst mode opera - tion, the noise is typically very quiet to the casual ear. if this noise is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. low noise ceramic capacitors are also available. enable pin the LT8631 is in shutdown when the en/uv pin is low and active when the pin is high. the rising threshold of the en/uv comparator is 1.19 v, with 17 mv of hysteresis. the en/uv pin can be tied to v in if the shutdown feature is not used, or tied to a logic level if shutdown control is required. adding a resistor divider from v in to en/uv programs the LT8631 to regulate the output only when v in is above a desired voltage ( see the block diagram). typically, the en/uv threshold is used in situations where the supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source , a pplica t ions i n f or m a t ion lt 8631 8631f
16 for more information www.linear.com/LT8631 so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. the en/uv threshold prevents the regulator from operating at source voltages where the problems might occur. this threshold can be adjusted by setting the values r3 and r4 such that they satisfy the following equation: v en threshold = r3 r4 + 1 ? ? ? ? ? ? ? 1.19v where the LT8631 will remain off until v in is above the en/uv threshold. due to the comparators hysteresis, switching will not stop until the input falls slightly below the threshold voltage. when operating in burst mode operation for light load currents, the current through the en/uv resistor network can easily be greater than the supply current consumed by the LT8631. therefore, the en/uv resistors should be large to minimize their effect on efficiency at low loads. intv cc regulator an internal low dropout ( ldo) regulator produces the 3v supply from v in that powers the drivers and the internal bias circuitry. the intv cc can supply enough current for the LT8631's circuitry and must be bypassed to ground with a minimum of 2.2 f ceramic capacitor. good bypass - ing is necessary to supply the high transient currents required by the power mosfet gate drivers. to improve efficiency, the internal regulator draws power from the v out pin when the output voltage is 3.5 v or higher. if the v out pin is below 3.5 v, the internal regulator will consume current from v in . applications with high input voltage and high switching frequency where the internal regulator pulls current from v in will increase die temperature because of the higher power dissipation across the regulator. do not connect an external load to the intv cc pin. soft-start and output voltage tracking the LT8631 regulates its output to the lowest voltage present at either the tr/ss pin or an internal 0.808 v reference. a capacitor from the tr/ss pin to ground is charged by an internal 4.5 a current source resulting in a linear output ramp from 0 v to the regulated output whose duration is given by: t ramp = c tr / ss ? 0.808v 4.5a at power-up, a reset signal ( por) sets the soft-start latch and discharges the tr/ss pin with to approximately 0v to ensure proper start-up. the tr/ss pin has a maximum current sink capability 230 a. if the tr/ss pin is used to as a track function for an external voltage, the maximum sink current must not be exceeded during startup. exceeding the maximum tr/ss sink current will inhibit operation. when the tr/ss pin is fully discharged, the latch is reset and the internal 4.5 a current source starts to charge the tr/ss pin. when the tr/ss pin voltage is below ~50mv, the v c pin is pulled low which disables switching. as the tr/ss pin voltage rises above 50 mv, the v c pin is released and the output voltage is regulated to the tr/ss voltage. when the tr/ss pin voltage exceeds the internal 808mv reference, the output is regulated to the reference. the tr/ss pin voltage will continue to rise to ~3v. the soft-start latch is set during several fault conditions: en/uv pin is below 1.19 v, intv cc has fallen too low, v in is too low, or thermal shutdown . once the latch is set, the tr/ss pin will discharge to ~0 v and a new startup sequence will begin. if the load exceeds the maximum output switch current, the output will start to drop causing the internal v c clamp to be activated. as long as the v c node is clamped, the tr/ ss pin will be discharged. as a result, the output will be regulated to the highest voltage that the maximum output current can support. for example, if the output on the front page application is loaded by 2 the tr/ss pin will drop to 0.48 v, regulating the output at 3 v. once the overload condition is removed, the output will soft-start from the temporary voltage level to the normal regulation point. since the tr/ss pin is pulled up to the 3 v rail and has to discharge to 0.808 v before taking control of regulation, momentary overload conditions will be tolerated without a pplica t ions i n f or m a t ion lt 8631 8631f
17 for more information www.linear.com/LT8631 a sort-start recovery. the typical time before the tr/ss pin takes control is: t tr / ss(control) = c tr / ss ? 2.2v 30a output power good when the LT8631's output voltage is within the 7.5% window of the regulation point (v fbref ) , typically 0.74v to 0.86 v, the output voltage is considered good and the open-drain pg pin is a high impedance node, and is typically pulled high with an external resistor. otherwise, the internal pull-down device will pull the pg pin low. to prevent glitching both the upper and lower thresholds include 1.9% of hysteresis. the pg pin is also actively pulled low during several fault conditions: en/uv pin is below 1.19v, v in undervoltage, or thermal shutdown. synchronization to select low ripple burst mode operation, tie the sync/ mode pin below 1v ( this can be ground or a logic low output). to synchronize the LT8631 oscillator to an external frequency connect a square wave ( with a 20% to 80% duty cycle) to the sync/mode pin. the square wave amplitude should have valleys that are below 1 v and peaks above 2 v. the LT8631 will not enter burst mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. the LT8631 may be synchronized over a 100 khz to 1 mhz range. the rt resistor should be chosen to set the LT8631 switching frequency 10% below the lowest synchronization input. for example, if the synchronization signal will be 500 khz, the rt should be selected for 450 khz. the slope compensation is set by the rt value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage, and output voltage. since the synchronization frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by rt , then the slope compensation will be sufficient for all synchronization frequencies. for some applications it is desirable for the LT8631 to operate in pulse-skipping mode. in pulse-skipping mode, the full switching frequency is reached at a slightly lower output load than in burst mode operation at the expense of increased quiescent current. to enable pulse-skipping mode, the sync/mode pin is tied high either to a logic output or to the intv cc pin. the LT8631 does not operate in forced continuous mode regardless of sync/ mode signal. connect the sync/ mode pin to gnd if it is not used in the application. shorted and reverse input protection if the inductor is chosen so that it wont saturate exces- sively, the LT8631 will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the LT8631 is absent. this may occur in battery charging applications or in battery back-up systems where a battery or some other supply is diode ored with the LT8631's output. if the v in pin is allowed to float and the en/uv pin is held high ( either by a logic signal or because it is tied to v in ), then the LT8631's internal circuitry will pull its quiescent current through its sw pin. this is acceptable if the system can tolerate ~6 ma in this state. if the en pin is grounded the sw pin current will drop to near 5 a. however, if the v in pin is grounded while the output is held high, regard- less of en, parasitic body diodes inside the LT8631 can pull current from the output through the sw pin and the v in pin. figure 4 shows a connection of the v in and en/ uv pins that will allow the LT8631 to run only when the input voltage is present and that protects against a shorted or reversed input. a pplica t ions i n f or m a t ion figure 4. reverse input voltage protection v in v in d1 LT8631 en/uv gnd 8631 f04 c1 lt 8631 8631f
18 for more information www.linear.com/LT8631 pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 5 shows the recommended component placement with trace, ground plane, and via locations. note that large, switched cur - rents flow in the LT8631's v in pin and the input capacitor (c1). the loop formed by the input capacitor should be as small as possible by placing the capacitor adjacent to the v in pin and ground plane. when using a physically large input capacitor the resulting loop may become too large in which case using a small case/value capacitor placed close to the v in pin and ground plane plus a larger capacitor further away is preferred. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. the sw and bst nodes should be as small as possible. finally, keep the fb and rt nodes small so that the ground traces will shield them from the sw and bst nodes. the exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also acts as a heat sink thermally. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the LT8631 to additional ground planes within the circuit board and on the bottom side. high temperature considerations for higher ambient temperatures, care should be taken in the layout of the pcb to ensure good heat sinking of the LT8631. the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the LT8631. a pplica t ions i n f or m a t ion v out 8631 f05 outline of local ground plane fb ind intv cc 11 12 13 14 15 16 18 bst sw c1 c2 c3 c4 c5 c6 r5 r1 r2 l1 20 v in tr/ss rt pg en/uv sync 1 3 5 6 7 8 9 10 vias to ground plane figure 5. recommended pcb layout for the LT8631 lt 8631 8631f
19 for more information www.linear.com/LT8631 a pplica t ions i n f or m a t ion bst d1 l1 ind sw LT8631 gnd 8631 f06 c3 figure 6. external schottky catch diode figure 7. LT8631 efficiency with/without external schottky placing additional vias can reduce thermal resistance further. the maximum load current should be derated as the ambient temperature approaches the maximum junction rating. power dissipation within the LT8631 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. the die temperature is calculated by multiplying the LT8631 power dissipation by the thermal resistance from junction to ambient. if safe junction temperature is exceeded , the LT8631 will shutdown and restart with a por sequence. external schottky catch diode for high temperature, high input voltage and high output load applications, adding a schottky catch diode ( figure 6), will lower the LT8631 junction temperature by increasing efficiency (figure 7). use a low leakage schottky diode rated greater than 2 a with a reverse voltage greater than the maximum input voltage for the application. a complete application circuit with the additional schottky can be found in the typical applications section. load current (ma) 0 efficiency (%) 100 95 90 85 80 50 75 70 65 60 55 300 500 600 700 8631 f07 1000 800 900 200100 400 t ambient = 100c f sw = 400khz v in = 12v without schottky v in = 12v with schottky v in = 48v without schottky v in = 48v with schottky lt 8631 8631f
20 for more information www.linear.com/LT8631 typical a pplica t ions 400khz, 3.3v, 1a step-down converter 1mhz, 3.3v, 1a step-down converter 1mhz, 5v, 1a step-down converter v in LT8631 v in 4.5v to 70v (100v transient) v out 3.3v, 1a 2.2f 0.1f 15h 1m 324k 0.1f 4.7pf 2.2f 25.5k f sw = 400khz l: wrth 7447779115 8631 ta02 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 47f 1210 16v, x7r gnd v in LT8631 v in 4.5v to 30v (100v transient) v out 3.3v, 1a 2.2f 0.1f 4.7h 1m 324k 0.1f 4.7pf 2.2f 8.66k f sw = 1mhz l: wrth 7447779004 8631 ta03 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 47f 1210 16v, x7r gnd v in LT8631 v in 6.5v to 50v (100v transient) v out 5v, 1a 2.2f 0.1f 6.8h 1m 191k 0.1f 2.2f 8.66k f sw = 1mhz l: wrth 7447779006 8631 ta04 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 22f 0805 16v, x7r 4.7pf gnd lt 8631 8631f
21 for more information www.linear.com/LT8631 typical a pplica t ions 200khz, 1.8v, 1a step-down converter 5v, low ripple 1a step-down converter 1mhz, 24v, 0.5a step-down converter v in LT8631 v in 6.5v to 100v v out 5v, 1a 2.2f 0.1f 22h 1m 191k 0.1f 2.2f 25.5k f sw = 400khz l: tdk slf1o145t-22om1r9 8631 ta05 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 47f 4 1210, 16v 47pf gnd v in LT8631 v in 3v to 50v (100v transient) v out 1.8v, 1a 2.2f 33h 487k 390k 0.1f 4.7pf 2.2f 60.4k f sw = 200khz l: wrth 744771133 8631 ta06 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 100f 1210 6.3v, x7r 0.1f gnd v in LT8631 v in 25v to 100v v out 24v, 0.5a 2.2f 22h 953k 33k 0.1f 4.7pf 2.2f 8.66k f sw = 1mhz l: tdk slf1o145t-22om1r9 8631 ta07 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 22f 1210 25v, x7r 0.1f gnd lt 8631 8631f
22 for more information www.linear.com/LT8631 typical a pplica t ions 400khz, 12v/250ma, 3.3v/2.5a dual step-down converter 400khz, 5v/1a high voltage/temperature step-down converter v in lt8610 0.1f l2, 8.2h 0.1f 8631 ta08 en/uv intv cc tr/ss sync bst sw bias fb rt pgnd gnd 1f v in LT8631 v in 13.5v to 100v v out1 12v, 250ma 2.2f l1 47h 1m 100k 71.5k 0.1f 4.7pf 2.2f 35.7k l1: wrth 744771147 l2: vishay ihlp2525czer8r2mo1 clock input 400khz en/uv intv cc rt sync/mode bst sw ind v out fb tr/ss 47f 1210 16v, x7r pg 110k 412k v out2 3.3v, 2.5a 1m 68f 4.7pf 0.1f v in LT8631 v in 48v to 100v v out 5v, 1a 2.2f 0.1f 1m 191k 0.1f 4.7pf 2.2f 25.5k f sw = 400khz l: vishay ihlp2525czer220m8a 8631 ta09 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 47f 1210 16v, x7r 1m 27k 22h dlfs2100 lt 8631 8631f
23 for more information www.linear.com/LT8631 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. fe20(16) (cb) tssop rev 0 0512 0.09 ? 0.20 (.0035 ? .0079) 0 ? 8 0.25 ref recommended solder pad layout 0.50 ? 0.75 (.020 ? .030) 4.30 ? 4.50* (.169 ? .177) 1 3 5 6 7 8 9 10 111214 13 6.40 ? 6.60* (.252 ? .260) 3.86 (.152) 2.74 (.108) 20 18 16 15 1.20 (.047) max 0.05 ? 0.15 (.002 ? .006) 0.65 (.0256) bsc 0.195 ? 0.30 (.0077 ? .0118) typ 2.74 (.108) 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 3.86 (.152) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package variation: fe20(16) 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1924 rev ?) exposed pad variation cb lt 8631 8631f
24 for more information www.linear.com/LT8631 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 ? linear technology corporation 2015 lt 0715 ? printed in usa (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT8631 r ela t e d p ar t s typical a pplica t ion part number description comments lt8620 65v, 2a, synchronous step-down dc/dc, converter v in : 3.4v to 65v, v out(min) = 0.97v, i q = 2.5a, i sd < 1ma, msop-16e and 3mm 5mm qfn packages lt 3991 55v, 1.2a, micropower step-down dc/dc, converter with i q = 2.8a v in : 4.2v to 55v, v out(min) = 1.20v, i q = 2.8a, i sd < 1a, 3mm 3mm dfn-10 and msop-10e packages lt8610 42v, 2.5a, synchronous micropower step-down dc/dc, converter with i q = 2.5a v in : 3.4v to 42v, v out(min) = 0.97v, i q : 2.5a, i sd : <1a, tssop16e lt8614 42v, 4a, synchronous micropower step-down dc/ dc, converter with i q = 1.7a v in : 3.4v to 42v, v out(min) = 0.97v, i q : 1.7a, i sd : <1a, qfn-18 lt c ? 3630a 76v, 500ma synchronous step-down dc/dc converter v in : 4v to 76v, v out(min) = 0.8v, i q = 12a, i sd = 3a, 3mm 5mm dfn-16, msop-16(12)e ltc 3637 76v, 1a nonsynchronous step-down dc/dc converter v in : 4v to 76v, v out(min) = 0.8v, i q = 12a, i sd = 3a, 3mm 5mm dfn-16, msop-16(12)e ltc 3638 140v, 250ma synchronous step-down dc/dc converter v in : 4v to 140v, v out(min) = 0.8v, i q = 12a, i sd < 1ma, msop-16e package ltc3639 150v, 100ma synchronous step-down regulator v in : 4v to 150v, v out(min) = 0.8v, i q = 12a, i sd = 1.4a, msop-16(12)e 12v, 1a, step-down converter v in LT8631 v in 13.5v to 100v v out 12v, 1a 2.2f 47h 1m 71.5k 0.1f 10pf 2.2f 19.6k f sw = 500khz l: wrth 744771147 8631 ta10 en/uv pg intv cc rt sync/mode bst sw ind v out fb tr/ss 47f 1210 16v, x7r 0.1f gnd lt 8631 8631f

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