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1. general description the hef4094b-q100 is an 8-stage serial shift register. it has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs qp0 to qp7. the parallel outputs may be connec ted directly to common bus lines. data is shifted on positive-going cloc k transitions. the data in each shift register stage is transferred to the storage register when th e strobe (str) input is high. data in the storage register appears at the outputs whenev er the output enable (oe) signal is high. two serial outputs (qs1 and qs2) are available for cascading a number of hef4094b-q100 devices. serial data is ava ilable at qs1 on positive-going clock edges to allow high-speed operation in cascaded system s with a fast clock rise time. the same serial data is available at qs2 on the next negative going clock edge. this is used for cascading hef4094b-q100 devices when the clock has a slow rise time. it operates over a recommended v dd power supply range of 3 v to 15 v referenced to v ss (usually ground). connect unused inputs to v dd , v ss , or another input. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? fully static operation ? 5 v, 10 v, and 15 v parametric ratings ? standardized symmetrical output characteristics ? esd protection: ? mil-std-833, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? complies with jedec standard jesd 13-b hef4094b-q100 8-stage shift-and-store register rev. 3 ? 4 july 2013 product data sheet
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 2 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 3. ordering information 4. functional diagram table 1. ordering information all types operate from ? 40 ? c to +125 ? c. type number package name description version hef4094bt-q100 so16 plastic small outline pa ckage; 16 leads; body width 3.9 mm sot109-1 HEF4094BTT-Q100 tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 fig 1. functional diagram fig 2. logic symbol 001aaf119 8-stage shift register 8-bit storage register 3-state outputs d 2 qs2 10 qs1 qp0 4 5 6 7 14 13 12 11 qp1 qp2 qp3 qp4 qp5 qp6 qp7 9 cp 3 str 1 oe 15 15 2 oe d cp str 31 qp0 qp1 qp2 qp3 qp4 qp5 qp6 qp7 qs1 qs2 9 10 4 5 6 7 14 13 12 11 001aaf111
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 3 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 5. pinning information 5.1 pinning fig 3. logic diagram 001aag799 d d cp cp q ff 0 d le q latch 0 d cp q ff 7 d le q latch 7 d cp q stages 1 to 6 stage 0 stage 7 qp2 qp0 d qs2 qs1 le q latch qp1 qp4 qp3 qp6 qp5 qp7 str oe fig 4. pin configuration sot109-1 f ig 5. pin configuration sot403-1 +()%4 675 9 '' ' 2( & 3 43 43 43 43 43 43 43 43 46 9 6 6 46 ddd +()%4 675 9 '' ' 2( & 3 43 43 43 43 43 43 43 43 46 9 6 6 46 ddd
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 4 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 5.2 pin description 6. functional description [1] at the positive clock edge, the information in the 7th regist er stage is transferred to the 8th register stage and the qsn o utputs. h = high voltage level; l = low voltage level; x = don?t care; ? = positive-going transition; ? = negative-going transition; z = high-impedance off-state; nc = no change; q6s = the data in register stage 6 before the low to high clock transition; q7s = the data in register stage 7 before the high to low clock transition. table 2. pin description symbol pin description str 1 strobe input d 2 data input cp 3 clock input qp0 to qp7 4, 5, 6, 7, 14, 13, 12, 11 parallel output v ss 8 ground supply voltage qs1 9 serial output qs2 10 serial output oe 15 output enable input v dd 16 supply voltage table 3. function table [1] inputs parallel outputs serial outputs cp oe str d qp0 qpn qs1 qs2 ? l xxzzq6snc ? l xxzzncq7s ? hl xncncq6snc ? hhl l qpn ? 1q6s nc ? hhhhqpn ? 1q6s nc ? h h h ncncncq7s
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 5 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 7. limiting values [1] for so16 package: p tot derates linearly wi th 8 mw/k above 70 ? c. for tssop16 package: p tot derates linearly with 5.5 mw/k above 60 ? c. 8. recommended operating conditions fig 6. timing diagram 001aaf117 clock input data input strobe input output enable input internal q0s (ff 0) output qp0 internal q6s (ff 6) output qp6 serial output qs1 serial output qs2 z-state z-state table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to v ss = 0 v (ground). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +18 v i ik input clamping current v i < ? 0.5 v or v i >v dd + 0.5 v - ? 10 ma v i input voltage ? 0.5 v dd + 0.5 v i ok output clamping current v o < ? 0.5 v or v o >v dd + 0.5 v - ? 10 ma i i/o input/output current - ? 10 ma i dd supply current - 50 ma t stg storage temperature ? 65 +150 ?c t amb ambient temperature ? 40 +125 ?c p tot total power dissipation [1] - 500 mw p power dissipation per output - 100 mw table 5. recommended operating conditions symbol parameter conditions min typ max unit v dd supply voltage 3 - 15 v v i input voltage 0 - v dd v t amb ambient temperature in free air ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v dd = 5 v --3.75 ? s/v v dd = 10 v --0.5 ? s/v v dd = 15 v --0.08 ? s/v
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 6 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 9. static characteristics table 6. static characteristics v ss = 0 v; v i =v ss or v dd ; unless otherwise specified. symbol parameter conditions v dd t amb = ? 40 ?c t amb = +25 ?c t amb = +85 ? c t amb = +125 ?c unit min max min max min max min max v ih high-level input voltage ?i o ? < 1 ? a 5 v 3.5 - 3.5 - 3.5 - 3.5 - v 10 v7.0-7.0-7.0- 7.0 -v 15 v 11.0 - 11.0 - 11.0 - 11.0 - v v il low-level input voltage ?i o ? < 1 ? a 5 v - 1.5 - 1.5 - 1.5 - 1.5 v 10 v - 3.0 - 3.0 - 3.0 - 3.0 v 15 v - 4.0 - 4.0 - 4.0 - 4.0 v v oh high-level output voltage ?i o ? < 1 ? a 5 v 4.95 - 4.95 - 4.95 - 4.95 - v 10 v 9.95 - 9.95 - 9.95 - 9.95 - v 15 v 14.95 - 14.95 - 14.95 - 14.95 - v v ol low-level output voltage ?i o ? < 1 ? a 5 v - 0.05 - 0.05 - 0.05 - 0.05 v 10 v - 0.05 - 0.05 - 0.05 - 0.05 v 15 v - 0.05 - 0.05 - 0.05 - 0.05 v i oh high-level output current v o = 2.5 v 5 v - ? 1.7 - ? 1.4 - ? 1.1 - ? 1.1 ma v o = 4.6 v 5 v - ? 0.64 - ? 0.5 - ? 0.36 - ? 0.36 ma v o = 9.5 v 10 v - ? 1.6 - ? 1.3 - ? 0.9 - ? 0.9 ma v o = 13.5 v 15 v - ? 4.2 - ? 3.4 - ? 2.4 - ? 2.4 ma i ol low-level output current v o = 0.4 v 5 v 0.64 - 0.5 - 0.36 - 0.36 - ma v o = 0.5 v 10 v 1.6 - 1.3 - 0.9 - 0.9 - ma v o = 1.5 v 15 v 4.2 - 3.4 - 2.4 - 2.4 - ma i oz off-state output current qpn output is high; v o =15v 15 v - 0.4 - 0.4 - 12 - 12 ? a i i input leakage current 15 v - ? 0.1 - ? 0.1 - ? 1.0 - ? 1.0 ? a i dd supply current all valid input combinations; i o =0a 5 v - 5 - 5 - 150 - 150 ? a 10 v - 10 - 10 - 300 - 300 ? a 15 v - 20 - 20 - 600 - 600 ? a c i input capacitance ---7.5-- - -pf
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 7 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 10. dynamic characteristics table 7. dynamic characteristics v ss = 0 v; t amb = 25 ? c; for test circuit see figure 11 ; unless otherwise specified. symbol parameter conditions v dd extrapolation formula min typ max unit t phl high to low propagation delay cp to qs1; see figure 7 5 v [1] 108 ns + (0.55 ns/pf)c l - 135 270 ns 10 v 54 ns + (0.23 ns/pf)c l - 65 130 ns 15 v 42 ns + (0.16 ns/pf)c l - 50 100 ns cp to qs2; see figure 7 5 v 78 ns + (0.55 ns/pf)c l - 105 210 ns 10 v 39 ns + (0.23 ns/pf)c l - 50 100 ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns cp to qpn; see figure 7 5 v 138 ns + (0.55 ns/pf)c l - 165 330 ns 10 v 64 ns + (0.23 ns/pf)c l - 75 150 ns 15 v 47 ns + (0.16 ns/pf)c l - 55 110 ns str to qpn; see figure 8 5 v 83 ns + (0.55 ns/pf)c l - 110 220 ns 10 v 39 ns + (0.23 ns/pf)c l - 50 100 ns 15 v 27 ns + (0.16 ns/pf)c l -3570ns t plh low to high propagation delay cp to qs1; see figure 7 5 v [1] 78 ns + (0.55 ns/pf)c l - 105 210 ns 10 v 39 ns + (0.23 ns/pf)c l - 50 100 ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns cp to qs2; see figure 7 5 v 78 ns + (0.55 ns/pf)c l - 105 210 ns 10 v 39 ns + (0.23 ns/pf)c l - 50 100 ns 15 v 32 ns + (0.16 ns/pf)c l -4080ns cp to qpn; see figure 7 5 v 123 ns + (0.55 ns/pf)c l - 150 300 ns 10 v 59 ns + (0.23 ns/pf)c l - 70 140 ns 15 v 47 ns + (0.16 ns/pf)c l - 55 110 ns str to qpn; see figure 8 5 v 73 ns + (0.55 ns/pf)c l - 100 200 ns 10 v 34 ns + (0.23 ns/pf)c l -4590ns 15 v 27 ns + (0.16 ns/pf)c l -3570ns t t transition time 5 v [1] 10 ns + (1.00 ns/pf)c l - 60 120 ns 10 v 9 ns + (0.42 ns/pf)c l -3060ns 15 v 6 ns + (0.28 ns/pf)c l -2040ns t pzh off-state to high propagation delay oe to qpn; see figure 9 5 v - 40 80 ns 10 v - 25 50 ns 15 v - 20 40 ns t pzl off-state to low propagation delay oe to qpn; see figure 9 5 v - 40 80 ns 10 v - 25 50 ns 15 v - 20 40 ns t phz high to off-state propagation delay oe to qpn; see figure 9 5 v - 75 150 ns 10 v - 40 80 ns 15 v - 30 60 ns
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 8 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register [1] the typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (c l in pf). t plz low to off-state propagation delay oe to qpn; see figure 9 5 v - 80 160 ns 10 v - 40 80 ns 15 v - 30 60 ns t su set-up time d to cp; see figure 10 5 v 6030- ns 10 v 20 10 - ns 15 v 15 5 - ns t h hold time d to cp; see figure 10 5 v +5 ? 15 - ns 10 v 20 5 - ns 15 v 20 5 - ns t w pulse width minimum low clock pulse; see figure 7 5 v 6030- ns 10 v 30 15 - ns 15 v 24 12 - ns minimum high strobe pulse; see figure 8 5 v 4020- ns 10 v 30 15 - ns 15 v 24 12 - ns f max maximum frequency see figure 7 5 v 5 10 - mhz 10 v 11 22 - mhz 15 v 1428- mhz table 7. dynamic characteristics ?continued v ss = 0 v; t amb = 25 ? c; for test circuit see figure 11 ; unless otherwise specified. symbol parameter conditions v dd extrapolation formula min typ max unit table 8. dynamic power dissipation v ss = 0 v; t r = t f ? 20 ns; t amb = 25 ? c. symbol parameter v dd typical formula for p d ( ? w) where: p d dynamic power dissipation 5 v p d = 2100 ? f i + ? (f o ? c l ) ? v dd 2 f i = input frequency in mhz, f o = output frequency in mhz, c l = output load capacitance in pf, v dd = supply voltage in v, ? (f o ? c l ) = sum of the outputs. 10 v p d = 9700 ? f i + ? (f o ? c l ) ? v dd 2 15 v p d = 26000 ? f i + ? (f o ? c l ) ? v dd 2
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 9 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 11. waveforms measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 7. clock to outputs propagation delays, and clock pulse width and maximum frequency 1/f max t w t phl t plh v i gnd v oh v ol qpn, qs1 output cp input v m v m 001aaf113 t phl t plh v oh v ol qs2 output v m table 9. measurement points supply voltage input output v dd v m v m v x v y 5 v to 15 v 0.5v dd 0.5v dd 0.1v dd 0.9v dd measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 8. strobe to output propagation delays, and strobe pulse width, set up and hold times t w t phl t plh v i gnd v oh v ol qpn output str input v m v m 001aaj058
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 10 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 9. 3-state output enable and disable times for oe input 001aai545 t plz t phz outputs disabled outputs enabled outputs enabled output low-to-off off-to-low output high-to-off off-to-high oe input v m v i v ol v oh gnd v y v x t pzl t pzh v m v m v dd gnd measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 10. data input data set up and hold times 001aaf115 gnd gnd t h t su t h t su v m v m v m v i v oh v ol v i qpn, qs1, qs2 output cp input d input
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 11 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register a. input waveform b. test circuit test data is given in table 10 . definitions for test circuit: dut = device under test. c l = load capacitance including jig and probe capacitance. r l = load resistance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. fig 11. test circuit v m v m t w t w 10 % 90 % 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % 90 % 10 % t f t r t r t f 001aaj781 001aaj915 v ext v dd v i v o dut c l r t r l g table 10. test data supply voltage input v ext load v dd v i t r , t f t phl , t plh t phz , t pzh t plz , t pzl c l r l 5 v to 15 v v ss or v dd ? 20 ns open v ss v dd 50 pf 1 k ?
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 12 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 12. application information some examples of applications for the hef4094b-q100 are: ? serial-to-parallel data conversion ? remote control holding register fig 12. remote control holding register ddd ',*,7$//<&21752//(' (48,30(17 5(48,5(6&217,18286 ',*,7$/&21752/ &21752/ $1' 6<1& &,5&8,75 < gdwd forfn iurpuhprwh frqwurosdqho +()%4 43 675 ' 46 &3 43 ',*,7$//<&21752//(' (48,30(17 +()%4 43 675 ' 46 &3 43 ',*,7$//<&21752// (' (48,30(17 +()%4 43 675 ' &3 43
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 13 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 13. package outline fig 13. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 14 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register fig 14. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 15 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 14. abbreviations 15. revision history table 11. abbreviations acronym description hbm human body model esd electrostatic discharge mm machine model mil military table 12. revision history document id release date data sheet status change notice supersedes hef4094b_q100 v.3 20130704 product data sheet - hef4094b_q100 v.2 modifications: ? figure 3 corrected (errata). hef4094b_q100 v.2 20130606 product data sheet - hef4094b_q100 v.1 modifications: ? added type number HEF4094BTT-Q100. hef4094b_q100 v.1 20120807 product data sheet - -
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 16 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 16.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 16.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? 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applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
hef4094b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 3 ? 4 july 2013 17 of 18 nxp semiconductors hef4094b-q100 8-stage shift-and-store register no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors hef4094b-q100 8-stage shift-and-store register ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 4 july 2013 document identifier: hef4094b_q100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 recommended operating conditions. . . . . . . . 5 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 application information. . . . . . . . . . . . . . . . . . 12 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 16 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 contact information. . . . . . . . . . . . . . . . . . . . . 17 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

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