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25 amp. push-pull 3-phase brushless dc motor controller/driver module in a power flatpack 8 10 r2 supersedes 6 11 r1 full-featured power module for direct drive of 3-phase brushless dc motors features fully integrated 3-phase brushless dc motor control subsystem includes power stage, non-isolated driver stage, and controller stage mosfet output stage 25a average phase current with 80v maximum bus voltage internal precision current sense resistor (6w max. dissipation) speed and direction control of motor brake input for dynamic braking of motor overvoltage/coast input for shutdown of all power switches soft start for safe motor starting unique hermetic or plastic ring frame power flatpacks hermetic (3.10" x 2.10" x 0.385") plastic ring frame (4.13" x 2.00" x 0.49") applications fans and pumps hoists actuator systems description the OM9373 is one of a series of versatile, integrated three-phase brushless dc motor controller/driver subsystems housed in a 43 pin power flatpack. the OM9373 is best used as a two quadrant speed controller for controlling/driving fans, pumps, and motors in applications which require small size. many integral control features provide the user much flexibility in adapting the OM9373 to specific system requirements. the small size of the complete subsystem is ideal for aerospace, military, and high-end industrial applications. two package types provide a broad range of cost and screening options to fit any application. OM9373 205 craw ford street, leominster, ma 01453 usa (978) 534-5776 fax (978) 537-4246 visit our web site at www.omnirel.com
commutation truth table this table shows the phase output state versus the state of the hall-effect and direction inputs. please note that the OM9373 hall-effect inputs are grey-encoded; that is, only one input is allowed to change from one input state to another at a time. the commutation coding shown reflects hall- effect sensors that are spaced at 120 mechanical increments. also, internal protection logic disables all three phase outputs when the hall-effect inputs are set to an illegal condition (i.e. all logic low or all logic high). digital inputs phase outputs dir h1 h2 h3 a b c 1 0 0 1 hi-z sink source 1 0 1 1 sink hi-z source 1 0 1 0 sink source hi-z 1 1 1 0 hi-z source sink 1 1 0 0 source hi-z sink 1 1 0 1 source sink hi-z 0 1 0 1 sink source hi-z 0 1 0 0 sink hi-z source 0 1 1 0 hi-z sink source 0 0 1 0 source sink hi-z 0 0 1 1 source hi-z sink 0 0 0 1 hi-z source sink x 0 0 0 hi-z hi-z hi-z x 1 1 1 hi-z hi-z hi-z 2.1 - 2 simplified block diagram OM9373
2.1 - 3 OM9373 absolute maximum ratings motor supply voltage, v m ................................................... 80 vdc peak motor supply voltage v m pk ........................................... 100 vdc average phase output current, i o ................................... 25 amperes dc* peak phase output current, i om ................................... 50 amperes peak** control supply voltage, v cc ................................................... + 18 v logic input voltage (note 1 ) ............................................ -0.3 v to +8 v reference source current ................................................ -30 madc error amplifier input voltage range, (ea1+/ea1-) .................... -0.3 vdc to 10 vdc error amplifier output current .............................................. 8 madc spare amplifier input voltage (ea2+/ea2-) ........................... -0.3 vdc to 10 vdc spare amplifier output current ............................................. 8 madc current sense amplifier input voltage (ish/isl) ....................... -0.3 v to +6 vdc current sense amplifier output current .....................................10 madc tachometer output current ................................................10 madc pwm input voltage ..............................................- 0.3 vdc to +6 vdc operating junction temperature .....................................-55c to +150 c storage temperature range ........................................-65c to +150 c power switch junction-to-case thermal resistance, r jc ...................... 0.35?/w package isolation voltage ................................................. 600 vrms lead soldering temperature .............300 ?, 10 seconds maximum, 0.125?from case * tcase = 25 c ** tcase = 25 c, maximum pulse width = 10msec recommended operating conditions (tcase = 25 c) motor power supply voltage, v m ........................................... +48vdc average phase output current, i o with internal current sense resistor (note 2) each power switch .............................................25 a control supply voltage, v cc ............................................ 15vdc 10% logic low input voltage, v il ........................................... 0.8 vdc (max) logic high input voltage, v ih ........................................... 2.0 vdc (min) note 1: logic inputs: direction, hall inputs (h1...h3) overvoltage - coast, speed, and quad select. note 2: the internal 5m ? current sense resistor is limited to 6 wdc power dissipation. other values are available. please contact the factory for more information.
parameter symbol conditions (note 1) min. typ. max. units power output section zero gate voltage drain current i dss vds = 80vdc 250 ua v gs = 0v drain-to-source on-resistance rds(on) id =35 a 0.024 ohms v gs = 10v (note 4) gate body leakage current igssr v gs = 20 vdc, vds = 0v 100 na diode forward voltage v f i s = 35 a 0.9 v diode reverse recovery time trr i s = 25a, di/dt = -100a/usec, 200 nsec vgs = 0v control section control supply current icc vcc over operating range 100 ma control turn-on threshold vcc(+) tc over operating range 9.45 v driver turn-on threshold vcc(+) tc over operating range 13.0 v reference section output voltage vr ef 4.9 5.0 5.1 v output voltage vr ef tc over operating range 4.7 5.0 5.3 v output current io --- --- 30 ma load regulation iload = 0ma to -20ma -40 -5 mv short circuit current isc tc over operating range 50 100 150 ma error amplifier / spare amplifier sections ea1 / ea2 input offset current ios v(pin 2) = v(pin 4) = 0v -30 -3 0 na v(pin 3) = v(pin 6) = 0v ea1 / ea2 input bias current iin v(pin 2) = v(pin 4) = 0v -50 -45 0 na v(pin 3) = v(pin 6) = 0v input offset voltage vos 0v < vcommon-mode < 3v 7 mv amplifier output voltage range -- 0 6 v pwm comparator section pwm input current iin v(pin 9) = 2.5v 0 3.0 30 ua current-sense amplifier section ish / isl input current iin v(pin 12) = v(pin 13) = 0v -850 -320 0 ua input offset current ios v(pin 12) = v(pin 13) = 0v +/-2 +/-12 ua peak current threshold voltage vpk v(pin 12) = 0v, v(pin 13) 0.14 0.20 0.26 v varied to threshold over current threshold voltage voc v(pin 12) = 0v, v(pin 13) 0.26 0.30 0.36 v varied to threshold ish / isl input voltage range -- (note 2) -1 2 v amplifier voltage gain av v(pin 12) = 0.3v, v(pin 13) 1.75 1.95 2.15 v/v = 0.5v to 0.7v amplifier level shift -- v(pin 12) = v(pin13) = 0.3v 2.4 2.5 2.65 v logic input section h1, h2, h3 low voltage threshold vil tc over operating range 0.8 1.0 1.2 v h1, h2, h3 high voltage threshold vih tc over operating range 1.6 1.9 2.0 v h1, h2, h3 input current iin tc over operating range, -400 -250 -120 ua v(pin 20, 21 or 22) = 0vdc quad select / direction threshold voltage vth tc over operating range 0.8 1.4 2.0 v quad select voltage hysteresis vh 70 mv direction voltage hysteresis vh 0.6 v quad select input current iin -30 50 150 ua direction input current iin -30 -1 30 ua overvoltage / coast input section overvoltage / coast inhibit threshold voltage vth tc over operating range 1.65 1.75 1.85 v overvoltage / coast restart threshold voltage vth tc over operating range 1.55 1.65 1.75 v overvoltage / coast hysteresis voltage vh 0.05 0.10 0.15 v overvoltage / coast input current iin -10 -1 0 ua 2.1 - 4 OM9373 electrical characteristics
parameter symbol conditions (note 1) min. typ. max. units soft-start section soft-start pull-up current ip v(pin) 18) = 0v -16 -10 -5 ua soft-start discharge current id v(pin 18) = 2.5v 0.1 0.4 3.0 ma soft-start reset threshold voltage vth 0.1 0.2 0.3 v tachometer/brake section tachometer output high level voh tc o ver operating range 4.7 5.0 5.3 v (pin 15) 10k ? to 2.5 v tachometer output low level vol tc o ver operating range (pin 15) 10k ? to 2.5 v 0.2 v tachometer on-time ton 85 100 140 us tachometer on-time variation -- tc o ver operating range 0.1 % brake/tach timing input current iin v (pin 16) = 0v -4.0 -1.9 ma brake/tach timing threshold voltage vth tc o ver operating range 0.8 1.0 1.2 v brake/tach timing voltage hysteresis vh 0.09 v speed input threshold voltage vth tc o ver operating range 220 257 290 mv speed input current iin -30 -5 30 ua oscillator section oscillator frequency fo measured at pin 10 13.5 14.8 20.0 khz specification notes: 1. all parameters specified for ta = 25 c, vcc = 15vdc, rosc = 75k ? (to vref), cosc = 1800 pf, and all phase outputs unloaded (ta ~ tj). all negative currents shown are sourced by (flow from) the pin under test. 2. either ish or isl may be driven over the range shown. 3. bold parameters tested at -55 c, 25 c, 125 c for sfb. 4. pulse test: pulse width < 300 sec, duty cycle < 2%. pin# name pin# name 1 vcc 23 speed input 2 ea1 ??input 24 direction input 3 ea2 ??input 25 csh 4 ea1 ??input 26 csl 5 +5v reference output 27 motor return 6 ea2 ??input 28 motor return 7 ea2 output 29 source c 8 ea1 output 30 (no connection) 9 pwm input 31 phase c output 10 oscillator timing input 32 phase c output 11 isense 33 vmotor 12 ish 34 source b 13 isl 35 source b 14 quad select input 36 phase b output 15 tachometer output 37 phase b output 16 brake/tach timing input 38 vmotor 17 overvoltage/coast input 39 source a 18 soft-start input 40 source a 19 ground 41 phase a output 20 h3 input 42 phase a output 21 h2 input 43 vmotor 22 h1 input (case) (no connection) 2.1 - 5 OM9373 pinout
oscillator timing input (pin 10) -- the oscillator timing input sets a fixed pwm chopping frequency by means of an internal resistor (rosc), whose value is set to 75k ? , connected from pin 10 to the +5v reference output, and an internal capacitor (cosc), whose value is 1800pf, connected from pin 10 to ground. in custom applications, the recommended range of values for rosc is 10k ? to 100k ? , and for cosc is 0.001uf to 0.01uf, and the maximum operating frequency should be kept below 20khz. the approximate oscillator frequency is: 2 fo = (rosc x cosc) [hz] the voltage waveform on pin 10 is a ramp whose magnitude is approximately 1.2vp-p, centered at approximately 1.6vdc. in addition to the voltage-mode pwm control, pin 10 may be used for slope compensation in current-mode control applications. isense (pin 11) -- this pin is connected to the output of the internal current-sense amplifier. it drives a peak- current (cycle-by-cycle) comparator which controls phase output chopping, and a fail-safe current comparator which, in the event of an output overcurrent condition, activates the soft-start feature and disables the phase outputs until the overcurrent condition is removed. the magnitude of the voltage appearing at pin 11 is dependent upon the voltages present at the current-sense amplifier inputs, ish and isl: v(isense) = 2.5v + [2 x abs (ish - isl)] [volts] current sense inputs (ish, pin 12; isl, pin 13) -- these inputs to the current-sense amplifier are interchangeable and they can be used as differential inputs. the differential voltage applied between pins 12 and 13 should be kept below +/-0.5vdc to avoid saturation. quad select input (pin 14) -- this input is used to set the OM9373 in a half control or full control chopping regime. when driven with a logic low level, the OM9373 is in the half control mode, whereby only the three lower (pull-down) power switches associated with the phase outputs are allowed to chop. alternately, when driven with a logic high level, the OM9373 is in the full control mode, where all six power switches (pull-up and pull- down) associated with the phase outputs are chopped by the pwm. during motor braking, changing the logic state of the quad select input has no effect on the operation of the OM9373. pin descriptions / functionality vcc (pin 1) -- the vcc supply input provides bias voltage to all of the internal control electronics within the OM9373, and should be connected to a nominal +15vdc power source. high frequency bypass capacitors (10uf polarized in parallel with 0.1uf ceramic are recommended) should be connected as close as possible to pin 1 and ground (pin 19). error amplifier (ea1- input, pin 2; ea1+ input, pin 4; ea1 output, pin 8) -- the error amplifier is an uncommitted lm158-type operational amplifier, providing the user with many external control loop compensation options. this amplifier is compensated for unity gain stability, so it can be used as a unity gain input buffer to the internal pwm comparator when pin 2 is connected to pin 8. the output of the error amplifier is internally connected to the pwm comparator's "-" input, simplifying external layout connections. +5v reference output (pin 5) -- this output provides a temperature-compensated, regulated voltage reference for critical external loads. it is recommended that this pin be used to power the external hall-effect motor position sensors. by design, the +5v reference must be in regulation before the remainder of the control circuitry is activated. this feature allows the hall-effect sensors to become powered and enabled before any phase output is enabled in the OM9373, preventing damage at turn-on. high-frequency bypass capacitors (10uf polarized in parallel with 0.1uf ceramic are recommended) should be connected as close as possible to pin 5 and ground (pin 19). spare amplifier (ea2- input, pin 6; ea2+ input, pin 3; ea2 output, pin 7) -- the spare amplifier is an uncommitted lm158-type operational amplifier, and in addition to the internal error amplifier, provides the user with additional external control loop compensation options. this amplifier is also compensated for unity gain stability and it can be used as a unity gain input buffer when pin 6 is connected to pin 7. if the spare amplifier is unused, pin 3 should be connected to ground, and pin 6 should be connected to pin 7. pwm input (pin 9) -- this pin is connected to the "+" input of the internal pwm comparator. the pwm output clears the internal pwm latch, which in turn commands the phase outputs to chop. for voltage- mode control systems, pin 9 may be connected to the oscillator timing input, pin 10. 2.1 - 6 OM9373
tachometer output (pin 15) -- this output provides a fixed width 5v pulse when any hall-effect input (1, 2 or 3) changes state. the pulse width of the tachometer output is set internally in the OM9373 to 113 s (nominal). the average value of the output voltage on pin 15 is directly proportional to the motor's speed, so this output may be used (with an external averaging filter) as a true tachometer output, and fed back to the speed input (pin 23) to sense the actual motor speed. note : whenever pin 15 is high, the internal hall-effect position latches are inhibited (i.e. "latched"), to reject noise during the chopping portion of the commutation cycle, and this makes additional commutations impossible. this means that in order to prevent false commutation at a speed less than the desired maximum speed, the highest speed as observed at the tachometer output should be set above the expected maximum value. brake / tach timing input (pin 16) -- the brake/tach timing input is a dual-purpose input. internal to the OM9373 are timing components tied from pin 16 to ground (a 51k ? resistor and a 3300pf capacitor). these components set the minimum pulse width of the tachometer output to 113 s, and this time may be adjusted using external components, according to the equation: t(tach) = 0.67 x (c t + 3300pf) x ( rt x 51k ? ) (s) rt + 51k ? the recommended range of external resistance (to ground) is 15k ? to , and the range of external capacitance (to ground) is 0pf to 0.01uf. with each tachometer output pulse, the capacitor tied to pin 16 is discharged from approximately 3.33v to approximately 1.67v by an internal timing resistor. the brake / tach timing input has another function. if this pin is pulled below the brake threshold voltage, the OM9373 will enter the brake mode. the brake mode is defined as the disabling of all three high-side (pull-up) drivers associated with the phase outputs, and the enabling of all three low-side (pull-down) drivers. overvoltage / coast input (pin 17) -- this input may be used as a shutdown or an enable/disable input to the OM9373. also, since the switching inhibit threshold is so tightly defined, this input can be directly interfaced with a resistive divider which senses the voltage of the motor supply, vm, for overvoltage conditions. a high level (greater than the inhibit threshold) on pin 17 causes the coast condition to occur, whereby all phase outputs revert to a hi-z state and any motor current which flowed prior to the overvoltage / coast command is commutated via the power "catch" rectifiers associated with each phase output. 2.1 - 7 OM9373 soft-start input (pin 18) -- the soft-start input is internally connected to a 10 a (nominal) current source, the collector of an npn clamp/discharge transistor, and a voltage comparator whose soft-start/restart threshold is 0.2vdc (nominal). an external capacitor is connected from this pin to ground (pin 19). whenever the vcc supply input drops below the turn-on threshold, approximately 9vdc, or the sensed current exceeds the over-current threshold, approximately 0.3v at the current sense amplifier, the soft-start latch is set. this drives the npn clamp transistor which discharges the external soft- start capacitor. when the capacitor voltage drops below the soft-start/restart threshold and a fault condition does not exist, the soft-start latch is cleared; the soft-start capacitor charges via the internal current source. in addition to discharging the soft-start capacitor, the clamp transistor also clamps the output of the error amplifier internal to the controller ic, not allowing the voltage at the output of the error amplifier to exceed the voltage at pin 18, regardless of the inputs to the amplifier. this action provides for an orderly motor start-up either at start-up or when recovering from a fault condition. ground (pin 19) -- the voltages that control the OM9373 are referenced with respect to this pin. all bypass capacitors, timing resistors and capacitors, loop compensation components, and the hall-effect filter capacitors must be referenced as close as possible to pin 19 for proper circuit operation. additionally, pin 19 must be connected as close as physically possible to the motor return, pins 27 and 28. hall-effect inputs (h1, pin 22; h2, pin 21; h3, pin 20) -- each input has an internal pull-up resistor to the +5v reference. each input also has an internal 180pf noise filter capacitor to ground. in order to minimize the noise which may be coupled from the motor commutation action to these inputs, it is strongly recommended that additional external filter capacitors, whose value is in the range of 2200pf, be connected from each hall-effect input pin to ground. whatever capacitor value is used, the rise/fall times of each input must be guaranteed to be less than 20us for proper tachometer action to occur. motors with 60 degree position sensing may be used if one or two of the hall- effect sensor signals is inverted prior to connection to the hall-effect inputs.
speed input (pin 23) - this pin is connected to the ??input of a voltage comparator, whose threshold is 0.25vdc. as long as the speed input is less than 0.25v, the direction latch is transparent. when the speed input is greater than 0.25v, then the direction latch inhibits all changes in direction. it is recommended, especially while operating in the half control mode, that the tachometer output is connected to the speed input via a low-pass filter, such that the direction latch is transparent only when the motor is spinning very slowly . in this case, the motor has too little stored energy to damage the power devices during direction reversal. direction input (pin 24) - this input is used to select the motor direction. this input has an internal protection feature: the logic-level present on the direction input is first loaded into a direction latch, then shifted through a two-bit shift register before interfacing with the internal output phase driver logic decoder. also, protection circuitry detects when the input and the output of the direction latch or the 2-bit shift register are different, and inhibits the phase outputs (i.e. hi-z) during those times. this feature may be used to allow the motor to coast to a safe speed before a direction reversal takes place. power stage cross-conduction (current "shoot-through" from vmotor to ground through simultaneously enabled pull-up and pull-down drivers) is prevented by the shift register as it is clocked by the pwm oscillator, so that a fixed delay of between one and two pwm oscillator clock cycles occurs. this delay or "dead-time" guarantees that power-stage cross-conduction will not occur. current sense outputs (csh, pin 25; csl, pin 26) - the current sense outputs produce a differential voltage equal to the motor current times the sense resistance value (5m ? nominal). there is an internal .018 f filter capacitor across pins 25 and 26, and two 100 ? series resistors, one between each pin and each end of the current sense resistor. to configure the current sense amplifier for cycle-by-cycle current limiting and/or overcurrent protection, connect pin 25 to pin 12 (ish) and pin 26 to pin 13 (isl). motor return (pins 27 and 28) - these pins are connected to the most negative terminal of the motor supply (vm-). this connection is electrically isolated from the logic ground internal to the OM9373 package to minimize, if not eliminate, noise on the logic ground. the connection to the logic ground is made by the user external to the package (refer to ground (pin 19)). in order to minimize packaging losses and parasitic effects, it is essential that both of these pins be firmly connected to the motor supply ground, with as short a connection as physically possible. source (pins 29, 34, 35, 39 and 40) -- the source pins form the low-side connection of the pull-down switches associated with each phase output. because of the switching current capability of the OM9373, all 6 pins should be externally connected together with a low impedance bus to minimize losses and voltage differentials. also, due to layout design considerations, pin 29 is internally connected to the "top" of the internal current-sense resistor. phase outputs (phase a, pins 41 and 42; phase b, pins 36 and 37; phase c, pins 31 and 32) -- these outputs are connected to either vmotor via the pull-up driver or source via the pull-down driver, depending upon the hall-effect and direction inputs (see commutation truth table). the two pins associated with each phase output must be connected to one of the three phases of the motor driven by the OM9373. v motor (pins 33, 38, and 43) - these pins are connected to the most positive terminal of the motor supply (vm+). for proper operation, all three pins must be connected together externally with a low impedance power bus. the v motor power bus should be bypassed with an adequately voltage-rated ceramic capacitor, 0.1 f (typical), and a low-esr electrolytic capacitor, whose capacitance value can be selected by the following: 10 f-per-ampere of average motor current from v motor to motor return. note: all connections, including the power bus capacitor connections, must be made as close as possible to the v motor and motor return pins to minimize parasitic effects. package and screening options the OM9373 is offered in a hermetic flatpack package as well as a plastic ring frame, low profile flatpack package. the hermetic package, f-43, is shown in figure 1. the plastic ring frame, low profile package, mp3-43l, has slightly larger dimensions and is shown in figure 2. the hermetic version is offered in two standard screening levels: a full military temperature range of - 55? to +125? with limited screening and with mil- std-883 screening. the plastic ring frame version is offered in an industrial temperature range of -40? to +85? with limited screening. the screening levels for the sfb, sf and spp versions are listed in the table below. all tests and inspections are in accordance with those listed in mil- std-883. OM9373 2.1 - 8
test/inspection sfb sf spp precap visual inspection 100% 100% 100% temperature cycle 100% n.a. n.a. mechanical shock 100% n.a. n.a. hermeticity (fine and gross leak) 100% 100% n.a. pre burn-in electrical 100% n.a. n.a. burn-in (160 hours) 100% n.a. n.a. final electrical test -55?, +25?, +25? +25? +125? group a testing 100% n.a. n.a. final visual inspection 100% 100% 100% applications start-up conditions the OM9373 3-phase brushless dc motor controller/driver is designed to drive fractional to integral horsepower motors. to ensure proper operation, it is necessary to ensure that the high-side bootstrap capacitors are charged during initial start- up. however, the method(s) used to ensure this may be dependent upon the application. for example, some applications may only require that ov_coast (pin 17) be connected to ground, either via a hardwire connection or via a switch (enable/disable), before applying vcc. when vcc is applied, the controller/driver is forced into brake mode for approximately 200 sec (all high-side drivers are disabled and all low-side drivers are enabled). this may not be adequate for other applications; rc_brake (pin 16) may have to be momentarily connected to ground via a switch, either manually or electronically (ref. figure 3). note that with the component values shown in figure 3, rc_brake is pulled low for approximately 300 msec after applying vcc at pin1. modes of operation figures 4 and 5, shown on the following pages, provide schematic representations of typical voltage- mode and current-mode applications for the OM9373 controller/driver. figure 4 represents the implementation of a typical voltage-mode controller for velocity control. a voltage or speed command is applied to the noninverting input of the error amplifier which is configured as a voltage follower. the output of the error amplifier is compared to a pulse width modulated ramp, and since motor speed is nearly proportional to the average phase output voltage, the speed is controlled via duty cycle control. if a speed feedback loop is required, the tachometer output can be connected to the inverting input of the error amplifier via a loop compensation network. figure 4 also shows the implementation of the cycle- by-cycle current limit/overcurrent protection feature of the OM9373. the load current is monitored via the controllers internal sense resistor. the current sense signal is filtered and fed into the current sense amplifier where the absolute value of ish-isl is multiplied by two and biased up by 2.5 volts. the output of the current sense amplifier is compared to a fixed reference, thus providing cycle-by-cycle current limiting and/or overcurrent protection as necessary. the typical peak current threshold (ish-isl) is 0.20 volts; the typical over current threshold (ish-isl) is 0.30 volts. figure 5 represents the implementation of a typical current-mode controller for torque control. the load current is monitored via the controllers internal sense resistor. the current sense signal is filtered and fed into the current sense amplifier where the absolute value of ish-isl is multiplied by two and biased up by 2.5 volts. besides the implementation of the cycle-by- cycle current limit/overcurrent protection feature of the OM9373 discussed in the preceding paragraph, the output of the current sense amplifier is fed into the error amplifier which is configured as a differential amplifier. an error signal representing the difference between the current command input and the value of the amplified current sense signal is produced. then it is compared to a pulse width modulated ramp and since torque is nearly proportional to the average phase output current, the torque is controlled via duty cycle control. OM9373 2.1 - 9
.350 2.40 16 x .150 tol. non-cumulative 2.50 2.850 3.100 .250 typ. .128 dia. 4 holes .130 ref. .30 25 x .100 tol. non-cumulative .125 .250 typ. 1.600 1.860 2.100 .125 typ. .050 .040 dia. .385 max. .500 .750 .020 dia. pin1 mechanical outline OM9373 fig 1: mechanical outline f-43 hermetic package fig 2: mechanical outline mp3-43l plastic ring frame package 2.1 - 10
OM9373 fig 3: optional start-up circuit c_filt 232 232 4700pf .1uf 3.24k 1.50k 1k .1uf c_bus + 10uf + .1uf 10k vcc 1 vref 5 oscillator 10 pwm_in 9 ea1_out 8 ea1+ 4 ea1- 2 soft_start 18 i_sense 11 ish 12 isl 13 quad_sel 14 direction 24 speed_in 23 ea2_out 7 ea2+ 3 ea2- 6 brake 16 tach_out 15 ground 19 v_motor 43 phase_a_out 42 phase_a_out 41 source_a 40 source_a 39 v_motor 38 phase_b_out 37 phase_b_out 36 source_b 35 source_b 34 v_motor 33 phase_c_out 32 phase_c_out 31 n/c 30 source_c 29 motor_return 28 motor_return 27 h1_hall_input 22 h2_hall_input 21 h3_hall_input 20 csh 25 csl 26 ov_coast 17 h3 h2 h1 h3 h2 h1 v_motor command +15v hall sensors from motor hall sensors motor fig 4: implementation of a voltage-mode controller 2.1 - 11
OM9373 c_bus + c_filt 232 232 4700pf .1uf .1uf 10uf + .26uf 43k 1800pf 2k 3.24k 3.24k 1k 35.6k 10k .1uf vcc 1 vref 5 oscillator 10 pwm_in 9 ea1_out 8 ea1+ 4 ea1- 2 soft_start 18 i_sense 11 ish 12 isl 13 quad_sel 14 direction 24 speed_in 23 ea2_out 7 ea2+ 3 ea2- 6 brake 16 tach_out 15 ground 19 v_motor 43 phase_a_out 42 phase_a_out 41 source_a 40 source_a 39 v_motor 38 phase_b_out 37 phase_b_out 36 source_b 35 source_b 34 v_motor 33 phase_c_out 32 phase_c_out 31 n/c 30 source_c 29 motor_return 28 motor_return 27 h1_hall_input 22 h2_hall_input 21 h3_hall_input 20 csh 25 csl 26 ov_coast 17 h3 h2 h1 h3 h2 h1 v_motor +15v current_command hall sensors from motor hall sensors motor offset fig 5: implementation of a current-mode controller 205 craw ford street, leominster, ma 01453 usa (978) 534-5776 fax (978) 537-4246 visit our web site at www.omnirel.com 2.1 - 12

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