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product structure silicon monolithic integrated circuit this product has no designed protection against radioactive ra ys 1/ 23 ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 14 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 0. 7v to v cc -1 v, 4a 1ch ultra low dropout linear regulator bd3522efv general description bd3522efv is an ultra low-dropout linear chipset regulator that operates from a very low input supply. it offers ideal performance in low input voltage to low output voltage applications. the input- to -output voltage difference is minimized by using a built-in n-channel power mosfet with a maximum on-resistance of r on =50m (max). by lowering the dropout voltage, the regulator achieves high output current of up to (i outmax =4.0a), thereby, reducing conversion loss, making it comparable to a switching regulator and its power transistor, choke coil, and rectifier diode constituents. bd3522efv is a low-cost design and is available in significantly downsized package profiles. the external resistor allows the entire range of output voltage configurations between 0.65v and 2.7v, while the nrcs (soft start) function enables a controlled output voltage ramp-up, which can be programmed to a required power supply sequence. features ? internal high-precision reference voltage circuit (0.65v1 %) ? built-in vcc undervoltage lockout circuit (v cc =3.80v) ? nrcs (soft start) function reduces the magnitude of in-rush current ? internal n-channel mosfet driver offers low on -resistance ? built-in short circuit protection (scp) ? built-in current limit circuit (4.0a min) ? built-in thermal shutdown (tsd) circuit ? tracking function key specifications ? in i npu t voltage range: 0.7v to v cc -1v ? vcc input voltage range: 4.3v to 5.5v ? output voltage range: 0.65v to 2.7v ? output current: 4 .0 a (max) ? on -resistance: 28m (typ) ? standby current: 0a (typ) ? operating temperature range: -10c to + 10 0c package w(typ) x d(typ) x h(max) applications notebook computers, desktop computers, lcd-tv, dvd, digital appliances typical application circuit and block diagram htssop-b 20 6.50mm x 6.40mm x 1.00mm reference block v in uvlolatch current limit en v cc v cc v cc v cc en uvlo1 uvlo2 vref gnd cl uvlo1 uvlo2 tsd scp en uvlo1 cl v cc vref 0.7 scp nrcs 11 12 13 8 10 nrcs tsd nrcs 0.3 vref 0.4 fb scp/tsd latch latch en uvlo1 en/uvlo nrcs vd in o ut fb in out r 2 r 1 r 2 r 1 7 6 5 4 3 2 1 20 19 18 17 16 15 14 c 1 c 2 c 3 c nrcs c scp 9 c fb datashee t datashee t downloaded from: http:///
2/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 pin configuration pin descriptions pin no. pin name pin function 1 out output voltage pin 2 out output voltage pin 3 out output voltage pin 4 out output voltage pin 5 out output voltage pin 6 out output voltage pin 7 fb reference voltage feedback pin 8 nrcs in -rush current protection (nrcs) capacitor connection pin 9 gnd ground pin 10 gnd ground pin 11 vcc power supply pin 12 en enable input pin 13 s cp scp delay time setting capacitor connection pin 14 vd in input voltage detect pin 15 in input voltage pin 16 in input voltage pin 17 in input voltage pin 18 in input voltage pin 19 in input voltage pin 20 in input voltage pin - fin connected to heatsink and gnd description of blocks 1. amp this is an error amp that compares the reference voltage (0.65v) with fb voltage to drive the output n-channel fet . frequency optimization aids in attaining rapid transi en t response, and to support the use of ceramic capacitors on the output. amp output voltage ranges from gnd to vcc. when en is off, or when uvlo is active, output goes low and the output of the n-channel fet switches off state. 2. en the en block controls the on and off state of the regulator vi a the en logic input pin. during off state, circuit voltage stabilizes at 0 a which minimizes the current consumption during standby mode. the fet is switched on to enable the discharge of the nrcs and out, thereby draining the excess charge and preventing the l oad side of an ic from malfunctioning. since there is no electrical connectio n required (e. g. between the vcc pin and the esd prevention diode), module operation is independent of the input sequence. 3. v cc uvlo to prevent malfunctions that can occur during a sudden decrease in v cc , the uvlo circuit switches the output to off state, and (like the en block) discharges nrcs and out. once the uvlo threshold voltage (typ3.80v) is reached, the power- on reset is triggered and output is restored. 4. vduvlo vd pin is the in voltage detect pin. when vd voltage exceeds the thresh old voltage, vduvlo becomes active. once active, the status of output voltage remains on even if vd v oltage drops. (when in voltage drops, scp engages and output switches off.) unlike en and v cc , it is active at output startup. vduvlo can be restored either by reconnecting the en pin or v cc pin. 5. current limit during on state, the current limit function monitors the output current of the ic against the current limit value. when the output current exceeds this value , this block lowers the output current to protect the load of the ic. when it overcomes the overcurrent state, output voltage is restored to the normal value. however when the output voltage falls below the scp startup voltage, the scp function becomes active and th e output switches off. 20 19 18 17 16 15 14 13 12 11 1 out fin 2 out 3 out 4 out 5 out 6 out 7 fb 8 nrcs 9 gnd 10 gnd in in in in in in v d scp en v cc top view downloaded from: http:///
3/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 description of block s C continued 6. nrcs (non rush current on start- up) the soft start function enabled by connecting an external capacitor between the nrcs pin and gnd. output ramp- up can be set for any period up to the time the nrcs pin reaches v fb (0.65v). during startup, the nrcs pin serves as a 20 a (typ) constant current source to charge the external capacitor. output start time is calculat ed by the formula below. ? ? nrcs fb nrcs nrcs i v c typ t ? ? 7. tsd (thermal shut down) the shutdown (tsd) circuit is automatically latched off whe n the chip temperature exceeds the threshold temperature after the programmed time period elapses, thus p rotecting the ic against thermal runaway and heat damage. since the tsd circuit is designed only to shut down the ic in the occurrence of extreme heat, it is important that the tj (max) parameter should not be exceeded in the th ermal design, in order to avoid potential problems with th e tsd. ? ? a v c typ t scpth scp tsd ? 20 ? ? 8. in the in line acts as the major current supply line, and is connected to the output n-channel fet drain. since there i s no electrical connection (such as between the vcc pin an d the esd protecti on di ode ) required , in operates independent of the input sequence. however, since an outpu t n-channel fet body diode exists between in and out , a v in -v out electric (diode) connection is present. therefore, when output is switched on or off, reverse current may flow from out to in . 9. scp when output voltage (out) drops, the ic assumes that out pi n is shorted to gnd and switches the output voltage off. after the gnd short has been detected and the programme d delay time has elapsed, the output is latched off . scp is also effective during output startup. scp condition can b e cleared either by reconnecting the en pin or vcc pin. delay time is calculated by the formula below. absolute maximum ratings ta=25 c parameter symbol limit unit input voltage 1 v cc 6.0 (note 1) v input voltage 2 v in 6.0 (note 1) v maximum output current i o ut 4 (note 1) a enable input voltage v en 6.0 v power dissipation 1 pd1 1.00 (note 2) w power dissipation 2 pd2 1.45 (note 3) w power dissipation 3 pd3 2.31 (note 4) w power dissipation 4 pd4 3.20 (note 5) w operating temperature range topr - 10 to +100 c storage temperature range tstg - 55 to +125 c maximum junction temperature tjmax +150 c (note 1) should not exceed pd. (note 2) derate by 8mw/c for ta above 25 c (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, no copper foil area) (note 3) derate by 11.6mw/ c for ta above 25 c (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 2-layer, copper foi l area : 15mm x 15mm) (note 4) derate by 18.5mw/ c for ta above 25 c (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 2-layer, copper foil area : 70mm x 70mm) (note 5) derate by 25.6mw/ c for ta above 25 c (when mounted on a 70mm x 70mm x 1.6mm glass-epoxy board, 4-layer, copper foil area : 70mm x 70mm) caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. ? ? scp scpth scp scp i v c typ t ? ? downloaded from: http:///
4/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 recommended operating condition s (ta=25 c ) parameter symbol rating unit min max input voltage 1 v cc 4.3 5.5 v input voltage 2 v in 0.7 v cc - 1 (note 6) v output voltage setting range v out v fb 2.7 v enable input voltage v en -0.3 +5.5 v nrcs capacitance c nrcs 0.001 1 f (note 6) vcc and in do not have to be implemented in the order listed. electrical characteristics (unless otherwise specified, ta=25 c , v cc =5v, v en =3v, v in =1.7v, r 1 =3.9k, r 2 =3.3k) parameter symbol limit unit conditions min typ max bias current i cc - 1.4 2.2 ma vcc shutdown mode current i st - 0 10 a v en =0v output current i o ut 4.0 - - a feedback voltage 1 v fb1 0.643 0.650 0.657 v feedback voltage 2 v fb2 0.637 0.650 0.663 v tj=- 10 c to +100 c line regulation 1 reg.l1 - 0.1 0.5 %/v v cc =4.3v to 5.5v line regulation 2 reg.l2 - 0.1 0.5 %/v v in =1.2v to 3.3v load regulation reg.l - 0.5 10 mv i out =0 a to 4a output on-resistance r on - 28 50 m i o ut =4a,v in =1.2v tj=- 10 c to +100 c standby discharge current i den 1 - - ma v en =0v, v out =1v [enable] enable pin input voltage high v enhigh 2 - - v enable pin input voltage low v enlow -0.2 - +0.8 v enable input bias current i en - 6 10 a v en =3v [feedback] feedback pin bias current i fb - 100 0 + 100 na [nrcs] nrcs charge current i nrcs 12 20 28 a nrcs standby voltage v stb - 0 50 mv v en =0v [uvlo] vcc undervoltage lockout threshold voltage v ccuvlo 3.5 3.8 4.1 v vcc: sweep- up vcc undervoltage lockout hysteresis voltage v cchys 100 160 220 mv vcc: sweep-down vd undervoltage lockout threshold voltage v duvlo v ref x 0.6 v ref x 0.7 v ref x 0.8 v vd: sweep- up [scp] scp start up voltage v o ut scp v out x 0.3 v out x 0.4 v out x 0.5 v scp threshold voltage v scpth 1.05 1.15 1.25 v charge current i scp 2 4 6 a standby voltage v scpstby - - 50 mv downloaded from: http:///
5/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical waveforms figure 1. transient response (0a to 4a) c out =22f, c fb =10 00 pf figure 2. transient response (0a to 4a) c out =100f figure 3. transient response (0a to 4a) c out =100f, c fb =1000pf figure 4. transient response ( 4a to 0a) c out =22f, c fb =1000pf v out 50mv/div 2a/div i out 49mv 4.0a i out =0a to 4a/4 sec t (10sec/div) i out =0a to 4a/4 sec t(10sec/div) 59mv 4.0a v out 50mv/div 2a/div i out 46m v i out =0a to 4a /4sec t (10sec/div) 4.0a v out 50mv/div 2a/div i out 42mv t(100sec/div) i ou t =4a to 0a/4 sec 4.0a v out 50mv/div 2a/div i out downloaded from: http:///
6/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical waveforms C continued figure 5. transient response ( 4a to 0a) c out =100 f figure 6. transient response ( 4a to 0a) c out =100f, c fb =1 000pf figure 7. waveform at output start figure 8. waveform at output off 41mv t(100sec/div) i out =4a to 0a /4sec 4.0a v out 50mv/div 2a/div i out 41mv t(100sec/div) i out =4 a to 0a /4sec 4.0a v out 50mv/div 2a/div i out t(2msec/div) v en 2v/div v nrcs 2v/div v out 1v/div v en v nrcs v out t( 20sec/div) 2v/div 2v/div 1v/div downloaded from: http:///
7/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical waveforms C continued figure 9. input sequence figure 10. in put sequence figure 11. in put sequence figure 12. input sequence v cc to v in to v en v cc 5v/div v en 2v/div v in 2v/div 1v/div v out v in to v cc to v en v cc 5v/div v en 2v/div v in 2v/div 1v/div v out v en to v cc to v in v cc 5v/div v en 2v/div v in 2v/div 1v/div v out v cc to v en to v in v cc 5v/div v en 2v/div v in 2v/div 1v/div v out downloaded from: http:///
8/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical waveforms C continued figure 13. input sequence figure 14. in put sequence v cc v en v in v out v in to v en to v cc v en to v in to v cc v cc v en v in v out downloaded from: http:///
9/ 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical performance curves figure 17. i stb vs junction temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -50 -25 0 25 50 75 100 125 150 tj [ ] istb [ a] i stb [a] junction temperature : tj [c] figure 18. i instb vs junction temperature 0 5 10 15 20 25 30 35 40 45 50 -50 -25 0 25 50 75 100 125 150 tj [ ] i instb [ a] i instb [a] junction temperature : tj [c] figure 15. output voltage vs junction temperature 1.17 1.18 1.19 1.20 1.21 1.22 1.23 -50 -25 0 25 50 75 100 125 150 tj [ ] vo [v] output voltage : v out [v] junction temperature : tj [c] figure 16. circuit current vs junction temperature 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 -50 -25 0 25 50 75 100 125 150 tj [ ] icc [ma] circuit current : i cc [ma] junction temperature : tj [c] downloaded from: http:///
10 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical performance curves C continued figure 19 . nrcs charge current vs junction temperature 12 14 16 18 20 22 24 -50 -25 0 25 50 75 100 125 150 tj [ ] i nrcs [ a] nrcs charge current : i nrcs [a] junction temperature : tj [c] figure 20. enable input bias current vs junction temperature 0 1 2 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 150 tj [ ] i en [ a ] enable input bias current : i en [a] junction temperature : tj [c] figure 22. on -resistance vs junction temperature (v cc =5v/v out =1.5v) 0 5 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 150 tj [ ] r on [m ] on -resistance : r on [m] junction temperature : tj [c] figure 21. on -resistance vs junction temperature (v cc =5v/v out =1.2v) 0 5 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 150 tj [ ] r on [m ] on -resistance : r on [m] junction temperature : tj [c] downloaded from: http:///
11 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 typical performance curves C continued figure 23. on -resistance vs supply voltage 20 22 24 26 28 30 3 5 7 vcc [v] r on [m ] v out =2.5v v out =1.8v v out =1.5v v out =1.2v on -resistance : r on [m] supply voltage : v cc [v] downloaded from: http:///
12 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 timing chart en on/off vcc on/o ff in vcc en nrcs out in vcc en nrcs out t t startup hysteresis uvlo startup 0.65v(typ) 0.65v(typ) downloaded from: http:///
13 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 timing chart - continued vd on scp off in vcc en nrcs out vduvlo vd in vcc en nrcs out scp threshold voltage vd scp scp delay time scp startup voltage downloaded from: http:///
14 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 application information 1. evaluation board (note 1) provision for supply impedance of instruments component rating manufacturer product name component rating manufacturer product name u1 - rohm bd3522efv c fb 1000pf murata grm188b11h102kd c 6 22 f kyocera cm316b226m06a r 6 (@v out =1.2v) 3.3k rohm mcr03ezpf3301 c 8 0.01f murata grm188b11h103kd r 7 3.9k rohm mcr03ezpf3901 c 11 1f murata grm188b11a105kd r 12 0 - jumper c 13 330pf murata grm188b11h331kd r 14 3.9k rohm mcr03ezpf3901 c 15 10 f kyocera cm21b106m06a r 15 (@v out =1.2v) 3.3k rohm mcr03ezpf3301 c 18 (note 1) 150 f sanyo 6tpb150m bd3522efv evaluation board schematic bd3522efv evaluation board list u1 bd3522efv out 1 20 in out 2 19 in out 3 18 in out 4 17 in out 5 16 in out 6 15 in fb 7 14 vd nrcs 8 13 scp gnd 9 12 en gnd 10 11 vcc in_s c 15 c 16 c 17 c 18 in r 15 vd r 14 c 13 r 6 r 7 c 8 scp vcc c 12 r 12 c 11 jp15 jp6 c 6 c 5 r 4 c 4 out _s out r ld c fb fb nrcs sgnd gnd1 gnd gnd2 v cc sw1 h l v cc u2 inf r f1 r f2 jp10 jpf1 jpf2 v cc inv r f3 u3 c f en 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 downloaded from: http:///
15 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 bd3522efv evaluation board layout silk screen (bottom) bottom layer silk screen (top) middle layer_1 middle layer_2 top layer downloaded from: http:///
16 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 2. recommended circuit example component recommended value programming notes and precautions r 6 /r 7 3.3k /3.9k ic output voltage can be set with a configuration formula v fb x (r 6 +r 7 ) / r 7 using the values for the internal reference output voltage (v fb ) and the output voltage resistors (r 6 , r 7 ). select resistance values that will avoid the impact of th e fb bias current (100n a) . the recommended total resistance value is 10k . c 1 22 f to ensure output voltage stability, make sure that the ou tput capacitors are connected between out pin and gnd. output capacitors play a role in l oop gain phase compensation and in mitigating output fluctuation duri ng rapid changes in load level. insufficient capacitance may cause oscillation, while h igh equivalent series reisistance (esr) will exacerbate output voltage fluctuation under rapid load change conditions. while a 22 f ceramic capacitor is recomended, actual stability is h ighly dependent on temperature and load conditions. also, note that connecting d ifferent types of capacitors in series may result in insufficient total pha se compensation, thus causing oscillation. please confirm operation across a variety of temperature and load conditions. c 11 /c 20 1 f/10 f input capacitors reduce the output impedance of the voltage supply source connected to the input pins (vcc, in). if the impedance of this power supply were to increase, input voltage (v cc , v in ) could become unstable, leading to oscillation or low ered ripple rejection function. while a low-esr 1 f/10 f capacitor with minimal susceptibility to temperature is recommended, stability is highly dependen t on the input power supply characteristics and the substrate wiring pattern. in light o f this information, please confirm operation across a variety of temperature and load condit ions. c 8 0.01 f the non-rush current on startup (nrcs) function is built into the ic to prevent rush current from going through the load (in to o ut ) and affects output capacitors at power supply start-up. constant current comes from the nrcs pin when en is high or when the uvlo function is deactivated. the temporary reference vo ltage is proportional to time, due to the current charge of the nrcs p in capacitor, and output voltage sta rt -up is proportional to this reference voltage. capacitors w ith low susceptibility to temperature are recommended, to ensure a st able soft-start time. c 6 1000pf this component is employed when the c 1 capacitor causes, or may cause, oscillation. it p rovides more precise internal phase correction. c 13 330pf the short circuit protection (scp) function and the thermal shut down (tsd) function are built into the ic. constant current comes from the scp p in when scp function or tsd function is operated. (scp:4 a, tsd:20 a typ) when the voltage at scp pin exceeds the threshold voltage, the output of voltag e becomes off. capacitors with low susceptibility to temperature (330pf or m ore) are recommended, in order to assure a stable tsd delay setting time. plea se confirm operation with the capacitor value to prevent defective startup. r 6 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 c 6 c 1 r 7 c 8 c 13 c 12 v en v cc c 11 v in c 20 r 15 r 14 out out out out out out fb nrcs gnd gnd v cc en scp vd in in in in in in downloaded from: http:///
17 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 3. heat loss in thermal design, consider the temperature range wherein th e ic is guaranteed to operate and apply appropriate margins. the temperature conditions that need to be conside red are listed below: (1) ambient temperature ta can be no higher than 100 c . (2) chip junction temperature (tj) can be no higher than 150 c . chip junction temperature can be determined as follows: it is recommended to layout the via for heat radiation in the gnd pattern of reverse (of ic) when there is the gnd pattern in the inner layer (in using multiplayer substra te). this package is so small (size: 6.5mm x 6.4mm) that it is not available to layout the via in the bottom of ic. spreading the pa ttern and increasing the number of via as shown in the figure below, enable to achieve superior heat radiation c haracteristic. (this figure is an image only . it is recommended that the via size and number are designed suitable for the actual s ituation.). most of the heat loss in the bd3522efv occurs at the output n- channel fet. power loss is determined by the total v in -v out voltage and output current. be sure to confirm the system input and output voltage and the output current conditions in relation to the heat dissipation characteristi cs of the in and out in the design. bearing in mind that heat dissipation may vary substantially depending on the sub strate employed (due to the power package incorporated in th e bd3522efv) make sure to factor in conditions such as substrate size into the thermal design. power consumption (w) = input voltage (v in ) - output voltage (v out ) x i out (ave) example) where v in =1.7v, v o ut =1.2v, i=(ave) = 4 a, calculation based on ambient temperature (ta) w aj ta tj ? ??? ? 1-layer substrate (no copper foil area) 2-layer su bstrate (copper foil area : 15mm x 15mm) 2-layer substrate (copper foil area : 70mm x 70mm) 4-layer substrate (copper foil area : 70mm x 70mm) substrate size: 70 x 70 x 1.6mm 3 (substrate with thermal via) j -a: htssop-b20 125 c /w 86.2 c /w 54.1 c /w 39.1 c /w ? ? ? ? ? ? ? ? ? ? ? ? w 0.2 a0.4 v2.1 v7.1 w n consumptio power ? ? ? ? downloaded from: http:///
18 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 power dissipation htssop-b20 i/o equivalent circuits 25 power dissipation : pd [w] ambient temperature :t a [ c ] 1w 70mm x 70mm x 1.6mm (pcb with thermal via) 1 layer substrate (substrate surface copper foil area:0mm x 0mm) j -a=125c/w 2 layer substrate (substrate surface copper foil area:15mm x 15mm) j -a=86.2c /w 2 layer substrate (substrate surface copper foil area: 70 mm x 70 mm) j -a=54.1c /w 4 layer substrate (substrate surface copper foil area:70mm x 70mm) j -a=39.1c /w 0 50 75 100 150 1 2 3 4 125 1.45w 2.31w 3.2w 400k en vcc fb 1k 1k in in in in in in nrcs vcc 1k 1k 1k 90k 210k 1k vcc 1k 1k vcc out out 50k 10k 1k out out out out 1k vd 1k scp vcc 1k 1k 1k 1k 1k 5pf downloaded from: http:///
19 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an externa l diode between the power supply and the ic s power supply pin s. 2. power supply lines design the pcb layout pattern to provide low impedance supp ly lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the groun d and supply lines of the digital block from affecting the analog block. furthermore, connect a capacitor to ground at all powe r supply pins . consider the effect of temperature a nd aging on the capacitance value when using electrolytic capa citors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-si gnal ground caused by large currents. also ensure that the groun d traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the power dissipation rating be exc eeded the rise in temperature of the chip may result in deterioration of the properties of the chip. in case of exceeding thi s absolute maximum rating, increase the board size and copper area to prevent exceeding the pd rating. 6. recommended operating conditions these conditions represent a range within which the expec ted characteristics of the ic can be approximately obtained . the electrical characteristics are guaranteed under the condi tions of each parameter. 7. inrush current when power is first supplied to the ic, it is possible that th e internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequen ce and delays, especially if the ic has more than one po wer supply. therefore, give special consideration to power cou pling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field ma y cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors compl etely after each process or step. the ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when moun ting the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground, power supply and output pin . inter-pin shorts could be due to many reasons such as m etal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins du ring assembly to name a few. 11. unused input pins input pins of an ic are often connected to the gate of a mos tra nsistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the elec tric field from the outside can easily charge it. the smal l charge acquired in this way is enough to produce a signi ficant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise spe cified, unused input pins should be connected to the power supply or ground line. downloaded from: http:///
20 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 operational notes C continued 12. regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrate l ayers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of t he p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a paras itic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physica l damage. therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the gnd vo ltage to an input pin (and thus to the p substrate) should be avoided. figure 24. example of monolithic ic structure 13. area of safe operation (aso) operate the ic such that the output voltage, output current, and p ower dissipation are all within the area of safe operation (aso). 14. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that preven ts heat damage to the ic. normal operation should always be within the ics power dissipation rating. if however the rating is exceeded for a continued period, the junction temperature (tj) will rise which will activate the tsd circ uit that will turn off all output pins. the ic should be powered down and turned on again to resume normal operatio n because the tsd circuit keeps the outputs at the off state even if the tj falls below the tsd threshold. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set desi gn or for any purpose other than protecting the ic from heat damage. 15. output pin design pcb layout pattern to provide low impedance gnd and supp ly lines. to obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. furthermore, for all power sup ply terminals to ics, connect a capacitor between the power supply and the gnd terminal. when applying electrolytic capacitors in the circuit, not that capacitance characteristic va lues are reduced at low temperatures. tsd on temperature [ c ] (typ) bd3522efv 175 n n p + p n n p + p substrate gnd n p + n n p + n p p substrate gnd gnd parasitic elements pin a pin a pin b pin b b c e parasitic elements gnd parasitic elements c be transistor (npn) resistor n region close-by parasitic elements output pin (example) downloaded from: http:///
21 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 ordering information b d 3 5 2 2 e f v - e 2 part number package efv : htssop-b20 packaging and forming specification e2 : emboss tape reel opposite draw-out side: 1 pin ma rking diagram htssop-b20 (top view) b d 3 5 2 2 part number marking lot number 1pin mark downloaded from: http:///
22 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 physical dimension, tape and reel information package name htssop-b20 downloaded from: http:///
23 / 23 bd3522efv ? 20 15 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0j2j0a601000-1-2 02.nov.2015 rev.001 revision history date revision changes 02.nov.2015 001 new release downloaded from: http:///
datasheet d a t a s h e e t notice-pga-e rev.00 2 ? 2015 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (?specific applications?), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hm?s products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class ? class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohm?s products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation depending on ambient temperature. when used in sealed area, c onfirm that it is the use in the range that does not exceed t he maximum junction temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. if the flow sol dering method is preferred on a surface-mount products, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice-pga-e rev.00 2 ? 2015 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own indepen dent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohm?s internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, actions or demands arising from the co mbination of the products with other articles such as components, circuits, systems or external equipment (including software). 3. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the products or the informati on contained in this document. pr ovided, however, that rohm will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the produc ts, subject to the terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 201 5 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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