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this is information on a product in full production. november 2015 docid027688 rev 3 1/28 PM8908 monolithic buck converter for ddr memory termination datasheet - production data features ? integrated mosfets for high efficiency ? current cot architecture ? 1 v to 3.5 v input voltage (v in ) ? 5.0 v supply voltage (v cc ) ? constant frequency mode ? 1% output voltage accuracy ? two programmable switching frequencies (0.6 mhz or 1 mhz) ? adj output voltage from 0.5 v to 2 v ? embedded bootstrap diode ? ov/uv/oc and overtemperature protection ? soft-off with integrat ed discharge resistor ? external tracking ? power good output ? qfn20 3.5 x 4.0 mm compact package applications ? memory termination regu lator for ddr3, ddr4 and low power ddr3/ddr4 ? notebook/desktop/server ? low voltage application for 1 v to 3.5 v input rails description the PM8908 is a high efficiency monolithic step- down switching regulator designed mainly for the ddr termination. the ic operates from 1 v to 3.5 v input voltage (v in ). the device uses a cot control loop that provides very good performances in terms of load and line transients. the current sense is internally thermally compensated for optimum precision. the output voltage is adjusted from 0.5 v to 2 v with 1% accuracy overtemperature variations. the PM8908 also provides external tracking support. the PM8908 provides positive and negative overcurrent protection as well as over/undervoltage and overtemperature protection. pgood output easily provides real- time information on the output voltage. the PM8908 is available in a qfn20 3.5 x 4.0 mm package. qfn20 3.5 x 4.0 mm table 1. device summary order code package packaging PM8908tr qfn20 (3.5 x 4.0 mm) tape and reel www.st.com
contents PM8908 2/28 docid027688 rev 3 contents 1 typical application ci rcuit and block diagram . . . . . . . . . . . . . . . . . . . . 4 1.1 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . . 6 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 device configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3 startup and shutdown management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 soft-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.4 output voltage monitoring and protection . . . . . . . . . . . . . . . . . . . . . . . . 16 5.4.1 overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.4.2 undervoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4.3 power good (pgood) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4.4 overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4.5 overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 output voltage setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.2 droop setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.3 non-droop setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.4 inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.5 output capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.6 input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.7 compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
docid027688 rev 3 3/28 PM8908 contents 28 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.1 qfn20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
typical application circui t and block diagram PM8908 4/28 docid027688 rev 3 1 typical application circuit and block diagram 1.1 application circuit figure 1. typical application circuit figure 2. typical memory termination application circuit l r p good PM8908 pgood en mode vout comp refin pgnd phase boot vin vcc gnd vin = 1 v to 3.5 v vcc = 5 v c boot c f c out c vin c vcc 20 4 , 5 1, 2, 3 11, 12, 13, 14, 15 16 10 8 9 6 19 17 18 r 1 r f r m ref 7 r 2 c ref vout c p l r pgood PM8908 pgood en mode vout comp refin pgnd phase boot vin vcc gnd vddq = 1.2 v vcc = 5 v c boot c f c out c vin c vcc 20 4 , 5 1, 2, 3 11, 12, 13 , 14, 15 16 10 8 9 6 19 17 18 r 1 r f r m ref 7 r 2 c ref vout = 0.6 v vddq r 1 =r 2 c p
docid027688 rev 3 5/28 PM8908 typical application circuit and block diagram 28 1.2 block diagram figure 3. block diagram cot control logic, protections & adaptive dead times vcc vcc uvlo dead times discharge thermal monitor PM8908 pgood en ref vout comp refin pgnd phase boot vin gnd ss phase vcc mode voltage reference delay vout hy hy refin -16% refin +16% cl current limit k ov uv refin -30% refin +20% vout pgnd
pin description and connection diagrams PM8908 6/28 docid027688 rev 3 2 pin description and connection diagrams figure 4. pin connection (top view) pin description 1 2 3 4 PM8908 pgnd vin phase 12 15 14 13 18 19 16 17 boot en mode pgood comp 10 9 8 refin vout ref 7 5 11 6 20 pgnd pgnd vin vcc gnd phase phase phase phase table 2. pin description pin function no. name 1 pgnd power ground connection, connected to the embedded low-side mosfet source. connect to the pgnd pcb plane. see figure 1 . 2 3 4 vin power input voltage, connected to the embedded high-side mos drain. supply range is from 1 v to 3.5 v. bypa ss vin pins to pgnd pins close to the ic package with high quality mlcc capacitors. see figure 1 . 5 6gnd all the internal references are referred to this pin. connect to the pcb signal ground. 7ref reference output. connect a 1 ? f mlcc capacitor to gnd. see figure 1 . 8comp error amplifier output. connect with r f - c f to the ref pin for loop compensation. see figure 1 . 9refin reference input. apply a voltage between 0.5 to 2.0 v. filter with at least 0.01 ? f mlcc capacitors to gnd. 10 vout output voltage sense.
docid027688 rev 3 7/28 PM8908 pin description and connection diagrams 28 11 phase output inductor connection. the pins are connected to the embedded mosfets (high-side source and low-side drain). connect directly to the output inductor. see figure 1 . 12 13 14 15 16 boot bootstrap pin. it provides power supply for the floating high-side mos driver. connect with 0.1 f to phase. see figure 1 . 17 en enable. 18 mode switching frequency and the ocl programming pin. see table 6 on page 14 . this pin must not be left floating. 19 pgood power good pin. open drain output set free after ss has finished and pulled low when v out is out of the pgood window or any protection is triggered. pull up to vcc, if not used it can be left floating. 20 vcc device power supply. operative voltage is 5.0 v. filter with at least 1 ? f mlcc vs. gnd. thermal pad the thermal pad of the device. connect to the pcb ground plane with multiple vias. table 2. pin description (continued) pin function no. name
thermal data PM8908 8/28 docid027688 rev 3 3 thermal data table 3. thermal data symbol parameter value unit r thja thermal resistance junction to ambient (device soldered on demonstration board) 40 c/w t max maximum junction temperature 150 c t stg storage temperature range -55 to 150 c t j junction temperature range -40 to 150 c
docid027688 rev 3 9/28 PM8908 electrical specifications 28 4 electrical specifications 4.1 absolute maximum ratings note: absolute maximum ratings ar e those values beyond which damage to the device may occur. these are stress ratings only and functional oper ation of the device at these conditions is not implied. exposure to ab solute maximum rated conditi ons for extended periods may affect device reliability. all voltage values are with respect to the network ground terminal. table 4. absolute maximum ratings symbol parameter value (1) 1. all voltages need to be lower than v cc under any condition. unit vcc to pgnd, gnd -0.3 to 7 v vin to pgnd, gnd -0.3 to 4 v boot to pgnd, gnd -0.3 to 11 v to pgnd, gnd, t < 10 ns -0.3 to 12.2 (2) 2. regardless of application configurat ion, it is mandatory not to exceed the amr voltage value on the boot and phase pins. v to phase -0.3 to 7 v phase to pgnd, gnd -2 to 4 v to pgnd, gnd, t < 10 ns -2.2 to 7.5 (2) v pgood to pgnd, gnd -0.3 to 7 v en to pgnd, gnd -0.3 to 7 v vout to pgnd, gnd -1.0 to 3.6 v refin , comp , ref, mode to gnd -0.3 to 3.6 v
electrical specifications PM8908 10/28 docid027688 rev 3 4.2 electrical characteristics v cc = 5.0 v 5%, t a = 25 c (unless otherwise specified). table 5. electrical characteristics symbol parameter test cond itions min. typ. max. unit supply current and undervoltage lockout i in vin shutdown current shutdown, en = 0 v 0.3 5 ? a i cc vcc supply current en = h, v boot = 4.5 v, v cc = 4.5 v, v in = 3.5v, v m = gnd 23.6ma i ccsd vcc shutdown current shutdown, en = 0 v 4 10 ? a i bss boot input current v boot = 9 v, v phase = 3.5 v, v cc = 5.5 v 150 ? a vcc vcc supply voltage 4.5 5.0 5.5 v vcc uvlo vcc turn-on vcc rising 4.2 4.37 4.5 v hysteresis 440 mv ref uvlo v ref turn-on ref rising 1.8 v hysteresis 100 mv oscillator, off-ti me and on-time f sw oscillator accuracy r m = 100 k ? 1 mhz r m = 47 k ? 0.6 t off-min minimum off-time v in = 1.5 v, v out = 0.9 v, v refin = 1 v, f sw = 1 mhz / 0.6 mhz 170 ns reference and gm amplifier ? vout output voltage accuracy v refin = 1 v, no droop -1 +1 % v ref voltage reference i ref = 0 1.95 2.0 2.05 v g m transconductance (1) 1.00 ms i csk comp pin maximum sinking current v comp = 2 v, v refin - v out = -80 mv 80 ? a i csr comp pin maximum sourcing current v comp = 2 v, v refin - v out = 80 mv -80 ? a v cm common mode input voltage range (1) 02v v dm differential mode input voltage range (1) 080mv v oset input offset 0 mv f -3db -3 db frequency (1) 4.5 6.0 7.5 mhz a cs current sense gain gain from the current of the ls to pwm comp when pwm = off 47 53 59 mv/a
docid027688 rev 3 11/28 PM8908 electrical specifications 28 soft-end r ds phase discharge resistance 47 ? overcurrent protection i ocl positive overcurrent th reshold ls sourcing, r m = 47 k ? 47.611 a i ocln negative overcurrent threshold ls sourcing, r m = 47 k ? -11 - 7.6 - 4 a bootstrap switch r bss boot switch on-resistance i boot = 10 ma, t a = 25 c 12 ? over and undervoltage protection ovp ovp threshold v out rising 117 120 123 % v refin t ovpd ovp delay time from the v out pinout of + 20% of refin to ovp fault 10 ? s uvp uvp threshold v out falling 65 68 71 % v refin t uvpd uvp delay time from the v out pinout of -30% of refin to uvp fault 256 ? s undervoltage fault enable delay time from en = h to undervoltage ready 2.4 ms external tracking time from en = h to undervoltage ready 9ms overtemperature protection otp thermal shutdown threshold (1) 145 c thermal shutdown hysteresis (1) 10 c pgood pgood upper threshold v out rising 116 % v refin hysteresis 8 lower threshold v out falling 84 hysteresis 8 v pgood,l pgood voltage low impedance i pgood_sink = 4 ma, vcc = 4.5 v 0.3 v i pgood,h pgood leakage high impedance v pgood = 5.5 v 1 ? a t pgd pgood startup delay time external tracking time from en = h to pgood high 10 ms t pghd pgood high delay time rising edge 0.8 1 1.2 ms t pgld pgood low delay time falling edge (2) 10 ? s table 5. electrical ch aracteristics (continued) symbol parameter test cond itions min. typ. max. unit
electrical specifications PM8908 12/28 docid027688 rev 3 enable en input logic high en rising 2 v input logic low en falling 0.5 v i en en input current v en = 5 v 3 ? a mode i m mode current v mode from gnd to 2.4 v 15 ? a soft-start t ss soft-start time from en = h to vout 2.4 ms td delay soft-start time from en = h to vout ramp starts 750 ? s 1. guaranteed by design, not subject to test. 2. delay time not valid if the uvlo or en shutdown events are occurring. table 5. electrical ch aracteristics (continued) symbol parameter test cond itions min. typ. max. unit
docid027688 rev 3 13/28 PM8908 device description 28 5 device description the PM8908 is a high efficiency synchron ous step-down monolithic switching regulator capable to deliver or sink the current. the power input voltage (vin) can range from 1 v to 3.5 v, the signal input voltage (vcc) can range from 4.5 v to 5.5 v. the output voltage is regulated to the re fin voltage which comes from an external reference voltage. the output voltage accuracy is better than ? 1% over the line, load and temperature. the PM8908 embeds low r ds(on) n-channel mosfets for both hs (high-side) and ls (low- side). the high-switching frequency selectable in two values - 600 khz or 1 mhz and the small package allows very compact vr solutions. in the cot the t on is function of v in , v out and switching frequency (f sw ), as shown in equation 1 : equation 1 the PM8908 features a full set of protections and output voltage monitoring: ? precise and accurate overcurrent limit (internally compensated against temperature variations) ? over and undervoltage protection ? overtemperature protection ? undervoltage lockout on analog supply (vcc) ? power good open drain output easily provides real-time information about the output voltage. the dedicated enable pin (en) offers easy co ntrol on the power sequencing. forcing the en low, the device enters the shutdown state and absorbs a total quiescent current from vcc and vin less than 15 a. 5.1 power section the PM8908 integrates two low r ds(on) n-channel mosfets as low-side and high-side switches, optimized for fast switching transiti on and high efficiency over the entire load range. the hs mosfet drain is connected to the vin pins (power input), the ls mosfet source is connected to the pgnd pins (power ground), and the hs mosfet source and ls mosfet drain are connected togeth er and to the phase pins (see figure 1 on page 4 ). the driving section is supplied from the vcc pi ns that assure the proper driving voltage over all the vin range. t on v out v in f sw ? ----------------------- =
device description PM8908 14/28 docid027688 rev 3 to properly supply the powe r section is advised following: ? bypass vin pins to pgnd pins as close as po ssible to the ic package with high quality mlcc capacitors. ? connect the bootstrap capacitor (typically a 100 nf ceramic capacitor rated to stand vin voltage) from the boot pin to the phase pin to supply the hs driver. caution: do not connect an external bootstrap diode. th e ic already integrates an active bootstrap switch to charge the bootstrap capacitor, sa ving the cost of this external component. the PM8908 embodies the anti shoot-through and adaptive deadtime control to minimize low-side body diode conduction time an d consequently to reduce power losses: ? when the gate driving voltage of the hs drops (to check high-side mosfet turn-off), the ls mosfet is suddenly switched on ? when the gate driving voltage of the ls drops (to check low-side mosfet turn-off), the hs mosfet is suddenly switched on. 5.2 device configuration the PM8908 has a programming pin - mode (pin 18) - which allows choosing the regulator switching frequency and the ocl threshold. this programming feature is performed by selecting the proper resistor, to be mounted between the pin 18 to ground, as summarized in table 6 . note: the mode pin must not be left floating. 5.3 startup and shutdown management the ic monitors the supply voltage on the vc c pin. once vcc voltage is above the uvlo (undervoltage lockout) threshold and the en pin is above the turn-on threshold: ? if the ic is configured for tracking application (see figure 2 on page 4 ), the output voltage is regulated to the refin voltage. in order to discriminate between the non- tracking and the tracking, there is a delay time of 750 ? s required between the en or the vcc uvlo threshold and refin voltage. refin voltage must be applied within 9 ms (typ.) from the en high (see figure 5 ). ? if the ic is configured for non-tracking applic ation, the output voltage is regulated to the refin voltage, and the device provides a precise 2.4 ms soft-start time (see figure 6 ). the power input (vin) does not have a undervoltage protection function. table 6. switching frequency and ocl (see figure 1 on page 4 ) r m f sw [khz] ocl (a) 47 k ? 600 7.6 68 k ? 600 5.4 100 k ? 1000 5.4
docid027688 rev 3 15/28 PM8908 device description 28 figure 5. PM8908 turn-on (tracking startup) figure 6. PM8908 turn-on (non-tracking startup) vcc v cc uvlo en en thr refin t d v out =refin pgood t pgd 300mv vcc v cc uvlo en en thr refin t dc v out =refin pgood t d 300mv t ss t pghd
device description PM8908 16/28 docid027688 rev 3 figure 7. PM8908 startup time diagram soft-off the PM8908 implements the soft-off sequence turning off both the hs and ls mosfets and connecting the integrated discharge resistor (47 ? ) between the phase and pgnd pin. the PM8908 begins the soft-off sequence, and remains in a latched state, if one of the following conditions occurs: ? vcc voltage falls below uvlo threshold ? ovp (overvoltage protection) ? uvp (undervoltage protection) ? en pin is pulled low. the cycling vcc and en the ic recover from the latched state with a new soft-start sequence. 5.4 output voltage moni toring and protection the PM8908 monitors the output voltage status through the v out pin and compares the voltage on this pin with the refin voltage in order to provide over and undervoltage protection as well as the pgood signal. 5.4.1 overvoltage protection overvoltage protection is active as soon as the device is enabled, the vcc is above the respective undervoltage lockout level and refin is higher than 300 mv. t dc = 550 us(typ) if refin>300mv, PM8908 will perform ss by itself in 2.4 ms (typ) PM8908 latches uvp 0 PM8908 will not perform any ss by itself but will follow refin as it is observable on refin pin. refin need to have an external ss. PM8908 will not perform ss by itself. step transition observable at the end of the grey region t d =750 us(typ) case 1 case 3 case 2 9 ms(typ) en
docid027688 rev 3 17/28 PM8908 device description 28 the protection is triggered when the voltage sensed on the v out pin rises over the ovp threshold and the device acts as follows: ? de-asserts the pgood signal ? the hs mosfet is suddenly forced off ? the ls mosfet is turned on (to discharge the output and protect the load). when v out drops below the uvp threshold the ls mosfet is turned off and the discharge resistor is on. if v out recrosses the uvp threshold, the ls is turned on again and the discharge resistor is off. in the overvoltage protection state the negative overcurrent limit (ocln) is masked. this protection is latched, cycled en or vcc to recover. 5.4.2 undervoltage protection if vout falls below the uvp threshold for at least 256 ? s the ic stops switching and starts a soft-off sequence. the device acts as follows: ? de-asserts the pgood signal ? the hs mosfet and ls mosfet are forced off ? the discharge resistor is on. this protection is latched, cycled en or vcc to recover. the uvp protection is enabled after the soft-start end. 5.4.3 power good (pgood) the pgood is an open drain output. during the startup, the pgood goes high after 1 ms from the threshold detected. the pgood is forced low, to communicate that th e output voltage is no longer in regulation, if one of the following conditions is verified: ? the voltage of the v out pin exits from the pgood window ? the device is disabled, en is forced low ? vcc voltage is below the uvlo threshold ? any protection is triggered (ovp, uvp, otp). 5.4.4 overcurrent protection overcurrent protection is active as soon as the device is enabled and vcc voltage is above the uvlo level. the overcurrent function protects the converter from a shorted output or overload by sensing the output current information across the low-side integrated mosfet. ? positive ocl if the monitored current information is bigger th an the overcurrent thresholds, an overcurrent event is detected. the ic delays the next t on until the current drops below the positive ocl limit.
device description PM8908 18/28 docid027688 rev 3 the maximum available load current, with the valley current limit technique, is equal to equation 2 : equation 2 it is the sum of the valley current limit plus the half of the inductor current ripple. during the overcurrent event the vout drops un til the uvp threshold, de-asserts the pgood pin and then enters into the latch state. ? negative ocl the negative ocl circuit operates when the converter is sinki ng the current from the output load. the ic trigs the next t on until the current drops below the negative ocl limit. during the overcurrent event the vout goes up until the ovp threshold, de-asserts the pgood pin and then enters into the latch state. 5.4.5 overtemperature protection it is recommended that the device never exceeds the maximum allowable junction temperature. this temperature increase is main ly caused by the total power dissipated from the integrated power mosfets. to avoid any damage to the device when reaching high temperature, the PM8908 implements a thermal shutdown feature: when the junction temperature reaches 145 c the device turns off both mosfets. when the junc tion temperature drops to 135 c, the device restarts with a new soft-start sequence. i loadmax i ocl 1 2 -- - ? i ? + =
docid027688 rev 3 19/28 PM8908 application information 28 6 application information 6.1 output voltage setting the PM8908 integrates a 2 v internal reference (v ref ), with the total accuracy of ? 1%. the output voltage, in non-tracking configurat ion, can be easily programmed connecting the r 1 and r 2 resistors as follows (see also figure 8 ). ? connect the refin to the ref pin through the r 1 resistor ? connect the refin pin to the gnd through the r 2 resistor therefore, the output voltage se tting is easily achieved using equation 3 to select the value of the r os resistor: equation 3 figure 8. resistor divider configuration 6.2 droop setting in order to reduce the necessary output capacitance amount, the PM8908 can perform the load dependent behavior if the compensation network capacitor, cc, is avoided. the sensed current is used for reference voltage, in the pwm comparator inverting input. so doing, the programmed output voltage is: equation 4 where: v out v ref 1r 1 r 2 ? ?? + -------------------------------- = refin 9 r 1 vref 7 r 2 v out v refin v droop ? = v droop a cs i load ? r droop g m ? ----------------------------------- - =
application information PM8908 20/28 docid027688 rev 3 with: ? r droop is the resistor between the comp pin and the ref pin (see also figure 9 ) ? i load is the output current ? g m is the transconductance of the amplifier (1 ms) ? a cs is the current sense gain (53 mv/a) figure 9. typical application with droop configuration 6.3 non-droop setting the advantage of a non-droop configuration is that the load regulation is flat. it can be implemented by conn ecting a resistor (r c ) and a capacitor (c c ) between the comp pin and the ref pin (see also figure 1 on page 4 ). 6.4 inductor design the inductance value is defined by a compromise between the dynamic response time, the efficiency, the cost, and the size. the inductor must be calculated to maintain the ripple current ( ? i l ) between 20% and 30% of the maximum output current (typ.). the inductance value can be calculated with the following relationship: equation 5 where f sw is the switching frequency, v in is the input voltage, and v out is the output voltage. l r p good PM8908 pgood en mode vout comp refin pgnd phase boot vin vcc gnd vin = 1 v to 3.5 v vcc = 5 v c boot c out c vin c vcc 20 4 , 5 1, 2, 3 11 , 12 , 13 , 14, 15 16 10 8 9 6 19 17 18 r 1 r droop r m ref 7 r 2 c ref vout c p l v in v out ? f sw ? i l ? ----------------------------- - v out v in -------------- ? =
docid027688 rev 3 21/28 PM8908 application information 28 6.5 output capacitors the output capacitors are basic components to define the ripple voltage across the output and for the fast transient response of the po wer supply. they depend on the output voltage ripple requirements, as well as any output voltage deviation requirement during a load transient. during steady-state conditions, the output volt age ripple is influenced by both the esr and the capacitive value of the ou tput capacitors as follows: equation 6 equation 7 where ? i l is the inductor current ripple. in part icular, the expression that defines ? v out_c takes into consideration the output capacitor charge and discharge as a consequence of the inductor current ripple. 6.6 input capacitors the input capacitor bank is designed considering, mainly, the input rms current that depends on the output deliverable current (i out ) and the duty cycle (d) for the regulation as follows: equation 8 the equation reaches its maximum value, i out /2, with d = 0.5. the losses depend on the input capacitor esr and, in the worst case, are: equation 9 ? v out_esr ? i l esr ? = ? v out_c ? i l 1 8c out f sw ?? -------------------------------------- - ? = i rms i out d1d ? ?? ? ? = pesri out 2 ? ?? 2 ? =
application information PM8908 22/28 docid027688 rev 3 6.7 compensation network the PM8908 device implements a constant on-time control loop. the compensation network is shown in figure 10 . figure 10. compensation network the following procedure shall be followed in order to calculate the best network external components value. ? select r f value in order to obtain the desired closed loop regulator bandwidth according to equation 10 : equation 10 where: ? f t is the crossover frequency, it should be less than about 1/10 of the switching frequency ? r cs = 53 m ? ? select c f according to equation 11 : equation 11 ? select c p according to equation 12 : equation 12 ? check the phase margin obtained and repeat the whole procedure if necessary. comp refin c f 8 9 r f ref 7 c ref c p ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? out t out t m cs out t f c esr f c esr f g r c f r 5 2 1 5 2 1 2 ? ? ? f t f r f c ? ? ? 5 2 1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? out t c out p c esr f r c esr c 5 2 1 ?
docid027688 rev 3 23/28 PM8908 package information 28 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark.
package information PM8908 24/28 docid027688 rev 3 7.1 qfn20 package information figure 11. qfn20 3.5 x 4 x 1.0 mm package outline ".
docid027688 rev 3 25/28 PM8908 package information 28 figure 12. recommended footprint table 7. qfn20 3.5 x 4 x 1.0 mm package mechanical data symbol dimensions (mm) min. typ. max. a 0.90 0.95 1.00 a1 0.00 0.02 0.05 a3 0.152 b 0.18 0.25 0.30 d3.43.53.6 d2 2.00 2.10 2.20 e3.94.04.1 e2 2.50 2.60 2.70 e0.50 l 0.35 0.40 0.45 k0.20 ".
package information PM8908 26/28 docid027688 rev 3 figure 13. qfn20 3.5 x 4 x 1.0 mm tape and reel figure 14. qfn20 3.5 x 4 x 1.0 mm winding direction ".
docid027688 rev 3 27/28 PM8908 revision history 28 8 revision history table 8. document revision history date revision changes 30-mar-2015 1 initial release. 22-oct-2015 2 ? added footnote 2 to table 4 . ? added minimum and maximum dimension values for symbols d and e in table 7 . 09-nov-2015 3 first public release.
PM8908 28/28 docid027688 rev 3 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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