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  ts1109 data sheet ts1109 bidirectional current-sense amplifier with buffered bipo- lar output the ts1109 incorporates a bidirectional current-sense amplifier plus a buffered bipolar output with an adjustable bias. the internal configuration of the ts1109 high-side cur- rent-sense amplifier is a variation of the ts1101 bidirectional current-sense amplifier, consuming 0.68 a(typ) and 1.2 a(max). the current-sense amplifiers buffered output consumes only 0.76 a(typ) and 1.3 a(max) of supply current. with an input offset volt- age of 150 v(max) and a gain error of 1%(max), the ts1109 is optimized for high preci- sion current measurements applications ? power management systems ? portable/battery-powered systems ? smart chargers ? battery monitoring ? overcurrent and undercurrent detection ? remote sensing ? industrial controls key features ? low supply current ? current sense amplifier: 0.68 a ? i vdd : 0.76 a ? high side bidirectional current sense amplifier ? wide csa input common mode range: +2 v to +27 v ? low csa input offset voltage: 150 v(max) ? low gain error: 1%(max) ? two gain options available: ? gain = 20 v/v : ts1109-20 ? gain = 200 v/v : ts1109-200 ? 8-pin tdfn packaging (3 mm x 3 mm) silabs.com | smart. connected. energy-friendly. rev. 1.0
1. ordering information table 1.1. ordering part numbers ordering part number description gain v/v TS1109-20IDT833 bidirectional current sense amplifier with buffered bipolar output 20 ts1109-200 idt833 bidirectional current sense amplifier with buffered bipolar output 200 note: adding the suffix t to the part number (e.g. ts1109-200idt833t) denotes tape and reel. ts1109 data sheet ordering information silabs.com | smart. connected. energy-friendly. rev. 1.0 | 1
2. system overview 2.1 functional block diagram figure 2.1. ts1109 bidirectional bipolar buffered current sense amplifier block diagram ts1109 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 2
2.2 current sense amplifier + output buffer the internal configuration of the ts1109 bidirectional current-sense amplifier is a variation of the ts1101 bidirectional current-sense amplifier. the ts1109 current-sense amplifier is configured for fully differential input/output operation. referring to the block diagram, the inputs of the ts1109s differential input/output amplifier are connected to rs+ and rsC across an external r sense resistor that is used to measure current. at the non-inverting input of the current-sense amplifier, the applied voltage difference in voltage between rs+ and rsC is i load x r sense . since the rsC terminal is the non-inverting input of the internal op-amp, the current-sense op-amp action drives pmos[1/2] to drive current across r gain[a/b] to equalize voltage at its inputs. thus, since the m1 pmos source is connected to the inverting input of the internal op-amp and since the voltage drop across r gaina is the same as the external v sense , the m1 pmos drain-source current is equal to: i d s ( m 1 ) = v s e n s e r g a i n a i d s ( m 1 ) = i l o ad r s e n s e r g a i n a the drain terminal of the m1 pmos is connected to the transimpedance amplifiers gain resistor, r out , via the inverting terminal. the non-inverting terminal of the transimpedance amplifier is internally connected to vbias, therefore the output voltage of the ts1109 at the out terminal is: v o u t = v b i a s ? i l o a d r s e nse r o u t r g a i n a when the voltage at the rsC terminal is greater than the voltage at the rs+ terminal, the external v sense voltage drop is impressed upon r gainb . the voltage drop across r gainb is then converted into a current by the m2 pmos. the m2 pmos drain-source current is the input current for the nmos current mirror which is matched with a 1-to-1 ratio. the transimpedance amplifier sources the m2 pmos drain-source current for the nmos current mirror. therefore, the output voltage of the ts1109 at the out terminal is: v o u t = v b i a s + i load r s e nse r o u t r gainb when m1 is conducting current (v rs+ > v rsC ), the ts1109s internal amplifier holds m2 off. when m2 is conducting current (v rsC > v rs+ ), the internal amplifier holds m1 off. in either case, the disabled pmos does not contribute to the resultant output voltage. the current-sense amplifiers gain accuracy is therefore the ratio match of r out to r gain[a/b] . for each of the two gain options availa- ble, the following table lists the values for r gain[a/b] . table 2.1. internal gain setting resistors (typical values) gain (v/v) r gain[a/b] () r out () part number 20 2 k 40 k ts1109-20 200 200 40 k ts1109-200 the ts1109 allows access to the inverting terminal of the transimpedance amplifier by the filt pin, whereby a series rc filter may be connected to reduce noise at the out terminal. the recommended rc filter is 4 k and 0.47 f connected in series from filt to gnd to suppress the noise. any capacitance at the out terminal should be minimized for stable operation of the buffer. ts1109 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 3
2.3 sign output the ts1109 sign output indicates the load currents direction. the sign output is a logic high when m1 is conducting current (v rs+ > v rsC ). alternatively, the sign output is a logic low when m2 is conducting current (v rsC > v rs+ ). the sign comparators transfer characteristic is illustrated in the figure below. unlike other current-sense amplifiers that implement an out/sign arrangement, the ts1109 exhibits no dead zone at i load switchover. figure 2.2. ts1109 sign output transfer characteristic 2.4 selecting a sense resistor selecting the optimal value for the external r sense is based on the following criteria and for each commentary follows: 1. r sense voltage loss 2. v out swing vs. desired v sense and applied supply voltage at vdd 3. total i load accuracy 4. circuit efficiency and power dissipation 5. r sense kelvin connections 2.4.1 rsense voltage loss for lowest ir power dissipation in r sense , the smallest usable resistor value for r sense should be selected. ts1109 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 4
2.4.2 vout swing vs. desired vsense and applied supply voltage at vdd although the current sense amplifier draws its power from the voltage at its rs+ and rsC terminals, the signal voltage at the out terminal is provided by a buffer, and is therefore bounded by the buffers output range. as shown in the electrical characteristics table, the csa buffer has a maximum and minimum output voltage of: v o u t ( max ) = v dd (min ) ? 0.2 v v o u t ( min ) = 0.2v therefore, the full-scale sense voltage should be chosen so that the out voltage is neither greater nor less than the maximum and minimum output voltage defined above. to satisfy this requirement, the positive full-scale sense voltage, v sense(pos_max) , should be chosen so that: v s e n s e ( p o s _ max ) < vbias ? v o u t ( min ) g a i n likewise, the negative full-scale sense voltage, v sense(neg_min) , should be chosen so that: v s e n s e ( n eg _ min ) < v o u t ( max ) ? v bias g ain for best performance, r sense should be chosen so that the full-scale v sense is less than 75 mv. 2.4.3 total load current accuracy in the ts1109s linear region where v out(min) < v out < v out(max) , there are two specifications related to the circuits accuracy: a) the ts1109 csas input offset voltage (v os(max) = 150 v), b) the ts1109 csas gain error (ge (max) = 1%). an expression for the ts1109s total error is given by: v o u t = v b i as ? g a i n ( 1 g e ) v s e n s e ( ga i n v o s ) a large value for r sense permits the use of smaller load currents to be measured more accurately because the effects of offset voltag- es are less significant when compared to larger v sense voltages. due care though should be exercised as previously mentioned with large values of r sense . 2.4.4 circuit efficiency and power dissipation ir loses in r sense can be large especially at high load currents. it is important to select the smallest, usable r sense value to minimize power dissipation and to keep the physical size of r sense small. if the external r sense is allowed to dissipate significant power, then its inherent temperature coefficient may alter its design center value, thereby reducing load current measurement accuracy. precisely because the ts1109 csas input stage was designed to exhibit a very low input offset voltage, small r sense values can be used to reduce power dissipation and minimize local hot spots on the pcb. 2.4.5 rsense kelvin connections for optimal v sense accuracy in the presence of large load currents, parasitic pcb track resistance should be minimized. kelvin-sense pcb connections between r sense and the ts1109s rs+ and rsC terminals are strongly recommended. the drawing below illustrates the connections between the current-sense amplifier and the current-sense resistor. the pcb layout should be balanced and symmetri- cal to minimize wiring-induced errors. in addition, the pcb layout for r sense should include good thermal management techniques for optimal r sense power dissipation. figure 2.3. making pcb connections to r sense ts1109 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 5
2.4.6 rsense composition current-shunt resistors are available in metal film, metal strip, and wire-wound constructions. wire-wound current-shunt resistors are constructed with wire spirally wound onto a core. as a result, these types of current shunt resistors exhibit the largest self-inductance. in applications where the load current contains high-frequency transients, metal film or metal strip current sense resistors are recommen- ded. 2.4.7 internal noise filter in power management and motor control applications, current-sense amplifier are required to measure load currents accurately in the presence of both externally-generated differential and common-mode noise. an example of differential-mode noise that can appear at the inputs of a current-sense amplifier is high-frequency ripple. high-frequency ripple (whether injected into the circuit inductively or ca- pacitively) can produce a differential-mode voltage drop across the external current-shunt resistor, r sense . an example of externally- generated, common-mode noise is the high-frequency output ripple of a switching regulator that can result in common-mode noise in- jection into both inputs of a current-sense amplifier. even though the load current signal bandwidth is dc, the input stage of any current-sense amplifier can rectify unwanted, out-of-band noise that can result in an apparent error voltage at its output. against common-mode injection noise, the current-sense amplifiers in- ternal common-mode rejection ratio is 130 db (typ). to counter the effects of externally-injected noise, the ts1109 incorporates a 50 khz (typ), 2nd-order differential low-pass filter as shown in the ts1109s block diagram, thereby eliminating the need for an external low-pass filter, which can generate errors in the offset voltage and the gain error. 2.4.8 pc board layout and power-supply bypassing for optimal circuit performance, the ts1109 should be in very close proximity to the external current-sense resistor, and the pcb tracks from r sense to the rs+ and the rsC input terminals of the ts1109 should be short and symmetric. also recommended are surface mount resistors and capacitors, as well as a ground plane. ts1109 data sheet system overview silabs.com | smart. connected. energy-friendly. rev. 1.0 | 6
3. electrical characteristics table 3.1. recommended operating conditions 1 parameter symbol conditions min typ max units system specifications operating voltage range vdd 1.7 5.25 v common-mode input range v cm v rs+ , guaranteed by cmrr 2 27 v note: 1. all devices 100% production tested at t a = +25 c. limits over temperature are guaranteed by design and characterization. table 3.2. dc characteristics 1 parameter symbol conditions min typ max units system specifications no load input supply current i rs+ + i rsC see note 2 0.68 1.2 a i vdd 0.76 1.3 a current sense amplifier common mode rejection ratio cmrr 2 v < v rs+ < 27 v 120 130 db input offset voltage (see note 3) v os t a = +25 c 100 150 v C40 c < t a < +85 c 200 v v os hysteresis (see note 4) v hys t a = +25 c 10 v gain g ts1109-20 20 v/v ts1109-200 200 positive gain error (see note 5) ge+ t a = +25 c 0.1 0.6 % C40 c < t a < +85 c 1 % negative gain error (see note 5) geC t a = +25 c 0.6 1 % C40 c < t a < +85 c 1.4 % gain match (see note 5) gm t a = +25 c 0.6 1 % C40 c < t a < +85 c 1.4 % transfer resistance r out from filt to out 28 40 52.8 k? csa buffer input bias current i buffer_bias C40 c < t a < +85 c 0.3 na input referred dc offset v buffer_os 2.5 mv offset drift tcv buffer_os C40 c < t a < +85 c 0.6 v/c input common mode range v buffer_cm C40c < t a < +85 c 0.2 vdd C 0.2 v output range v out(min,max) i out = 150 a 0.2 vdd C 0.2 v sign comparator parameters ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 7
parameter symbol conditions min typ max units output low voltage v sign_ol v dd = 1.8 v, i sink = 35 a 0.2 v output high voltage v sign_oh v dd = 1.8 v, i source = 35 a vdd C 0.2 v note: 1. rs+ = rsC = 3.6 v, v sense = (v rs+ C v rsC ) = 0 v, vdd = 3 v, vbias = 1.5 v, filt connected to 4 kw and 470 nf in series to gnd. t a = t j = C40 c to +85 c unless otherwise noted. typical values are at t a = +25 c. 2. extrapolated to v out = v filt . i rs+ + i rsC is the total current into the rs+ and the rsC pins. 3. input offset voltage v os is extrapolated from a v out(+) measurement with v sense set to +1 mv and a v out(C) measurement with v sense set to C1 mv; average v os = (v out(C) C v out(+) )/(2 x gain). 4. amplitude of v sense lower or higher than v os required to cause the comparator to switch output states. 5. gain error is calculated by applying two values for v sense and then calculating the error of the actual slope vs. the ideal transfer characteristic: for gain = 20 v/v, the applied v sense for ge is 25 mv and 60 mv. for gain = 200 v/v, the applied v sense for ge is 2.5 mv and 6 mv. table 3.3. ac characteristics parameter symbol conditions min typ max units csa buffer output settling time t out_s 1% final value, v out = 1.3 v gain = 20 v/v 1.35 msec sign comparator propagation delay t sign_pd v sense = 1 mv 3 msec v sense = 10 mv 0.4 msec table 3.4. thermal conditions parameter symbol conditions min typ max units operating temperature range t op C40 +85 c ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 8
table 3.5. absolute maximum limits parameter symbol conditions min typ max units rs+ voltage v rs+ C0.3 27 v rsC voltage v rsC C0.3 27 v supply voltage vdd C0.3 6 v out voltage v out C0.3 6 v sign voltage v sign C0.3 6 v filt voltage v filt C0.3 6 v vbias voltage v vbias C0.3 vdd + 0.3 v rs+ to rsC voltage v rs+ C v rsC 27 v short circuit duration: out to gnd continuous continuous input current (any pin) C20 20 ma junction temperature 150 c storage temperature range C65 150 c lead temperature (soldering, 10 s) 300 c soldering temperature (reflow) 260 c esd tolerance human body model 2000 v machine model 200 v ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 9
for the following graphs, v rs+ = v rsC = 3.6 v; vdd = 3 v; vbias = 1.5 v, and t a = +25 c unless otherwise noted. ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 10
ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 11
ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 12
ts1109 data sheet electrical characteristics silabs.com | smart. connected. energy-friendly. rev. 1.0 | 13
4. typical application circuit figure 4.1. ts1109 typical application circuit ts1109 data sheet typical application circuit silabs.com | smart. connected. energy-friendly. rev. 1.0 | 14
5. pin descriptions ts1109 table 5.1. pin descriptions pin label function 1 sign sign output. sign is high for v rs+ >v rsC and low for v rsC >v rs+ . 2 vdd external power supply pin. connect this to the systems vdd supply. 3 vbias bias voltage for csa output. when vref is activated, leave open. 4 gnd ground. connect to analog ground. 5 out csa buffered output. connect to cinC. 6 filt inverting terminal of csa buffer. connect a series rc filter of 4 k and 0.47 f, otherwise leave open. 7 rs+ external sense resistor power-side connection. 8 rsC external sense resistor load-side connection. exposed pad epad exposed backside paddle. for best electrical and thermal performance, solder to analog ground. ts1109 data sheet pin descriptions silabs.com | smart. connected. energy-friendly. rev. 1.0 | 15
6. packaging figure 6.1. ts1109 3x3 mm 8-tdfn package diagram table 6.1. package dimensions dimension min nom max a 0.70 0.75 0.80 a1 0.00 0.02 0.05 a2 0.20 ref b 0.25 0.30 0.35 d 3.00 bsc d2 1.49 1.50 1.51 e 0.65 bsc e 3.00 bsc e2 1.65 1.75 1.85 l 0.30 0.40 0.50 k 0.20 0.25 0.30 j 0.65 ref aaa 0.10 bbb 0.05 ccc 0.05 note: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components. 4. this drawing conforms to the jedec solid state outline mo-229. ts1109 data sheet packaging silabs.com | smart. connected. energy-friendly. rev. 1.0 | 16
7. top marking figure 7.1. top marking table 7.1. top marking explanation mark method laser pin 1 mark: circle = 0.50 mm diameter (lower left corner) font size: 0.50 mm (20 mils) line 1 mark format: product id note: a = 20 gain, b = 200 gain line 2 mark format: tttt C mfg code manufacturing code line 3 mark format: yy = year; ww = work week year and week of assembly ts1109 data sheet top marking silabs.com | smart. connected. energy-friendly. rev. 1.0 | 17
table of contents 1. ordering information ............................1 2. system overview ..............................2 2.1 functional block diagram ..........................2 2.2 current sense amplifier + output buffer .....................3 2.3 sign output ..............................4 2.4 selecting a sense resistor .........................4 2.4.1 rsense voltage loss ..........................4 2.4.2 vout swing vs. desired vsense and applied supply voltage at vdd ..........5 2.4.3 total load current accuracy ........................5 2.4.4 circuit efficiency and power dissipation ....................5 2.4.5 rsense kelvin connections ........................5 2.4.6 rsense composition ..........................6 2.4.7 internal noise filter ...........................6 2.4.8 pc board layout and power-supply bypassing ..................6 3. electrical characteristics ...........................7 4. typical application circuit ......................... 14 5. pin descriptions ............................. 15 6. packaging ............................... 16 7. top marking ............................... 17 table of contents 18
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