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elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 ?? driven?by e981.10 1/19 basic i o-link transceiver features ? supply voltage range 8v to 36v ? integrated 5v voltage regulator ? wake-up detection ? driver capability up to 200ma ? c/q reverse polarity protection ? 3.3v / 5v compatible digital interface ? baud rate selection up to 230kbaud ? load current monitor and over current protection ? over temperature protection ? junction temperature up to +150c ? qfn20l4 package general description this ic is intended to be used as transceiver in io-link and standard io mode applications in sensor and ac - tuator devices. communication and power supply work across a common three wire cable to the io-link mas - ter, so continued use of available wiring is possible. the integrated voltage regulator provides 5v/20ma for external purposes. the output driver provides up to 200ma and features reverse polarity protection plus over current protection. it can be confgured as low side, high side, or push-pull driver. the switchable slew rate allows low and optimized electromagnetic radiation. the tiny package outline allows usage even in applica - tions with very limited board space. io-link is a point-to-point interface between exist - ing feld busses and sensor/actuator devices. io-link serves the transmission of specifc parameters or data, like diagnosis information. a pplications vdd vddh l+ txen speed txd wake ilim rxd vdd_io gnd gnd c/q e981.10 system control voltage regulator 5v/20ma external c speed onls onhs ilim silim rxd supply monitor overtemperature protection silim vrego option2 power transistor c/q l- option1 wire evaluation kit pcb 1
e981.10 2/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 1.1 pin description 1 pinout no name type 1) pull description connection 1 vdd_io s - supply host interface see specifcation 2 silim d_i down reduced overcurrent limitation threshold see specifcation 3 gnd2 s - ground connect to system ground 4 test d_i down test connect to system ground 5 nc not internally connected connect to system ground 6 atb a_io - test not connected or connect to system ground (prefered) 7 vdd s - internal supply i/o see specifcation 8 vrego hv_a_io - regulator control output see specifcation 9 nc not internally connected not connected (reduce risk of leakage or short circuit to neighbour pins) 10 vddh s - main supply see specifcation 11 nc not internally connected not connected (reduce risk of leakage or short circuit to neighbour pins) 12 c/q hv_a_io - io-link interface see specifcation 13 nc not internally connected not connected (reduce risk of leakage or short circuit to neighbour pins) 14 gnd1 s - ground connect to system ground 15 ilim d_o - overcurrent signal see specifcation 16 wake d_o - wake-up request see specifcation 17 rxd d_o - receive signal see specifcation 18 txd d_i up transmit signal see specifcation 19 speed d_i down baud rate / slope control see specifcation 20 txen d_i down transmitter enable see specifcation 21 gnd3, exposed die pad s - the exposed die pad is the backside metal pad of the package connect to system ground 1) d = digital, a = analog, s = supply, i = input, o = output, hv = high voltage
3/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 2 block diagram 1.2 package pinout qf n 20 l 4 figure 1: package pinout top view figure 2: block diagram vdd_io silim gnd2 test nc atb vdd vrego nc vddh txen speed txd rxd wake 20 19 18 17 16 exposed diepad 21 gnd3 6 7 8 9 10 ilim gnd1 nc c/q nc 15 14 13 12 11 1 2 3 4 5 all gnd pins have to be connected to local gnd of the application. vdd vddh txen speed txd wake ilim rxd vdd_io gnd c/q e981.10 system control voltage regulator 5v/20ma speed onls onhs ilim silim rxd supply monitor overtemperature protection silim vrego
e981.10 4/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 3 operating c onditions 3.1 absolute maximum r atings continuous operation of the device above these ratings is not recommended and may destroy the device. all po - tentials referred to ground (gnd) unless otherwise specifed. currents fowing into the circuit pins have posi - tive values. n o. description c ondition s ymbol min. max. unit 1 continous dc voltage at vddh vddh -0.3 40 v 2 continous dc voltage at vdd_io vdd_io -0.3 5.5 v 3 continous dc voltage at c/q pin c/q-gnd vcq -40 40 v 4 voltage at c/q t<500ms c/q-gnd -40 60 v 5 continous dc voltage at c/q pin vddh-c/q vcq 40 v 6 voltage at c/q t<500ms vddh-c/q 60 v 7 continous dc voltage at digital i/os vio_dig -0.3 vdd_io+0.3 v 8 aec q100-002 (hbm) esd immunity 2 kv 9 storage temperature tstg -40 125 c 10 junction temperature tj 150 c 11 ambient temperature ta 125 c 12 power dissipation pv 900 mw n o. description c ondition s ymbol min. t yp. max. unit 1 supply voltage at pin vddh vddh 8 24 36 v 2 digital interface supply 3.3v interface supply vdd_io 3 3.3 3.6 v 3 digital interface supply 5v interface supply vdd_io 4.5 5 5.5 v 4 operating temperature range top -40 100 c 5 supply voltage at pin vddh for io-link communication vddh 18 24 30 v 3.2 r ecommended operating c onditions the following conditions apply unless otherwise stated. all potentials referred to ground (gnd) unless other - wise specifed.currents fowing into the circuit pins have positive values.
5/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 4.1.2 vdd_io 4.1.2.1 dc c haracteristics 4 detailed e lectrical s pecifcation n o. description c ondition s ymbol min. t yp. max. unit 1 supply current at vddh no external load at vdd / vrego txen=low iddh 1.5 4 ma n o. description c ondition s ymbol min. t yp. max. unit 1 decoupling capacitor at vdd c_vdd 100/330 1) 2000 nf n o. description c ondition s ymbol min. t yp. max. unit 1 supply current at vdd_io static condition idd_io 20 50 a 2 vdd_io undervoltage threshold vdd_io_ uv 1.5 3 v 4.1 power supply 4.1.1 vddh 4.1 . 1.1 dc c haracteristics 4.1 . 3.2 ac c haracteristics 4.1.3 vdd / vre go 4.1.3.1 dc c haracteristics n o. description c ondition s ymbol min. t yp. max. unit 1 voltage at pin vdd vddh=8 ... 36v vdd 4.75 5 5.25 v 2 voltage at pin vrego external npn transistor used vrego vdd+ 0.7 v 3 available output current for external application vdd=vrego ireg_ext 20 ma 4 vdd undervoltage threshold vdd_uv 3.5 4.5 v 5 vdd supply current vdd=5v idd 0.6 2 ma 1) c_vdd = 100nf is suffcient for the stable operation of the voltage regulator. however for a good blocking of the 5v sup - ply (spike supression) it is recommended to use 330nf or more (up to 2f).
e981.10 6/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 4.2 host interface 4.3 t ransmitter 4.2.1 dc c haracteristics 4.3.1 dc c haracteristics n o. description c ondition s ymbol min. t yp. max. unit 1 high level input voltage input pins vdig_ih 0.7 vdd_ io 2 low level input voltage input pins vdig_il 0.3 vdd_ io 3 high level output voltage iload=2ma; pins rxd, wake, ilim vdig_oh 0.8 vdd_ io 4 low level output voltage iload=-2ma; pins rxd, wake, ilim vdig_ol 0.2 vdd_ io 5 input pull down or pull up current vpin= vdd_io= 5v vpin= vdd_io= 3.3v ipd 30 15 a n o. description c ondition s ymbol min. t yp. max. unit 1 dc driver residual voltage low iqls=100ma, txd=high, vrqls 1.5 v 2 dc driver residual voltage high iqhs=-100ma, txd=low, vrqhs vsup- 1.7 v 3 dc driver residual voltage low iqls=200ma, txd=high 8v vddh < 15v vrqls 2.5 v 4 dc driver residual voltage low iqls=200ma, txd=high, 15v vddh 36v vrqls 2.0 v 5 dc driver residual voltage high iqhs=-200ma, txd=low, 8v vddh < 15v vrqhs vsup- 2.5 v 6 dc driver residual voltage high iqhs=-200ma, txd=low, 15v vddh 36v vrqhs vsup- 2.0 v 7 overcurrent shutoff threshold low driver current low, txd=high silim=low ithl_off 220 350 480 ma 8 overcurrent shutoff threshold high driver current high, txd=low silim=low ithh_off -480 -350 -220 ma 9 reduction of overcurrent shutoff threshold (divided by) in contrast to silim=low silim=high 2
7/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 4.4 r eceiver 4.4.1 dc c haracteristics 4.3.2 ac c haracteristics n o. description c ondition s ymbol min. t yp. max. unit 1 input threshold high 18v < vddh < 30v vthhs 10.5 13 v 2 input threshold low 18v < vddh < 30v vthls 8 11.5 v 3 input threshold hysteresis 18v < vddh < 30v vhyss 1 2.5 4 v 4 receiver input resistance -3v < vcq < vsup+3v rrx 10 20 40 kohm 5 vddh voltage range for io-link conform communi - cation vddh 18 30 v n o. description c ondition s ymbol min. t yp. max. unit 1 output voltage rise time 230.4kbaud cload=5nf, rload=2k speed=high, txd high to low transition tdr 896 ns 2 output voltage rise time 38.4kbaud cload=5nf, rload=2k speed=low, txd high to low transition tdr 5.2 s 3 output voltage fall time 230.4kbaud cload=5nf, rload=2k speed=high, txd low to high transition tdf 896 ns 4 output voltage fall time 38.4kbaud cload=5nf, rload=2k speed=low, txd low to high transition tdf 5.2 s 5 on time with overload short to supply, single overload event ton_ol 5 75 s 6 off time after overload detection vddh=8v toff_ ol_8v 5 12 25 ton_ ol 7 off time after overload detection vddh=36v toff_ ol_36v 15 35 80 ton_ ol 8 setup time txd stable be - fore transition txen=low to txen=high application information tsetup 1 s 9 hold time txd stable after transition txen=high to txen=low application information thold 1 s 10 propagation delay txen to transmitter enable after transition txen=low to txen=high tprop_ txen 1 s
e981.10 8/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 4.4.2 ac c haracteristics 4.5 wake-up 4.6 t emperature monitor 4.5.1 dc c haracteristics 4.6.1 dc c haracteristics 4.5.2 ac c haracteristics n o. description c ondition s ymbol min. t yp. max. unit 1 receiver delay information parameter td_rx 200 300 ns 2 accepted minimum bit length (debounce window) tbit_min 250 1000 ns n o. description c ondition s ymbol min. t yp. max. unit 1 supply voltage at vddh for wake-up functionality vddh 18 32 v n o. description c ondition s ymbol min. t yp. max. unit 1 overtemperature threshold tover 155 175 200 c n o. description c ondition s ymbol min. t yp. max. unit 1 wake-up debounce time single event of over - load with receiver level change opposite to txd twu 20 74 s
9/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 5 functional description 5.1 power supply 5.1.1 vddh 5.1.2 vdd_io 5.1.3 vdd 5.1.4 power up sequences vddh is the main supply pin. pin vdd_io supplies the host interface and allows an adaptation to 3.3v or 5v host sup - ply levels. pin vrego is the voltage regulator output and pin vdd is 5v sense input and internal supply. an external 5v supply can be applied at vdd, if the internal regulator is not intended to be used. in this case vrego must be left open. if the internal regulator is used, pin vdd has to be connected to the regulator output pin vrego. if external com - ponents must be supplied with the regulated 5v, the regulator current driving capability can be extended by an external npn transistor. vddh is the main supply voltage for the ic. vdd_io is the supply voltage for the io-stages between the ic and the host. it can be at 3.3v or 5v level. if vdd_io is under vdd_io_uv the transmitter is disabled. pin vdd supplies the internal blocks. the supply voltage vdd can be applied externally or generated by the inter - nal 5v regulator. an external npn boost transistor can be connected to pins vrego (base) and vdd (emitter) in order to supply external devices too. if the voltage regulator is used without external transistor, both pins have to be connected. if vdd is lower than vdd_uv the transmitter is disabled. as the supply voltage vddh is applied, an internal voltage generator supplies the bandgap reference with 5v. the voltage regulator starts up and supplies the internal circuitry and optionally external circuits as well. the power on reset circuit releases the digital logic. the supply voltage vdd_io must be present in order to supply the host interface and enable the transmitter. if the internal voltage regulator is not used, an external 5v has to be applied at pin vdd. no sequence is mandatory in order to apply vdd and vdd_io. power supply pin vrego pin vdd supply current for external components 1. with internal voltage regulator short to vdd short to vrego <20 ma 2. with external supply open connected to external supply external supply 3. with external boost transistor (collector to vddh) connected to base of npn transistor connected to emitter of npn transistor depends on npn transistor
e981.10 10/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 5.3 t ransmitter the push- pull transmitter is activated with a high level on pin txen and drives the c/q pin low or high in accor - dance with the inverted logic level on pin txd. a slope control limits eme. the transition times can be set for two different baud rates. speed=low is default 38.4 kbaud or 4.8 kbaud, speed=high sets the transmission speed to 230.4 kbaud. the transmitter is operable only if vdd and vdd_io are within their specifed limits. in sio mode the transmitter must be used in highspeed mode (speed=high) to enable a wide range of different load conditions. t x en t xd c /q r xd low low high-z inverted c/q low high high-z inverted c/q high low high low high high low high pin speed transmission rate low 38.4 kbaud high 230.4 kbaud 5.2 host interface the logic level at the digital interface pins must be in accordance with the supply of the external control circuitry. this supply voltage is applied to pin vdd_io. level shifter adapt the logic information to the internal supply. thus the ic can operate together with control devices operating from 3.3v or 5v supplies. digital input pins have pull- up/down circuits in order to avoid erroneous response of the ic in case of broken control lines. input pins: txen, txd, speed, silim output pins: rxd, wake, ilim a high level at pin txen enables the transmitter. a low level (default value if not connected) turns the transmit - ter off. txd determines the output level of the active transmitter. the default level is high. a low level at pin speed (de - fault level) sets the transmitter to a transmission rate of 38.4 kbaud, high level to 230.4 kbaud. a high level at pin silim divides the overcurrent threshold in low side and high side driver by 2 in contrast to the low level at silim. pin rxd provides the receiver output information from reading the level at pin cq. a high level at pin wake indicates the detection of a wake up event. a high level at pin ilim signals an overcurrent condition for the transmitter at pin cq.
11/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 v t x e n v v d d _ i o t 0 v v t x d v v d d _ i o t 0 v v c/q v l + t 0 v v r x d v v d d _ i o t 0 v d ri ve r st a g e t ri st a t e , d e p e n d s o n e xt e rn a l si g n a l o n c/q d ri ve r st a g e t ri st a t e , d e p e n d s o n e xt e rn a l si g n a l o n c/q d e p e n d s o n e xt e rn a l si g n a l o n c/q d e p e n d s o n e xt e rn a l si g n a l o n c/q figure 3: transmitter polarity
e981.10 12/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 5.3.2 t ransmitter loads loads may be resistive or capacitive. if the load is inductive, the voltage at pin c/q must be limited by properly di - mensioned external clamping diodes. the overload turn off time toff_ol_xx depends on the supply voltage level vddh. thus overload protection and lamp drive current cover a wide supply current range. the on time after detecting an overcurrent depends on the assumption of a potential wake up condition (rxd changes state without changes in the control signals) or the assumption of a normal overload case (overload im - mediately detected after turn on). inductive overloads may simulate a wake up condition and cause the driver to turn off for the current txen=low phase. 5.3.1 t ransmitter overload the transmitter is disabled in case of overcurrent, overtemperature or improper supply conditions and switched on after a time constant after the error condition has disappeared. the overcurrent information can be read from pin ilim during the driver shutoff period. the off time after detecting an overcurrent or overtemperature is pro - portional to the supply voltage at pin vddh. the overcurrent threshold of the low side and high side drivers can be selected with the pin silim. the default level of silim is low. an high level at this pin divides the overcurrent threshold by 2. figure 4: transmitter characteristics v ( c / q ) v d d h t d f t d r 0 v t 0 . 2 * v d d h 0 . 8 * v d d h
13/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 5.4 r eceiver 5.5 wake-up the receiver reads logic information from the c/q pin and proceeds it to the control unit. the data bits are fltered in order to suppress erroneous glitches on the c/q pin and to increase emc robustness. the receiver functionality will not be available in the whole ic supply range due to absolute thresholds. if the transceiver supply voltage falls below 18v, the system may not be able to guarantee suffcient high levels on the c/q pin and the receiver will out - put a constant low level on pin rxd. in case of an active transmitter the receiver monitors pin c/q in order to detect wake up events. if the in - formation read from the c/q pin changes state, while txd remains constant, a wake up event is as - sumed. alternatively the change to an overcurrent state is evaluated in the same way. the transmitter re - mains on despite having detected an overload. after twu the wake up event is signalled at pin wake and the transmitter is turned off. it can be reset with a txen=low and activated again with a new txen=high. the fgure below shows the functionality of the overcurrent and wake up recognition as well as the resulting be - havior at the pin ilim and wake up in detail.
e981.10 14/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 s t a r t - e d g e t x e n l o w t o h i g h o r - e d g e a t t x d a n d t x e n = h i g h a n d - n o w a k e u p e v e n t - n o r e c o g n i t i o n o f o v e r c u r r e n t e v e n t f o r 2 0 u s ( m a s k o v e r c u r r e n t e v e n t s ) - d i s a b l e c u r r e n t l i m i t a t i o n r e c o g n i t i o n o f o v e r c u r r e n t o v e r c u r r e n t i n c / q d r i v e r ? - o v e r c u r r e n t i n l s o r h s d r i v e r o r - b u s l e v e l d o e s n o t f i t t o t x d e n a b l e c u r r e n t l i m i t a t i o n w a i t i n g 1 0 s o v e r c u r r e n t s t a t e - p i n i l i m = h i g h - c / q d r i v e r s h u t o f f ( h i g h z ) w a i t i n g i n o f f - s t a t e - w a i t i n g 5 0 s t o 8 0 0 s ( d e p e n d s f r o m v o l t a g e l e v e l v d d h ) - p i n i l i m = l o w - c / q d r i v e r o n l o o p u n t i l c o n d i t i o n 1 : - e d g e a t t x d c o n d i t i o n 2 : - o v e r c u r r e n t i n l s o r h s d r i v e r o r - b u s l e v e l d o e s n o t f i t t o t x d e n a b l e c u r r e n t l i m i t a t i o n o v e r c u r r e n t d e b o u n c e 4 0 s w a k e u p s t a t e - p i n i l i m = h i g h - p i n w a k e = h i g h - c / q d r i v e r s h u t o f f ( h i g h z ) l o o p u n t i l t x e n = l o w w a k e u p - a n d i l i m - f u n c t i o n a l i t y f l o w ch a r t o n l y va l i d f o r t x e n = h i g h t x e n = l o w : r e se t o f t h e d i g i t a l p a r t n o y e s c o n d t i o n 1 : e d g e a t t x d c o n d t i o n 2 : o v e r c u r r e n t e v e n t n o o v e r c u r r e n t c o n d i t i o n o v e r c u r r e n t c o n d i t i o n figure 5: overcurrent and wake up functionality
15/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 5.6 t emperature monitor 6 package dimensions and r atings the temperature monitor shuts the transmitter off in case of excessive junction temperature which can occur with a too high ambient temperature and/or the dissipation of too much power within the ic. package type: qfn 4x4, 0.5mm pitch, 20 pins the package dimensions and ratings refer to jedec mo220 vggd-5.
e981.10 16/19 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 c ontents 1 pinout ....................................................................................................................................................................................................... 2 1.1 pin description ................................................................................................................................................................................... .. 2 1.2 package pinout qfn20l4 ............................................................................................................................................................... .. 3 2 block diagram ........................................................................................................................................................................................ .. 3 3 operating conditions .......................................................................................................................................................................... .. 4 3.1 absolute maximum ratings .......................................................................................................................................................... .. 4 3.2 recommended operating conditions ........................................................................................................................................ .. 4 4 detailed electrical specifcation ...................................................................................................................................................... .. 5 4.1 power supply ...................................................................................................................................................................................... .. 5 4.1.1 vddh ................................................................................................................................................................................................. .. 5 4.1.1.1 dc characteristics ..................................................................................................................................................................... .. 5 4.1.2 vdd_io ............................................................................................................................................................................................. .. 5 4.1.2.1 dc characteristics ..................................................................................................................................................................... .. 5 4.1.3 vdd / vrego .................................................................................................................................................................................. .. 5 4.1.3.1 dc characteristics ...................................................................................................................................................................... .. 5 4.1.3.2 ac characteristics ...................................................................................................................................................................... .. 5 4.2 host interface .................................................................................................................................................................................... .. 6 4.2.1 dc characteristics ......................................................................................................................................................................... .. 6 4.3 transmitter ......................................................................................................................................................................................... .. 6 4.3.1 dc characteristics ......................................................................................................................................................................... .. 6 4.3.2 ac characteristics ......................................................................................................................................................................... .. 7 4.4 receiver ................................................................................................................................................................................................ .. 7 4.4.1 dc characteristics ......................................................................................................................................................................... .. 7 4.4.2 ac characteristics ......................................................................................................................................................................... .. 8 4.5 wake-up ............................................................................................................................................................................................... .. 8 4.5.1 dc characteristics ......................................................................................................................................................................... .. 8 4.5.2 ac characteristics ......................................................................................................................................................................... .. 8 4.6 temperature monitor ...................................................................................................................................................................... .. 8 4.6.1 dc characteristics ......................................................................................................................................................................... .. 8 5 functional description ....................................................................................................................................................................... .. 9 5.1 power supply ...................................................................................................................................................................................... .. 9 5.1.1 vddh ................................................................................................................................................................................................. .. 9 5.1.2 vdd_io ............................................................................................................................................................................................ .. 9 5.1.3 vdd ................................................................................................................................................................................................... .. 9 5.1.4 power up sequences .................................................................................................................................................................... .. 9 5.2 host interface .................................................................................................................................................................................... 1 0 5.3 transmitter .......................................................................................................................................................................................... 1 0 5.3.1 transmitter overload .................................................................................................................................................................... 1 2 5.3.2 transmitter loads ........................................................................................................................................................................... 1 2 5.4 receiver ................................................................................................................................................................................................ 1 3 5.5 wake-up ............................................................................................................................................................................................... 1 3 5.6 temperature monitor ...................................................................................................................................................................... 1 5 6 package dimensions and ratings .................................................................................................................................................... 1 5
17/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 l ist of figures figure 1: package pinout top view ...................................................................................................................................................... .. 3 figure 2: block diagram ......................................................................................................................................................................... .. 3 figure 3: transmitter polarity .............................................................................................................................................................. 1 1 figure 4: transmitter characteristics ................................................................................................................................................. 1 2 figure 5: overcurrent and wake up functionality ......................................................................................................................... 1 4
18/19 e981.10 elmos semiconductor ag data sheet qm-no.: 25ds0007e.02 2010-06-16 warning C life support applications policy elmos semiconductor ag is continually working to improve the quality and reliability of its products. neverthe - less, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vul - nerability to physical stress. it is the responsibility of the buyer, when utilizing elmos semiconductor ag products, to observe standards of safety, and to avoid situations in which malfunction or failure of an elmos semiconduc - tor ag product could cause loss of human life, body injury or damage to property. in development your designs, please ensure that elmos semiconductor ag products are used within specifed operating ranges as set forth in the most recent product specifcations. general disclaimer information furnished by elmos semiconductor ag is believed to be accurate and reliable. however, no responsi - bility is assumed by elmos semiconductor ag for its use, nor for any infringements of patents or other rights of third parties, which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of elmos semiconductor ag. elmos semiconductor ag reserves the right to make changes to this document or the products contained therein without prior notice, to improve performance, reliability, or manufacturability. application disclaimer circuit diagrams may contain components not manufactured by elmos semiconductor ag, which are included as means of illustrating typical applications. consequently, complete information suffcient for construction purpos - es is not necessarily given. the information in the application examples has been carefully checked and is believed to be entirely reliable. however, no responsibility is assumed for inaccuracies. furthermore, such information does not convey to the purchaser of the semiconductor devices described any license under the patent rights of elmos semiconductor ag or others. copyright ? 2010 elmos semiconductor ag eproduction in prt or hoe ithout the prior ritten conent o elmos semiconductor ag i prohiited
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