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1. general description the 74cbtlv3245 is an 8-pole, single-throw bus switch. the device features a single output enable input (oe ) that controls eight switch chan nels. the switches are disabled when oe is high. schmitt-trigger action at contro l inputs makes the circuit tolerant of slower input rise and fall times. this devic e is fully specified for partial power-down applications using i off . the i off circuitry disables the output, preventing the damaging backflow current through the de vice when it is powered down. 2. features and benefits ? supply voltage range from 2.3 v to 3.6 v ? high noise immunity ? complies with jedec standard: ? jesd8-5 (2.3 v to 2.7 v) ? jesd8-b/jesd36 (2.7 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? cdm aec-q100-011 revision b exceeds 1000 v ? 5 ? switch connection between two ports ? rail to rail switching on data i/o ports ? cmos low power consumption ? latch-up performance exceeds 250 ma per jesd78b class i level a ? i off circuitry provides partial power-down mode operation ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 74cbtlv3245 8-bit bus switch with output enable rev. 2 ? 15 december 2011 product data sheet
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 2 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 3. ordering information [1] also known as qsop20 package 4. functional diagram table 1. ordering information type number package temperature range name description version 74cbtlv3245ds ? 40 ? c to +125 ? c ssop20 [1] plastic shrink small outline package; 20 leads; body width 3.9 mm; lead pitch 0.635 mm sot724-1 74cbtlv3245pw ? 40 ? c to +125 ? c tssop20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 74CBTLV3245BQ ? 40 ? c to +125 ? c dhvqfn20 plastic dual-in-line co mpatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 ? 4.5 ? 0.85 mm sot764-1 fig 1. logic symbol 001aan323 2 19 18 b1 a1 oe 3 17 b2 a2 4 16 b3 a3 5 15 b4 a4 6 14 b5 a5 7 13 b6 a6 8 12 b7 a7 9 11 b8 a8 fig 2. logic diagram (one switch) 001aan324 oe na nb
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 3 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 5. pinning information 5.1 pinning fig 3. pin configuration for tssop20 (sot360-1) f ig 4. pin configuration for ssop20 (sot724-1) 74cbtlv3245 n.c. v cc a1 oe a2 b1 a3 b2 a4 b3 a5 b4 a6 b5 a7 b6 a8 b7 gnd b8 001aan325 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 74cbtlv3245 n.c. v cc a1 oe a2 b1 a3 b2 a4 b3 a5 b4 a6 b5 a7 b6 a8 b7 gnd b8 001aan326 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 (1) this is not a supply pin. the substrat e is attached to this pad us ing conductive die attach mate rial. there is no electrical or mechanical requirement to solder this pad. however, if it is soldered, the solder land should remain floating or be connected t o gnd. fig 5. pin configuration for dhvqfn20 (sot764-1) 001aan327 74cbtlv3245 transparent top view b7 a7 a8 b6 a6 b5 a5 b4 a4 b3 a3 b2 a2 b1 a1 gnd (1) oe gnd b8 n.c. v cc 9 12 8 13 7 14 6 15 5 16 4 17 3 18 2 19 10 11 1 20 terminal 1 index area
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 4 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 5.2 pin description 6. functional description [1] h = high voltage level; l = low voltage level; z = high-impedance off-state. 7. limiting values [1] the minimum input and output voltage ratings may be exceed ed if the input and output current ratings are observed. [2] for ssop20 and tssop20 packages: above 60 ? c the value of p tot derates linearly at 5.5 mw/k. for dhvqfn20 packages: above 60 ? c the value of p tot derates linearly at 4.5 mw/k. table 2. pin description symbol pin description nc 1 not connected a1 to a8 2, 3, 4, 5, 6, 7, 8, 9 data input/output (a port) gnd 10 ground (0 v) b1 to b8 18, 17, 16, 15, 14, 13, 12, 11 data input/output (b port) oe 19 output enable input (active low) v cc 20 positive supply voltage table 3. function selection [1] input input/output oe an, bn lan = bn hz table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v v i input voltage [1] ? 0.5 +4.6 v v sw switch voltage enable and disable mode [1] ? 0.5 v cc + 0.5 v i ik input clamping current v i < ? 0.5 v ? 50 - ma i sk switch clamping current v i < ? 0.5 v ? 50 - ma i sw switch current v sw = 0 v to v cc - ? 128 ma i cc supply current - +100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? cto+125? c [2] - 500 mw
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 5 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 8. recommended operating conditions [1] applies to control signal levels. 9. static characteristics [1] all typical values are measured at t amb =25 ? c. [2] one input at 3 v, other inputs at v cc or gnd. table 5. recommended operating conditions symbol parameter conditions min max unit v cc supply voltage 2.3 3.6 v v i input voltage 0 3.6 v v sw switch voltage enable and disable mode 0 v cc v t amb ambient temperature ? 40 +125 ?c ? t/ ? v input transition rise and fall rate v cc = 2.3 v to 3.6 v [1] - 200 ns/v table 6. static characteristics at recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max v ih high-level input voltage v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 3.0 v to 3.6 v 2.0 - - 2.0 - v v il low-level input voltage v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 3.0 v to 3.6 v - - 0.9 - 0.9 v i i input leakage current pin oe ; v i = gnd to v cc ; v cc =3.6v -- ? 1- ? 20 ? a i s(off) off-state leakage current v cc = 3.6 v; see figure 6 -- ? 1- ? 20 ? a i s(on) on-state leakage current v cc = 3.6 v; see figure 7 -- ? 1- ? 20 ? a i off power-off leakage current v i or v o = 0 v to 3.6 v; v cc =0v -- ? 10 - ? 50 ? a i cc supply current v i = gnd or v cc ; i o = 0 a; v sw =gndorv cc ; v cc =3.6v --10 - 50 ? a ? i cc additional supply current pin oe ; v i =v cc ? 0.6 v; v sw =gndorv cc ; v cc =3.6v [2] - - 300 - 2000 ? a c i input capacitance pin oe ; v cc = 3.3 v; v i =0vto3.3 v -0.9- - -pf c s(off) off-state capacitance v cc = 3.3 v; v i =0vto3.3 v - 5.2 - - - pf c s(on) on-state capacitance v cc = 3.3 v; v i = 0 v to 3.3 v - 14.3 - - - pf
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 6 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 9.1 test circuits 9.2 on resistance [1] typical values are measured at t amb =25 ? c and nominal v cc . [2] measured by the voltage drop between the a and b terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (a or b) terminals. v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 6. test circuit for measuring off-state leakage current (one switch) fig 7. test circuit for measuring on-state leakage current (one switch) a a 001aan328 gnd oe bn v ih v i i s i s v o v cc an a 001aan329 gnd oe an v il v i i s v o v cc bn table 7. resistance r on at recommended operating conditions; voltages are refe renced to gnd (ground = 0 v); for test circuit see figure 8 . symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max r on on resistance v cc = 2.3 v to 2.7 v; see figure 9 to figure 11 [2] i sw =64ma; v i = 0 v - 4.2 8.0 - 15.0 ? i sw =24 ma; v i = 0 v - 4.2 8.0 - 15.0 ? i sw = 15 ma; v i = 1.7 v - 8.4 40 - 60.0 ? v cc = 3.0 v to 3.6 v; see figure 12 to figure 14 i sw =64ma; v i =0v - 4.0 7.0 - 11.0 ? i sw =24 ma; v i =0v - 4.0 7.0 - 11.0 ? i sw = 15 ma; v i = 2.4 v - 6.2 15 - 25.5 ?
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 7 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 9.3 on resistance test circuit and graphs r on =v sw / i sw .( 1 ) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 8. test circuit for measuring on resistance (one switch) fig 9. on resistance as a function of input voltage; v cc = 2.5 v; i sw = 15 ma 001aan330 gnd oe an v il v i v sw v cc bn v i sw v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aai109 7 5 9 11 r on () 3 (1) (3) (4) (2) (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 10. on resistance as a function of input voltage; v cc = 2.5 v; i sw = 24 ma fig 11. on resistance as a function of input voltage; v cc = 2.5 v; i sw = 64 ma v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aai110 7 5 9 11 r on () 3 (1) (3) (4) (2) v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aai111 7 5 9 11 r on () 3 (1) (3) (4) (2)
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 8 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 12. on resistance as a function of input voltage; v cc = 3.3 v; i sw = 15 ma fig 13. on resistance as a function of input voltage; v cc = 3.3 v; i sw = 24 ma v i (v) 04 3 12 001aai105 4 6 8 r on () 2 (1) (4) (2) (3) v i (v) 04 3 12 001aai106 4 6 8 r on () 2 (1) (4) (2) (3) (1) t amb = 125 ?c. (2) t amb = 85 ? c. (3) t amb = 25 ? c. (4) t amb = ?40 ? c. fig 14. on resistance as a function of input voltage; v cc = 3.3 v; i sw = 64 ma v i (v) 04 3 12 001aai107 4.5 3.5 5.5 6.5 7.5 r on () 2.5 (1) (4) (2) (3)
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 9 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 10. dynamic characteristics [1] all typical values are measured at t amb =25 ? c and at nominal v cc . [2] the propagation delay is the calculated rc time constant of the on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). [3] t pd is the same as t plh and t phl . [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t phz and t plz . 11. waveforms table 8. dynamic characteristics gnd = 0 v; for test circuit see figure 17 symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay an to bn or bn to an; see figure 15 [2] [3] v cc = 2.3 v to 2.7 v - - 0.13 - 0.20 ns v cc = 3.0 v to 3.6 v - - 0.20 - 0.31 ns t en enable time oe to an or bn; see figure 16 [4] v cc = 2.3 v to 2.7 v 1.0 3.4 5.5 1.0 8.0 ns v cc = 3.0 v to 3.6 v 1.0 3.0 4.9 1.0 7.0 ns t dis disable time oe to an or bn; see figure 16 [5] v cc = 2.3 v to 2.7 v 1.0 3.0 5.5 1.0 8.0 ns v cc = 3.0 v to 3.6 v 1.0 3.4 5.8 1.0 8.5 ns measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 15. the data input (an, bn) to output (bn, an) propagation delay times 001aai367 v m v m v m v m v i input 0 v v oh output v ol t phl t plh table 9. measurement points supply voltage input output v cc v m v i t r = t f v m v x v y 2.3 v to 2.7 v 0.5v cc v cc ? 2.0 ns 0.5v cc v ol +0.15v v oh ? 0.15 v 3.0 v to 3.6 v 0.5v cc v cc ? 2.0 ns 0.5v cc v ol +0.3v v oh ? 0.3 v
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 10 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable measurement points are given in table 9 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 16. enable and disable times 001aan331 gnd gnd v cc v ol v oh v i v m v m v m v y v x t plz t pzl t phz t pzh switch disabled switch enabled switch enabled v m output low to off off to low output high to off off to high oe input
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 11 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable test data is given in table 10 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 17. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 10. test data supply voltage load v ext v cc c l r l t plh , t phl t pzh , t phz t pzl , t plz 2.3 v to 2.7 v 30 pf 500 ? open gnd 2v cc 3.0 v to 3.6 v 50 pf 500 ? open gnd 2v cc
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 12 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 12. package outline fig 18. package outline sot724-1 (ssop20) unit a 1 a 2 a 3 h e l p b p cd (1) e (1) z (1) el y wv references outline version european projection issue date iec jedec jeita mm 0.25 0.10 1.55 1.40 0.25 0.31 0.20 0.25 0.18 8.8 8.6 4.0 3.8 0.635 1 6.2 5.8 0.89 0.41 1.67 1.28 8 0 o o 0.18 0.25 0.1 dimensions (millimetre dimensions are derived from the original inch dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. sot724-1 01-07-04 03-02-18 w m b p d h e e z e c v m a x a y 1 10 20 11 a a 1 a 2 l p detail x l (a 3 ) mo-137 0 2.5 5 mm scale ssop20: plastic shrink small outline package; 20 leads; body width 3.9 mm; lead pitch 0.635 mm sot724-1 a max. 1.73 1/2 e
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 13 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable fig 19. package outline sot360-1 (tssop20) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot360-1 mo-153 99-12-27 03-02-19 w m b p d z e 0.25 11 0 20 11 pin 1 index a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 a max. 1.1
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 14 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable fig 20. package outline sot764-1 (dhvqfn20) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 4.6 4.4 d h 3.15 2.85 y 1 2.6 2.4 1.15 0.85 e 1 3.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot764-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot764-1 dhvqfn20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 29 19 12 11 10 1 20 x d e c b a terminal 1 index area ac c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 15 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 13. abbreviations 14. revision history table 11. abbreviations acronym description cdm charged device model cmos complementary metal-oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model table 12. revision history document id release date data sheet status change notice supersedes 74cbtlv3245 v.2 20111215 product data sheet - 74cbtlv3245 v.1 modifications: ? legal pages updated. 74cbtlv3245 v.1 20101230 product data sheet - -
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 16 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. 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stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from competent authorities. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74cbtlv3245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 2 ? 15 december 2011 17 of 18 nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74cbtlv3245 8-bit bus switch with output enable ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 15 december 2011 document identifier: 74cbtlv3245 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 recommended operating conditions. . . . . . . . 5 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 9.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.3 on resistance test circuit and graphs. . . . . . . . 7 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 16 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 16 contact information. . . . . . . . . . . . . . . . . . . . . 17 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

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