FQT1N80tf_ws n-channel mosfet ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c1 www.fairchildsemi.com 1 FQT1N80tf_ws d g s sot-223 g d s mosfet maximum ratings t c =25 o cunlessotherwisenoted* thermal characteristics symbol parameter FQT1N80tf_ws unit v dss draintosourcevoltage 800 v v gss gatetosourcevoltage 30 v i d draincurrent continuous(t c =25 o c) 0.2 a continuous(t c =100 o c) 0.12 i dm draincurrent pulsed(note1) 0.8 a e as singlepulsedavalancheenergy(note2) 90 mj i ar avalanchecurrent(note1) 0.2 a e ar repetitiveavalancheenergy(note1) 0.2 mj dv/dt peakdioderecoverydv/dt(note3) 4.0 v/ns p d powerdissipation (t c =25 o c) 2.1 w derateabove25 o c 0.02 w/ o c t j ,t stg operatingandstoragetemperaturerange 55to+150 o c t l maximumleadtemperatureforsolderingpurpose, 1/8fromcasefor5seconds 300 o c symbol parameter min. max. unit r ja thermalresistance,junctiontoambient* 60 o c/w *whenmountedontheminimumpadsizerecommended(pcbmount) march 2013 features this n-channel enhancement mode power mosfet is produced using fairchild semiconductor ? s proprietary planar stripe and dmos technology. this advanced mosfet technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. these devices are suitable for switched mode power supplies, active power factor correction (pfc), and electronic lamp ballasts. ? 0.2 a, 800 v, r ds(on) =15.5 ?( 7 \ s.)@v gs =10 v, i d =0.1 a ? low gate charge (typ. 5.5 nc) ? low c rss (typ. 2.7 pf) ? 100% avalanche tested n-channel qf e t ? mosfet 800v, 0.2 a, 20 ? description ? rohs compliant
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 2 package marking and ordering information t c =25 o cunlessotherwisenoted electrical characteristics off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics device marking device package reel size tape width quantity FQT1N80 FQT1N80tf_ws sot223 330mm 12mm 4000 symbol parameter test conditions min. typ. max. unit bv dss draintosourcebreakdownvoltage i d =250 a,v gs =0v,t j =25 o c 800 v bv dss / t j breakdownvoltagetemperature coefficient i d =250 a,referencedto25 o c 0.8 v/ o c i dss zerogatevoltagedraincurrent v ds =800v,v gs =0v 25 a v ds =640v,t c =125 o c 250 i gss gatetobodyleakagecurrent v gs =30v,v ds =0v 100 na v gs(th) gatethresholdvoltage v gs =v ds ,i d =250 a 3.0 5.0 v r ds(on) staticdraintosourceonresistance v gs =10v,i d =0.1a 15.5 20 g fs forwardtransconductance v ds =40v,i d =0.1a (note4) 0.75 s c iss inputcapacitance v ds =25v,v gs =0v f=1mhz 150 195 pf c oss outputcapacitance 20 30 pf c rss reversetransfercapacitance 2.7 5.0 pf q g totalgatechargeat10v v ds =640v,i d =1a v gs =10v (note4,5) 5.5 7.2 nc q gs gatetosourcegatecharge 1.1 nc q gd gatetodrainmillercharge 3.3 nc t d(on) turnondelaytime v dd =400v,i d =1a r g =25 (note4,5) 10 30 ns t r turnonrisetime 25 60 ns t d(off) turnoffdelaytime 15 40 ns t f turnofffalltime 25 60 ns i s maximumcontinuousdraintosourcediodeforwardcurrent 0.2 a i sm maximumpulseddraintosourcediodeforwardcurrent 0.8 a v sd draintosourcediodeforwardvoltage v gs =0v,i sd =0.2a 1.4 v t rr reverserecoverytime v gs =0v,i sd =1a di f /dt=100a/ s (note4) 300 ns q rr reverserecoverycharge 0.6 c notes: 1.repetitiverating:pulsewidthlimitedbymaximumjunctiontemperature 2.l=170mh,i as =1a,v dd =50v,r g =25 ,startingt j =25 c 3.i sd 1a,di/dt 200a/ s,v dd bv dss ,startingt j =25 c 4.pulsetest:pulsewidth 300 s,dutycycle 2% 5.essentiallyindependentofoperatingtemperaturetypicalcharacteristics ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate voltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 10 1 10 0 10 1 10 2 10 1 10 0 v gs top:15.0v 10.0v 8.0v 7.0v 6.5v 6.0v bottom:5.5v notes: 1.250spulsetest 2.t c =25 i d ,draincurrent[a] v ds ,drainsourcevoltage[v] 2 4 6 8 10 10 1 10 0 150 o c 25 o c 55 o c notes: 1.v ds =50v 2.250spulsetest i d ,draincurrent[a] v gs ,gatesourcevoltage[v] 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 20 30 40 50 v gs =20v v gs =10v note:t j =25 r ds(on) [ ], drainsourceonresistance i d ,draincurrent[a] 0.2 0.4 0.6 0.8 1.0 1.2 10 1 10 0 150 notes: 1.v gs =0v 2.250spulsetest 25 i dr ,reversedraincurrent[a] v sd ,sourcedrainvoltage[v] 10 1 10 0 10 1 0 50 100 150 200 250 c iss =c gs +c gd (c ds =shorted) c oss =c ds +c gd c rss =c gd notes: 1.v gs =0v 2.f=1mhz c rss c oss c iss capacitance[pf] v ds ,drainsourcevoltage[v] 0 1 2 3 4 5 6 0 2 4 6 8 10 12 v ds =400v v ds =160v v ds =640v note:i d =1.0a v gs ,gatesourcevoltage[v] q g ,totalgatecharge[nc] ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 11. transient thermal response curve 100 50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 notes: 1.v gs =0v 2.i d =250a bv dss ,(normalized) drainsourcebreakdownvoltage t j ,junctiontemperature[ o c] 100 50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 notes: 1.v gs =10v 2.i d =0.1a r ds(on) ,(normalized) drainsourceonresistance t j ,junctiontemperature[ o c] 25 50 75 100 125 150 0.00 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 i d ,draincurrent[a] t c ,casetemperature[ c] 10 0 10 1 10 2 10 3 10 3 10 2 10 1 10 0 100ms 1ms 1s dc 10ms 100 s operationinthisarea islimitedbyr ds(on) notes: 1.t c =25 o c 2.t j =150 o c 3.singlepulse i d ,draincurrent[a] v ds ,drainsourcevoltage[v] 1 0 5 1 0 4 1 0 3 1 0 2 1 0 1 1 0 0 1 0 1 1 0 2 1 0 3 1 0 1 1 0 0 1 0 1 1 0 2 n o te s : 1 .z j c ( t) = 6 0 /w m a x . 2 .d u ty f a c to r ,d = t 1 /t 2 3 .t j m t c = p d m * z j c ( t) s in g le p u ls e d = 0 . 5 0 . 0 2 0 .2 0 .0 5 0 .1 0 .0 1 z jc (t),thermalresponse t 1 , s q u a r e w a v e p u ls e d u r a tio n [ s e c ] t 1 p dm t 2 ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 5 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 6 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g sametype asdut v gs ? dv/dt controlledbyr g ? i sd controlledbypulseperiod v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd bodydiode forwardvoltagedrop v sd i fm ,bodydiodeforwardcurrent bodydiodereversecurrent i rm bodydioderecovery dv/dt di/dt d= gatepulsewidth gatepulseperiod dut v ds + _ driver r g sametype asdut v gs ? dv/dt controlledbyr g ? i sd controlledbypulseperiod v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd bodydiode forwardvoltagedrop v sd i fm ,bodydiodeforwardcurrent bodydiodereversecurrent i rm bodydioderecovery dv/dt di/dt d= gatepulsewidth gatepulseperiod d= gatepulsewidth gatepulseperiod ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 7 mechanical dimensions 3.00 0.10 7.00 0.30 0.65 0.20 0.08max 3.50 0.20 1.60 0.20 (0.46) (0.89) (0.60) (0.60) 1.75 0.20 0.70 0.10 4.60 0.25 6.50 0.20 (0.95) (0.95) 2.30 typ 0.25 max1.80 0 ~10
+0.10
C0.05 0.06 +0.04
C0.02 sot223 ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1
FQT1N80tf_ws n-channel mosfet www.fairchildsemi.com 8 ?2011fairchildsemiconductorcorporation FQT1N80tf_wsrev.c 1 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. * trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life su pport, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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