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november 2011 doc id 2078 rev 2 1/15 AN420 application note expanding a/d resolution of the st6 a/d converter 1 introduction occasionally the analog signal provided by ex ternal sensors require an analog to digital conversion with a resolution of greater than 8 bits. in order to extract the full information for subsequent data processing within the microcontroller a higher resolution analog to digital is thus required. the solution described in this note enables this higher resolution with the on-chip 8-bit a/d converter of the st62, using only an additional operational amplifier (opamp) and a few resistors www.st.com
contents AN420 2/15 doc id 2078 rev 2 contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 principle of operation of an al gebraic adder . . . . . . . . . . . . . . . . . . . . . 5 4 example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AN420 list of figures doc id 2078 rev 2 3/15 list of figures figure 1. example circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 2. generic algebraic adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. conversion routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. example circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
overview AN420 4/15 doc id 2078 rev 2 2 overview the technique implemented is that of the algeb raic adder, a full discussion of the principle of operation is included in this note. a practical example of the external components used is shown in the following figure: figure 1. example circuit the resistances are selected by the st62 i/o pins depending on the analog input voltage. the selection programmed modifies the output voltage of the opamp in such a way that the following a/d conversion is always made with the maximum input range of the converter. this selection is made by software, therefore the total conversion time is increased versus a normal 8-bit conversion, however the precision is increased and the input voltage range can be enlarged. pc4 pc5 pc6 st6215 pb0 (a/d input) vin outputs -36
AN420 principle of operation of an algebraic adder doc id 2078 rev 2 5/15 3 principle of operation of an algebraic adder figure 2 represents the generic algebraic adder. figure 2. generic algebraic adder the circuit generates an output voltage equal to: i to minimize the effects of the input polarizing currents, the total resistances seen from the two inputs of the opamp should be the same. therefore: the two resistances rp0 and rn0 are needed to satisfy the above relation. in general, only one of them will be needed. (1) (2) vnn rnn rr rn2 vn2 vn1 rn1 rn0 vn vo + - vp rp1 rp2 vp2 vp1 vpm rpm rp0 -36 v 0 k i i1 = m v p i k i i1 = n v n j ? = 1 r r ----- - 1 r n 0 --------- 1 r n j -------- j1 = n ++ 1 r p 0 -------- - 1 r p i ------- - i1 = m + 1 r t ------ - ==
principle of operation of an algebraic adder AN420 6/15 doc id 2078 rev 2 to analyze the circuit, let us calculate the input voltages: relation (2) becomes: from 3, 4 and 5 we get: relation (6) is the relevant form ula to be used. it also explains the name given to this circuit, since the output voltage is the 'algebraic sum' of the input voltages. to design the actual circuit, you chose one value of rr (arbitrarily). the other resistances are then determined by the desired coefficients: where (3) (4) (5) (6) (7) v p g p i v p i i1 = m g p 0 g p i i1 = m + ------------------- --------------- = g x 1 r x ------ = v n v 0 g r g n j j1 = n + g n 0 --------------- ----------------- ------------- - = g n 0 g r g n j j1 = n ++ g p 0 g p j j1 = m + g t == v 0 v n j j1 = n ? r r r n j -------- v p i i1 = m r r r p i ------- - + = k i r r r p i ------- - = k j r r r n j -------- =
AN420 principle of operation of an algebraic adder doc id 2078 rev 2 7/15 finally, the values for r n0 and r p0 are chosen, based on (2).
example AN420 8/15 doc id 2078 rev 2 4 example let us assume we have a voltage swing of 10 volts (0 to 10) that we want to convert with a 10-bit resolution. and let us assume we have a set of voltage sources vnj that we can switch between 0 to 5 volts under software control, and each one independently from the other. let us also assume we can 'cut' the 10 volt swing in 4 'pieces' of 2.5 volts each, and that every 'piece' can be converted with 8-bit resolu tion. the overall resolu tion will therefore be: 2 8 (st6 a/d resolution) * 2 2 (# of 'pieces') = 2 10 let us call v in the actual value of the source to be converted. for instance, if v in [10, 7,5] volts, we could supply the st6 a/d with the voltage: (v in -7.5volt)x2 => [0,5]volt or, for (10,7.5) volts: (v in -1.5xv n1 )x2 = 2xv in -3xv n1 where v n1 is one of the v n j sources, either 0 or 5 volts. in similar fashion, for the other intervals, we could obtain: (7.5, 5) volts (v in -v n2 )x2 = 2xv in -2xv n2 (5, 2.5) volts (v in -0.5xv n3 )x2 = 2xv in -v n3 (2.5, 0) volts (v in -0xv n4 )x2 = 2xv in so, relation (6) becomes: v 0 = 2xv in -3xv n1 -2xv n2 -v n3 where v in =v p1 the software driving the conversion will therefore verify if, given a certain status of the v nj voltages, the conversion is far from being satu rated. if so, another tr y will be performed with a different status of the v nj voltages. figure 3 gives the flow chart of such software.
AN420 example doc id 2078 rev 2 9/15 figure 3. conversion routine the actual circuit values are calculated as follo ws. with arbitrarily chosen rr equal to 10 k , the other resistor values are given by: vn1 = vn2 = vn3 = 0 convert saturated? no done vin => [0, 2.5] v convert vn3 = 1 yes saturated? no done vin => [2.5, 5] v convert yes saturated? no done vn3 = 0, vn2 = 1 vin => [5, 7.5] v yes convert vn2 = 0, vn1 = 1 done vin => [7.5, 10] v -36 r r r p1 --------- - 2r p1 ? 5000 == r r r n1 ---------- 3r n1 ? 3333 == r r r n2 ---------- 2r n2 ? 5000 ==
example AN420 10/15 doc id 2078 rev 2 to satisfy relation (2), we obtain the following values, as indicated in figure 4 . assuming r r r n3 ---------- 1r n3 ? 10 == 1 r r ----- - 1 r n0 ---------- 1 r n1 ---------- 1 r n2 ---------- 1 r n3 ---------- 1 r n0 ---------- 0.0007 ++++++ 1 r p0 --------- - 1 r p1 --------- - + 1 r p0 --------- - 0.0002 + = 1 r n0 ---------- 0.0007 + 1 r p0 --------- - 0.0002 + = r p0 ------- r n0 ? 2k ==
AN420 application example doc id 2078 rev 2 11/15 5 application example an example st62 software program follows on the next pages. it executes the program flow of figure 3 in the application circuit of figure 4 . figure 4. example circuit the st6215 pin allocation is arbitrary. the three outputs can drive other identical circuits, when more the one 10-bit a/d channel is needed. also, a different number of 'pieces' can be used to achieve a different resolution. ;*********************************************************************************** ;* file name: hires_ad.asm ;* ;* algebraic adder and st6 a/d converters - application note software ;* this software is an example on how to increase the st6 converter ;* resolution. please refer to the application note for further ;* explanations. ;* ;* allocation of pins: pc4, pc5 and pc6 are, respectively, voltage sources ;* vn1, vn2 and vn3. pb0 is an a/d input ;* ;*********************************************************************************** .input "6215_reg.asm" ;st6215 standard definitions file vn1 .equ 4 ;pc4 bit select vn2 .equ 5 ;pc5 bit select vn3 .equ 6 ;pc6 bit select drcs .def 0bfh,0ffh,0ffh ;shadow register for data register c pc4 3.3k 5k 10k 10k pc5 pc6 st6215 pb0 (a/d input) 2k 5k vin outputs -36
application example AN420 12/15 doc id 2078 rev 2 hres .def 0bdh,0ffh,0ffh ;ms 2 bits of conversion result, and ;conversion flag conv_f .equ 7;the msb of hres is the high resolution ;end of conversion flag c1 .equ 6 ;conversion step flags c2 .equ 5 c3 .equ 4 c4 .equ 3 ;using hres lres .def 0beh,0ffh,0ffh ;lsb of conversion result ;************************** n o t e *********************************************** ;register w is used to save the accumulator contents ;in standard interrupt routines ;******************************************************************************** .org 880h ;one module only. do not use this ;assembly directive if you organize ;your software in linkable modules init ldi drb,1 ldi orb,1 ;pb0 is analog input ldi ddrc,070h ;pc4..6 are open drain outputs ldi orc,070h ;pc4..6 are push-pull outputs now ldi drcs,0 ;assume pc7 is input with pull-up, ;no interrupt ldi ior,10h ;enable interrupts ldi hres,0 reti ;initialize interrupt machine conv ;this is an endless loop converting ;pb0 input with 10-bit resolution ;the first time here after reset, ;vn1=vn2=vn3=0 set conv_f,hres set c1,hres set 5,adcr ;start high resolution conversion jrs conv_f,hres,$ nop ;here the high resolution result is ;available in hres-lres jp conv adcint ld w,a ;save accumulator ld a,adr ;in accumulator conversion result jrs c1,hres,c1conv
AN420 application example doc id 2078 rev 2 13/15 jrs c2,hres,c2conv jrs c3,hres,c3conv c4conv ldi hres,3 ld lres,a ld a,drcs res vn1,a ld drcs,a ld drc,a ;vn1=vn2=vn3=0 jp convout c1conv pi a,0ffh jrnz c1c1 lr hres ld lres,a convout d a,w reti c1c1 ld a,drcs set vn3,a ld drcs,a ld drc,a ;vn1=vn2=0, vn3=1 set 5,adcr ;start conversion res c1,hres set c2,hres jp convout ;exit interrupt c2conv cpi a,0ffh jrnz c2c1 ldi hres,1 ld lres,a jp convout c2c1 ld a,drcs res vn3,a set vn2,a ld drcs,a ld drc,a ;vn1=vn3=0, vn2=1 set 5,adcr ;start conversion res c2,hres set c3,hres jp convout ;exit interrupt c3conv cpi a,0ffh jrnz c3c1
application example AN420 14/15 doc id 2078 rev 2 ldi hres,2 ld lres,a jp convout c3c1 ld a,drcs res vn2,a set vn1,a ld drcs,a ld drc,a ;vn2=vn3=0, vn1=1 set 5,adcr ;start conversion res c3,hres set c4,hres jp convout ;exit interrupt .org 0ff0h jp adcint ;a/d interrupt vector .org 0ffeh jp init ;reset vector .end
AN420 revision history doc id 2078 rev 2 15/15 6 revision history table 1. document revision history date revision changes 21-dec-1992 1 initial release. 02-nov-2011 2 updated format and company logo.
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