november 1998 f dr8308p dual p-channel, logic level, powertrench tm mosfet general description features absolute maximum ratings t a = 25 o c unless otherwise noted symbol parameter f dr8308p units v dss drain-source voltage -20 v v gss gate-source voltage 8 v i d drain t current - continuous (note 1) -3.2 a - pulsed -20 p d maximum power dissipation (note 1) 0.8 w t j ,t stg operating and storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1) 156 c/w r q jc thermal resistance, junction-to-case (note 1) 40 c/w FDR8308P rev.c -3.2 a, -2 0 v. r ds(on ) = 0.050 w @ v gs = -4.5 v, r ds(on ) = 0.070 w @ v gs = -2 .5 v. low gate charge (13nc typical). high performance t rench technology for extremely low r ds(on) . supersot tm -8 package: small footprint (40 % less than so-8); l ow profile(1mmthick); m aximum power compa rable to so-8. the supersot-8 family of p -channel logic level mosfets have been designed to provide a low profile, small footprint alternative to industry standard so-8 little foot type product. these p-channel logic level mosfets are produced using fairchild semiconductor 's advanced powertrench process that has been tailored to minimize the on-state resistance and yet maintain superior switching performance . these devices are well suited for portable electronic s applications: load switching and power management, battery charging circuits, and dc/dc conversion. sot-23 supersot t m -8 soic-1 6 so-8 sot-223 supersot t m -6 g1 d1 g2 s1 d2 d2 d1 s2 supersot -8 tm pi n 1 8308p 1 5 7 8 2 6 3 4 ? 1998 fairchild semiconductor corporation
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -20 v d bv dss / d t j breakdown voltage temp. coefficient i d = -50 a , referenced to 25 o c -16 mv / o c i dss zero gate voltage drain current v ds = -16 v, v gs = 0 v -1 a t j = 5 5c -10 a i gss gate - body leakage current v gs = 8 v, v ds = 0 v 100 na i gss gate - body leakage, reverse v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2) v gs (th) gate threshold voltage v ds = v gs , i d = -250 a -0.4 -0.9 -1.5 v d v gs(th) / d t j gate threshold voltage temp.coefficient i d = -50 a , referenced to 25 o c 2.5 mv / o c r ds(on) static drain-source on-resistance v gs = -4 .5 v, i d = -3.2 a 0.038 0.05 w t j = 12 5c 0.053 0.075 v gs = -2 .5 v, i d = -2.7 a 0.054 0.07 i d(on) on-state drain current v gs = -4.5 v, v ds = -5 v -20 a g fs forward transconductance v ds = -4.5 v, i d = -3.2 a 13 s dynamic characteristics c iss input capacitance v ds = -10 v, v gs = 0 v, f = 1.0 mhz 1240 pf c oss output capacitance 270 pf c rss reverse transfer capacitance 100 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = -5 v, i d = -1 a, 8 16 ns t r turn - on rise time v gs = -4.5 v, r gen = 6 w 15 27 ns t d(off) turn - off delay time 45 65 ns t f turn - off fall time 30 50 ns q g total gate charge v ds = -10 v, i d = -4 .5 a, 13 19 nc q gs gate-source charge v gs = -4.5 v 1.8 nc q gd gate-drain charge 3 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -0.67 a v sd drain-source diode forward voltage v gs = 0 v, i s = -0.67 a (note 2 ) -0.7 -1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. FDR8308P rev.c 156 o c/w on a 0.0025 i n 2 pad of 2oz copper.
FDR8308P rev.c 0 1 2 3 4 5 0 4 8 12 16 20 -v , drain-source voltage (v) - i , drain-source current (a) ds d -2.5v -2.0v -1.5v -3.0v v = -4.5v gs 0 5 10 15 20 0.5 1 1.5 2 2.5 - i , drain current (a) drain-source on-resistance v = -2.0 v gs d r , normalized ds(on) -2.5v -4.5v -3.0v -3.5v typical electrical characteristics figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) v = -4.5v gs i = -3.2a d figure 3. on-resistance variation with temperature . 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0 3 6 9 12 15 -v , gate to source voltage (v) - i , drain current (a) v = -5v ds gs d t =-55c j 125c 25c figure 5 . transfer characteristics. 1 2 3 4 5 0 0.05 0.1 0.15 0.2 - v , gate to source voltage (v) gs r , on-resistance (ohm) ds(on) 25c i = -1.6a d t = 125 c a o figure 4 . on-resistance variation with gate-t o -source voltage. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0.001 0.01 0.1 1 15 -v , body diode forward voltage (v) - i , reverse drain current (a) 25c -55c v = 0v gs sd s t = 125c j figure 6 . body diode forward voltage varia tion with source current and temperature.
FDR8308P rev.c typical electrical characteristics (continued) figure 9 . maximum safe operating area. 0 3 6 9 12 15 0 1 2 3 4 5 q , gate charge (nc) -v , gate-source voltage (v) g gs v = -5v ds -15v i = -3.2a d -10v figure 7 . gate charge characteristics . 0.1 0.2 0.5 1 2 5 10 20 30 0.01 0.05 0.5 5 30 - v , drain-source voltage (v) - i , drain current (a) rds(on) limit d dc ds 1s 100ms 10ms 1ms a v = -4.5v single pulse r = 156c/w t = 25c q ja gs a 100us figure 10 . single pulse maximum power dissipation. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance 1 single pulse 0.05 0.02 0.2 r(t), normalized effective d = 0.5 0.1 0.01 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = 156 c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 2 q ja a j p(pk) t 1 t 2 figure 11 . transient thermal response curve . thermal characterization performed using the conditions described in note 1 . transient thermal response will change depending on the circuit board design. 0.1 0.3 1 3 10 20 50 100 200 400 1000 2500 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0 v gs c oss c rss figure 8 . capacitance characteristics . 0.0001 0.001 0.01 0.1 1 10 100 300 0 10 20 30 40 50 single pulse time (sec) power (w) single pulse r = 156c/w t = 25c q ja a
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