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MT9J003: 1/2.3-inch 10mp cmos digital image sensor features apt i na conf i d ent i al and pr opr i et ar y pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . m t 9j 00 3- ds - r e v c 2/ 12 en 1 ? 2 0 0 9 a p tina i m a g i n g c o rp o ra t i o n a l l ri g h ts re se rv e d . 1/ 2. 3- i n c h 10m p cm o s di gi t a l i m age sens or m t 9j 003 dat a she e t f o r t h e la te st d a ta sh e e t , refe r to a p t i n a s w e b s i t e : w ww. a p t i n a . c o m fe atures ? 1080p digita l video mode ? s imple two-wir e serial interface ? a uto black lev e l ca libr ation ? s upport f o r exter n al mechanical shutter ? s upport f o r exter n al led or xenon f l a s h ? h igh fr ame r ate pr eview mode with arbitr ar y do wn- siz e s c aling fr om maximum r e s o lut i on ? p r o g r am mabl e co ntr o ls : g a i n , hor i z o ntal a n d v e rtical blanking, auto black lev e l of fset corr ect i on, fr a m e siz e /r ate , exp o sur e , left?rig ht and top?bot t om image r e ver s al, windo w siz e , and panning ? d ata int e rfaces : par allel or fo ur -lane ser i al high-s peed pixel interface (h is pi?) di f f e r en ti al s i g n a l in g (s u b - lv d s ) ? o n-die ph ase-loc k ed loop (pll) oscil l ator ? b ay er patter n do wnsiz e scaler ? i ntegr ated position-ba s ed color and lens shading co rr ec tion ? o ne-time pr ogr a mmable memor y ( o tpm) for storing module information a p p lic a t io n s ? d ig ital vid e o came r a s ? d ig ital stil l came r a s g e n e ra l d e s c r i p t io n the a p tina MT9J003 is a 1/2. 3-inch cmos active-pixel digi tal imagi n g sensor w i th an activ e pixel arr a y of 3856h x 2764v including bor d er pix e ls . i t can suppor t 10 megapixel (3664h x 2748v ) digi tal still images and a 1080p (3840h x 2160v ) digital video mode . i t incorpo- r ates s o phistica ted on-chip cam e r a f u n c t i o n s su ch a s wi ndo w i n g, mi rror in g, c o l u mn and r o w skip modes , and snapshot mode . i t is pr ogr a mmable thr o ugh a simple two-wir e ser i al inter f a c e and has v e r y lo w po w e r con- sump tion. or d e r i n g i n f o r m a t i o n t a bl e 1: a v ai labl e par t n u m b er s pa rt number de s c r i p t i o n m t 9j 003i 12st c v2 h i s p i 48 - p i n i l cc, 0 cra m t 9j 003t 12s tcv h i s pi 48 - p i n t p lcc, 1 3 . 4 cra m t 9j 003d00s tcv c 2cbc1 h i s pi bar e d i e , 0 c r a m t 9j 003i 12st cu p ar al l e l 48- p i n i l cc, 0 cra m t 9j 003d00s tcu c 2 c bc1 p ar al l e l bar e di e, 0 cra tabl e 2: key performance parameters p a rameter va l u e opt i c a l f o r m at 1/ 2. 3- i n c h ( 4 : 3 ) ac ti v e i m ager s i ze 6. 440m m ( h) x 4 . 616 m m ( v ) , 7. 923m m di agonal ( e nt i r e s e nsor ) 6. 119m m ( h) x 4. 589 m m ( v ) , 7. 649m m di agonal ( s t ill m o d e ) 6. 413m m ( h) x 3. 607 m m ( v ) , 7. 358m m diagonal (video mode) activ e pi xel s 38 56h x 276 4v ( e nt i r e se ns or ) 3 6 6 4 h x 2 7 4 8 v (4 :3 , s t ill m o d e ) 38 40h x 216 0v ( 16: 9, vi de o m o de) p i x e l si z e 1. 67 x 1 . 6 7 m chi e f r a y angl e 0 , 13 . 4 c o lo r f ilte r a r ra y r g b b a y e r p a tte r n s h u tte r t y p e e l e c tro n ic r o llin g sh u tte r (e r s ) w i t h g l ob al r e set r e l e ase ( g r r ) i n put c l ock fr equenc y 6 C48 m hz ma x i - mu m data ra te par a l l e l 8 0 m p / s at 80 m h z pi xcl k h i s p i ( 4 - l ane) 2. 8g bp s fr a m e ra te s t ill m o d e , 4 : 3 ( 3664 h x 2748v) prog r a m m a b l e u p t o 15 f ps seri al i/f , 7 . 5 f p s p a ra lle l i/ f pr evi e w m o de vga 30 f p s w i t h b i nni n g 60 f p s w i t h s k i p 2b i n2 1080 p m o de ( 1920 h x 1080v) 6 0 f p s u s in g h i s p i i/f 3 0 f p s u s in g p a ra lle l i/ f a d c re s o l u t io n 1 2 - b it, o n -d ie res p ons i vi t y 0. 31 v/ l u x - sec ( 5 5 0 nm ) d y n a m i c ra n g e 6 5. 2 d b sn r ma x 34 db s u ppl y vol t ag e i / o di gi t a l 1 . 7C1. 9v ( 1 . 8 v nom i nal ) or 2. 4C3. 1v ( 2 . 8 v nom i nal ) d i gi t a l 1 . 7C1. 9v ( 1 . 8 v nom i nal ) anal og 2. 4C3. 1v ( 2 . 8 v nom i nal ) sl vs i / o 0 . 4 - 0. 8 v ( 0 . 4 or 0. 8v nom i nal ) po w e r con- su m p - tio n s t ill m o d e a t 1 5 f p s w/ s e r i a l i / f 63 8m w s t ill m o d e a t 7 . 5 f p s w / p a ra lle l i/ f 38 8m w p r e v ie w 2 5 0 m w lo w p o w e r v g a st andby 5 0 0 w ( t y p i c al , extclk di sabl ed) p a c k a g e 4 8 - p in il c c (1 0 m m x 1 0 m m ) bar e di e, 48 pi n ti ny p l cc ( 12m m x 12 m m ) o p e r a t in g te m p era t u r e C 3 0 c to + 7 0 c (a t ju n c tio n ) http://
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 2 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or tab l e of cont ents apt i na conf i d ent i al and pr opr i et ar y tabl e of cont ent s features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 general descript i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 ordering in format ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 general descript i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 functional overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 pixel array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 opera t ing modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 signal descript i ons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 output data fo rmat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 serial pixel data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 high s p eed serial pixel int e rface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 hispi phy s ical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 dll t i min g adjust ment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 hispi st reamin g mode pro t ocol lay e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6 protocol fundamentals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 parallel pixel data int e rface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 output data timing (pa r allel pixel data interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 frame ra tes at co mmon resolution s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 tw o- wi re ser i al re gi st er i n te rf ace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 start condit ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 stop condit ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 sla v e address/data direction byt e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 message by te . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 ackn owledge bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 no-acknowledge bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ty pical sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 sin g le read from random locatio n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 sin g le read from current locat i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 sequentia l read, start fro m random location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 sequentia l read, start fro m current lo cat i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 sin g le wr ite to r a ndom locat i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 sequentia l wri t e, start at random loca tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 programming r e strictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 x address r e strictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 effect of scaler on legal range of output sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 8 output data timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 changing r e gisters wh ile strea m ing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 programming restrictions when us ing g l obal reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 control of the s i gnal interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 serial register interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 parallel pixel data int e rface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 output enable con t rol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 configuration of t h e pixel data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 system sta t es . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 power- on reset sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 soft reset sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 signal st ate during r e set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 general purpose inp u ts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 3 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or tab l e of cont ents apt i na conf i d ent i al and pr opr i et ar y streaming/st andby control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 trigger control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 programming t h e pll divisors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 clock control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 scaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 shading co rrect i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 the co rrect i on fun c tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 one- time programma b le memo ry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 sensor readout configurat ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 image acquisition m o des . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 window cont ro l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 pixel border . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 reado u t m o des . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 horizont al mirror . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 vertical flip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 frame ra te control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 absolut e minimum arra y lin e length pck . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 array readout line length pck . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 interface line length pck . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 minimum row time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 minimum fra m e t i me . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 fine int e gration t i me limit s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 fine correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 lo w power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 integra t ion time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 aptina g a in model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 flash cont rol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 global r e set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 o v ervi ew of g l ob al re se t se que n ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 entering an d leavin g the global reset seq u en ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 programmable settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 control of the electromecha nical shutt e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 using flash with glo b al r e set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 extern al control of integrat ion time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 retriggerin g the global reset seq u en ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 global r e set an d soft standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 sensor core digital dat a pat h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 test pat t erns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 hispi t e st patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 test cursors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 timing sp ecificatio ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 power- up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1 power- down sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 hard standby a n d hard reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 soft sta n dby and soft reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 soft sta n dby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 soft reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 spect r al charact e ristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 elect r ical charact e rist ics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 pack age dimensio ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 4 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or tab l e of cont ents apt i na conf i d ent i al and pr opr i et ar y revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 5 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or li st of f i g u re s apt i na conf i d ent i al and pr opr i et ar y li st of fi gures figure 1 : block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 fi gure 2 : pixe l color patte rn d e t ai l (to p r i ght corn er) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3: typical configuration: serial fo ur-la n e hispi int e rface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 4 : ty pical configurat ion: parallel pixel dat a int e rface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5 : hispi package pinout diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 figure 6 : 48- pin ilcc parallel pack age pinout diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7: hispi transmitter and receiver in terface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8 : timing dia g ram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 figure 9: block diagram of dll ti ming adjustmen t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 fi gure 1 0: d el ayi n g the c l o c k_ lane wi th re sp ect to dat a _lane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 f i g u re 11 : d e l ay ing d a t a _l ane wi th re spec t to t h e c l oc k_ lane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 fi gure 1 2: s te am ing vs . pack et ize d trans m is sion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 1 3 : s patial illustration of image readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 f i g ure 14: pi x el data tim i ng exampl e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 fi gure 1 5 : r ow ti mi ng and f v /l v si gnal s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9 fi gure 1 6: s in gl e rea d f r o m rand om l o c a ti on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 fi gure 1 7 : s in gl e rea d f r o m curre n t lo cat i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 fi gure 1 8 : s e q ue ntia l rea d , sta r t f r om rand om location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 1 9 : s equentia l read, sta r t from current lo cat i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 fi gure 2 0 : s in gl e wr ite to rand om l o cat i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 fi gure 2 1 : s e q ue ntia l wri t e, start at rand om loca tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 fi gure 2 2 : e ffe ct of li m i te r on the dat a pat h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 8 figure 2 3 : t iming of data path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 2 4: m t 9j00 3 s ystem stat es . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 figure 2 5 : c locking structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 2 6: s equence f o r programming the mt 9j0 03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 27: e ffect of horizontal mirror on readout order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 figure 28: e ffect of vertical flip on re adout order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 figure 2 9 : p ixel array readout without subs ampling and with 2x2 skipping . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 4 figure 30: c ombinations of pixel skipping in the mt9 j 003 sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 figure 3 1 : p ixel binning and summing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 f i g u re 32: p i x el skipping comb ined wi th summing or binnin g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 figure 3 3 : x en on flash enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 figure 3 4 : l ed flash enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1 fi gure 3 5 : l ed fl ash enab le d f o ll owing forc ed r e start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 figure 36: o verview of global reset sequen ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 figure 37: e ntering an d leavin g a g l obal re set sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 figure 3 8: c ontrolling the r e set an d integration phases o f th e gl o b al r e set sequence . . . . . . . . . . . . . . . . . . . . 53 figure 39: c ontrol of the electromecha nica l shutt e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 figure 4 0: c ontrolling the s h ut ter output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 fi gure 4 1: u si ng f l a s h w i th g l ob al re s e t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 figure 4 2 : g lobal r e set bulb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 f i g u re 43: e nteri n g soft standb y duri ng a glob al re set se que n ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 f i g u re 44: t est cursor be hav i or wi th image ori e ntati o n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 figure 4 5 : p ower- u p sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 figure 4 6 : p ower- d own sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 figure 4 7: h ard standby a n d hard reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 figure 4 8: s oft sta n dby and soft reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 figure 4 9: q uantum ef ficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 figure 50: t wo-wire serial bus timing para meters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 figure 5 1 : i /o timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 fi gure 5 2 : h ispi eye di ag ra m for b o th cloc k and d a ta si gnal s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 f i g u re 53: h i s pi ske w b e twee n data si gnals within the phy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 figure 5 4 : 48- pin ilcc package outline drawin g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 figure 55: 48-pin tplcc package outline draw ing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 6 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or li st of tab l es apt i na conf i d ent i al and pr opr i et ar y li st of t a bl es table 1: available part numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2: key performance paramet e rs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 3: signal descript i ons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 4: row timing wit h hispi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 table 5: row timing wit h parallel interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 tabl e 6: row tim i ng wi th parall el interfac e using low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 tab l e 7: re gi st er set t in gs fo r com m o n re s o lut i ons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 table 8: definit i ons for programmin g rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 8 table 9: output enable con t rol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 10: configuration of t h e pixel data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 11: reset _bar and pll in system st ates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 12: signal st ate during r e set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 13: streaming/s t andby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 14: trigger control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 15: subsampling co mbina t io ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 table 16: minimum row time and blank i ng numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 table 17: minimum fra m e t i me and blanking numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 table 18: fine_integratio n_time limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 table 19: fine_correction values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 table 20: recommended gain stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 table 21: test pat t ern s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 table 22: hispi t e st patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 table 23: power- up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1 table 24: power- down sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 25: cra ( 13.4 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 tabl e 26: dc el ectri c al de fi niti ons and char acteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 table 27: absolut e maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 table 28: parallel in terfa c e conf igured t o use low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 table 29: two- wire serial regist er interface electrical ch ara c teristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 tabl e 30: two-wir e se rial reg i s t e r interfac e ti ming speci f ic ati o n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 table 31: i/o paramet e rs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 0 table 32: i/o timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 0 table 33: hispi r i se and fall t i mes at 480 mhz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1 table 34: hispi r i se and fall t i mes at 360 mhz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1 table 35: channel, phy an d intra- phy skew . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 table 36: clock dll st ep s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 table 37: data dll st eps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 table 38: 48- pin tplcc pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 7 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or g e n e ra l d e sc ri p t i o n apt i na conf i d ent i al and pr opr i et ar y g e n e ra l d e s c r i p t io n the MT9J003 di gi tal i m age s e nsor featur e s a p t i na ? s br ea k t hr ou gh l o w-n o i s e cm os i m agi n g te chnology that ac hi ev e s ne ar -c cd image quality (based on signal-to-noise r a tio and lo w-li ght sens itivi t y) whil e maintain i n g the inher e nt s i z e , cost, and integr ation adv a ntages of cm os . wh en oper ated in its defa ult 4:3 still- mode , th e sensor gener a tes a full r e solutio n image at 15 fr ames per se cond (fps ) usi n g the h i sp i ser i al inter f ace . an on-ch i p analog-to- d i gi tal conv erter (a dc) ge ner a te s a 12-b i t v a l u e for e a ch pi xel. fun c t i onal o v er vi ew the MT9J003 is a pr og r e ssi v e -sc a n se nsor that gener a tes a str e am of pix el data at a co nstant fr ame r a te . i t uses an on -chip , p h as e - locked l oop (pll) to gene r ate all i n ternal clocks from a single master input clock r u n ning between 6 a nd 48 mhz. the m a ximum outp ut p i xe l r a te i s 80 mp/ s , corr es pond in g to a pi xe l c l ock r a t e of 80 mh z. a bl ock di agr a m of the sens or i s sho w n i n f i gur e 1. f i g u re 1 : b l o c k d i a g ra m the c o r e of the se nsor i s a 10mp activ e -pix el arr a y . t h e ti m i ng an d con trol ci r c uit r y se q u enc e s throug h th e r o ws of t h e arr a y , r e s e tti n g and then r e ad ing eac h r o w in turn. i n the tim e inter v al between r e sett ing a ro w an d r e ad ing that r o w , the pi xel s in the r o w inte- g r ate inc i d e nt l i ght. the exposur e is contr o ll ed b y v a r ying the ti me i n te r v al betw e e n r e se t and r e ad out. o n ce a r o w has bee n r e ad, the d a ta fr om the colu mns is se que n ced through an analog signal chai n (pro viding offset corr ection and gain), and then through an a d c. the output fr om the a d c i s a 12-b i t v a l ue for e a ch pi xel i n the ar r a y . the adc outp ut p a sses through a digital p r o c essing sign al cha i n (which pro v ides fur t her data path corr ec ti ons and appl ie s di gi tal g a i n ) . the pi xel arr a y c o ntains optical l y ac tiv e and li ght-s h i e l d e d (? d a r k ?) pixe ls . the dar k pixe ls ar e used to pr o v i d e data for on-c hip offse t -corr e c t i o n al gorithms (?b l ac k le v e l ? co ntrol) . the sen s or conta i ns a set of contr o l an d status r e gi st ers that ca n be used to control ma ny aspec t s of the s e nsor be havi or i n cl udi n g the fr ame si z e , exposur e , and g a in setting . these r e g i ster s can b e ac ce sse d thr o ug h a two-wir e se r i al interface . active-pixel sen so r (aps) a rra y a nal og p r oc es s i ng adc scaler limiter shadin g c o rre c t i o n fifo t i mi n g c o n t ro l co n t r ol registers da t a ou t two-wire serial int e rface sync si gnal s
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 8 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or f u nc t i onal o v er v i ew apt i na conf i d ent i al and pr opr i et ar y the output from the sensor is a b a y e r p a tter n ; alter n ate ro ws ar e a sequence of either g r ee n and r e d pi xel s or b l ue and gr ee n pixe ls . the offs et and gai n stage s of the analog s i gnal c h ai n pr o v i d e per - c o lor contr o l of the pi xel data. the contr o l r e gisters , timing and control, a nd digital pr o c essing function s sho w n in f i gur e 1 on page 7 ar e partitione d i n to thr e e l o gi cal par t s: ? a s e n s o r c o r e t h a t p r o v i d e s arr a y c o nt r o l and d a ta pat h corr ec ti ons . th e output o f t h e se nsor cor e i s a 12-b i t par a ll el pi xel data st r e am qua l ified b y an output data clock (pix clk) , toget h er with line_v alid (l v ) an d frame_v a lid (fv ) signals or a 4-lan e se rial hi gh-speed pi xel i n terface (h i s pi). ? a d i g i t a l sha d i n g c o rr e c ti on bl ock t o c o m p ens a te for color / bri g htne ss s h ad ing intr o- d u ced b y the l e ns or chi e f r a y angl e (cra ) cur v e mi sm atch. ? a dd it ional f u nct i onal it y i s pro v i d e d . t h is i n c l ud es a hor i zontal an d ver t ic al im ag e scaler , a limiter , a data compr e ssor , an output fifo , and a ser i aliz er . the output fif o i s pr es ent to pr ev ent d a ta burs ts b y keepi n g the data r a te conti n uous . p r ogr a mmable slew ra tes ar e al s o ava i la bl e to r e duc e the e ffect of el ectr om ag netic i n te r - fer e nce from the out p ut int e r f ace . a flash outp ut signal is pro v ided to allo w a n exter n al xenon o r led light sour ce to s y nchr oni z e wi th the se ns or exposur e ti me . a d d i tional i/o si gnal s s u pport the pr o v isi o n of an exter nal mechan ical shutter . pi xel ar r a y the s e nsor cor e use s a b a y e r col o r patte r n, as sho w n i n f i gur e 2. the ev e n -numb e r e d r o ws c o ntain gr een and r e d pi xel s ; od d-numbe r ed r o w s c o ntai n bl ue and gr een pi xel s . e v en-numb e r e d col u mns contai n g r e e n and bl ue pixe ls; odd-numb er ed col u mns co ntain r e d a n d gr een pixels . f ig u re 2 : p ix e l c o lo r p a t t e r n d e t a il (t o p r ig h t c o rn e r ) black p ix els c olumn r eadout direction . . . ... ro w r eadout dir ec tion gr b gr r gb r gr b gr r gb r f irst clear ac tiv e pix el (110, 5 2 ) gr b gr
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 9 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or op e r a t i n g m o d e s apt i na conf i d ent i al and pr opr i et ar y op e r a t i n g m o d e s b y def a ult, th e mt9 j 003 p o wers up wit h th e se r i al pixe l d a ta in terface enabl e d . the sensor can oper ate in ser i al h i spi or pa r a llel mode. for low-noise operation, the MT9J003 requires separate power supplies for analog and digital power. incoming digital and analog ground conductors should be placed in such a way that coupling between the two are mini mized. both power supply rails should also be routed in such a way that noise coupli ng between the two supplies and ground is minimized. caution aptina does not recommend the use of inductance filters on the power supplies or output sig- nal s . f i g u re 3 : t y p i c a l c o n f ig u r a t io n : s e r i a l f o u r -la n e h i s p i in t e rfa c e n o te s : 1 . a ll p o w e r s u p p lie s sh o u ld b e a d e q u a te ly d e c o u p le d . 2. a p ti na r e co m m e n d s a r e si st or val u e of 1. 5k , b u t it m a y b e g r e a te r fo r sl o w er tw o - w i re sp e e d . 3. t h is p u ll-u p r e sis t o r is n o t re q u ir e d if t h e c o n t ro lle r d r iv e s a v a lid lo g i c le v e l o n s c l k a t a ll tim e s . 4 . t h e g p i p i n s ca n b e s t a t ica lly p u lle d h i g h o r lo w to b e u s e d a s m o d u le id s , o r th e y ca n b e p r o g ra m m e d t o pe r f or m s p ec i a l f unc t i ons ( t ri gger , oe_n , s addr , s t a n d b y) to b e dyn a m i ca l l y co n t rol l e d . 5. v pp , w h i c h can be used du r i ng the m o dul e m a nufac t u r i ng pr oc es s, i s not show n i n fi gur e 3. t h i s pad i s l e f t u n c o nnec t ed du r i ng nor m al oper ati o n. 6 . t h e p a r a lle l in te rf a c e o u t p u t p a d s c a n b e le f t u n c o n n e c t e d if t h e se r i a l o u t p u t in te rf a c e is u s e d . v dd _io v dd _slvs_tx v dd _pll v dd v aa v dd v dd _slvs v aa v aa_pix master clock (6C48 mhz) s data sclk reset_bar test extclk d gnd pixgnd a gnd digital ground analog ground gnd_pll digital core power 1 hispi phy i/o power 1 ana l og power 1 to controll e from controller v dd _io v dd _pll pll power 1 digital i/o power 1 1.5k 2 1.5k 2, 3 ana l og power 1 vaa_pix slvsc_n slvsc_p sl v s_0p slvs_0n slvs_1p slvs_1n slvs_2p slvs_2n slvs_3p sl v s_3n flash shutter gpi[3:0] 4 v dd _slvs_tx
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 10 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or op e r a t i n g m o d e s apt i na conf i d ent i al and pr opr i et ar y 7 . ap t i n a r e c o m m e nd s t h a t 0. 1 f a n d 1 0 f de co u p l i n g ca p a ci to r s fo r e a ch p o w e r su p p l y a r e m o u n t e d a s c l o s e a s p o s s ib le to th e p a d . a c t u a l v a lu e s a n d r e su lts m a y v a r y d e p e n d in g o n la y o u t a n d d e sig n c o n s id - er at i o ns. chec k t he m t 9j 003 de m o headb o ar d sc hem a t i c s f o r c i r c ui t r e c o m m e ndat i o ns 8. a p ti na r e c o m m e n d s t h at anal og pow e r pl anes ar e pl ace d i n a m a nn e r suc h t h at c o upl i n g w i t h the di g i - t a l pow e r pl anes i s m i ni m i z e d. 9. the si gnal path bet w een the h i spi s e r i al t r ansm i t t e r a n d r e c e iv e r s h o u ld b e a d e q u a t e ly d e s ig n e d t o m in - im iz e a n y tra n s - im p e d a n c e m i s m a t ch a n d / o r ref l ec tio n s o n th e d a ta p a th . f i g u re 4 : t y p i c a l c o n f ig u r a t io n : p a ra lle l p i x e l d a t a in te rf a c e n o te s : 1 . a ll p o w e r s u p p lie s sh o u ld b e a d e q u a te ly d e c o u p le d . 2. a p ti na r e co m m e n d s a r e si st or val u e of 1. 5k , b u t it m a y b e g r e a te r fo r sl o w er tw o - w i re sp e e d . 3 . t h is p u ll-u p r e sis t o r is n o t re q u ir e d if t h e c o n t ro lle r d r iv e s a v a lid lo g i c le v e l o n s c l k a t a ll tim e s . 4 . t h e g p i p i n s ca n b e s t a t ica lly p u lle d h i g h o r lo w to b e u s e d a s m o d u le id s , o r th e y ca n b e p r o g ra m m e d t o pe r f or m s p ec i a l f unc t i ons ( t ri gger , oe_n , s addr , s t a n d b y) to b e dyn a m i ca l l y co n t rol l e d . 5. v pp , w h i c h can be used du r i ng the m o dul e m a nufac t u r i ng pr oc es s, i s not show n i n fi gur e 4. t h i s pad i s l e f t u n c o nnec t ed du r i ng nor m al oper ati o n. 6 . t h e se r i a l in te rf a c e o u t p u t p a d s c a n b e le f t u n c o n n e c t e d if t h e p a r a lle l o u t p u t in te rf a c e is u s e d . 7 . ap t i n a r e c o m m e nd s t h a t 0. 1 f a n d 1 0 f de co u p l i n g ca p a ci to r s fo r e a ch p o w e r su p p l y a r e m o u n t e d a s c l o s e a s p o s s ib le to th e p a d . a c t u a l v a lu e s a n d r e su lts m a y v a r y d e p e n d in g o n la y o u t a n d d e sig n c o n s id - er at i o ns. chec k t he m t 9j 003 de m o headb o ar d sc hem a t i c s f o r c i r c ui t r e c o m m e ndat i o ns. 8. a p ti na r e c o m m e n d s t h at anal og pow e r pl anes ar e pl ace d i n a m a nn e r suc h t h at c o upl i n g w i t h the di g i - t a l pow e r pl anes i s m i ni m i z e d. 9 . ap t i n a r e c o m m e nd s t h a t v dd _ t x 0 is tie d to v dd w h e n th e s e n s o r is u s in g t h e p a r a lle l in te rfa c e . vaa_pix v dd master clock (6C48 mhz) s data sclk reset_bar test flash frame_valid shutter d out [11:0] extclk d gnd pix gnd a gnd digital ground a nalog ground digital core power 1 to controller from controller line_valid pixclk v dd _io gpi[3:0] 4 digital i/o power 1 1.5k 2 1.5k 2, 3 v dd _io v dd _pll v dd v aa v aa vaa_pix gnd_pll ana l og power 1 v dd_pll pll power 1 analog power 1 v dd _tx0
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 11 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or si g n al d e sc r i p t i o n s apt i na conf i d ent i al and pr opr i et ar y si gnal d e s c r i pt i o ns t a bl e 3 pro v id e s si gn al de s c r i pti o ns for mt9 j 00 3 d i e . f o r p a d loc a t i on and ape r tur e i n format ion, r e fe r to the mt9 j 00 3 d i e d a ta shee t. table 3: si gn al d e s c r i pt i o ns pa d name pad type de s c r i pt i o n ext c lk i n p u t m ast er c l oc k i n put , 6C48 m h z . reset _bar (x s h u t d o w n ) i n put a synchrono u s act i ve l o w r e set . w h en assert ed , dat a out p ut st ops and al l i n te r n al r e g i s t er s ar e r e st o r ed t o thei r f a ct ory def a u l t sett i n gs. sc lk i n pu t s e ri a l cl ock for a cce ss to co n t rol a n d sta t u s reg i ste rs. g p i [ 3: 0] i n put g ener al pur p os e i n put s . a f te r r e se t, thes e pads ar e pow e r e d- dow n by def aul t; t h i s m e ans that i t i s not n e ce ss a r y to b o n d to th e s e p a d s . a n y o f th e s e p a d s ca n be co n f i g u r e d to p r o v i d e h a r d w a re con t r o l of t h e st and b y, ou t p ut enab l e , s addr s e le ct, a n d sh u tte r t r ig g e r fu n c tio n s. can be l e ft f l oat i ng i f not us ed. te st i n put enabl e m anu f ac t ur i n g te st m o de s. i t s h oul d not be l e ft f l oat i ng. i t c an be t i ed t o g r ound or v dd _i o w h e n u s e d in p a r a lle l o r h i s p i. it s h o u ld b e c o n n e c t e d to d gn d f o r n o r m al oper at i o n of t h e cc p2 c o n f i g ur ed sensor , or conn e c ted to v dd _i o pow e r f o r t h e m i pi ? - c onfi gured sens o r . s data i / o s er i a l data f r om rea d s and w r i t es t o contr o l and s t at us r e gi st er s. lin e _v a l id o u tp u t lin e _ v a l id (lv ) o u tp u t . q u a l i f i e d b y p i x c lk . f r am e_va l i d o utput f ra m e _va l i d ( f v) out p ut . q u al i f i e d by pi xclk. d out [1 1 : 0 ] o u t p u t p a r a lle l p i x e l d a ta o u tp u t . q u a lif ie d b y p i x c l k . p i x c l k o u t p u t p i x e l c l o c k . u s e d t o q u a lify th e l v , f v , a n d d out [11 : 0] ou tpu t s. f l ash o utput f l ash out p ut . s y nc h r oni z ati o n pul s e f o r ext e r n al l i ght sour c e . can be l e ft f l oat i ng i f not use d . s h u t t e r o u t p u t c o n tro l fo r e x t e rn a l m e ch a n ica l sh u tte r. c a n b e le ft f l o a tin g if no t u s e d . v pp s u ppl y p ow er s u pp l y us ed t o pr ogr a m o n e- t i m e pr ogr a m m abl e ( o t p ) m e m o r y . di s c onnec t pad w h en not pr og r a m m i ng or w h en f eat ur e i s n o t u s ed. v dd _ t x 0 s u p p l y p h y p o w e r su p p ly . d i g i ta l p o w e r s u p p ly f o r th e m i p i o r c c p 2 s e ria l d a t a in te r f a c e . a p tin a r e c o m m e n d s th a t v dd _ t x 0 is a l w a y s t i e d t o v dd w h en usi n g an unpac kaged sensor . v dd _ s l v s s u p p l y h is p i p o w e r s u p p ly fo r d a ta a n d c l o c k o u tp u t . t h is s h o u ld b e tie d to v dd v dd _ s l v s _ t x s u p p ly d ig it a l p o w e r s u p p ly fo r t h e h is p i i/ o . v aa s u ppl y a nal o g po w e r s u p p l y . v aa _p i x s u ppl y a nal o g po w e r s u p p l y f o r t h e pi x e l ar r a y. a gn d suppl y a n a l o g gr ou nd. v dd s u p p l y d ig it a l p o w e r s u p p ly . v dd _ i o s uppl y i / o po w e r s u p p l y . d gn d suppl y c om m o n gr ou nd for di gi t al and i / o . v dd _ p l l s u ppl y p l l po w e r s u p pl y . g n d _ pll s uppl y p ll gr ound. p i xgn d s u ppl y p i x e l gr ound. s l v s _ 0 p o u t p u t l a n e 1 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (p o s i tiv e ). q u a lifie d b y th e s l v s s e r i a l c l o c k . s l v s _ 0 n o u t p u t l a n e 1 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (n e g a t iv e ) . q u a lif ie d b y t h e s l v s s e ria l c l o c k . s l v s _ 1 p o u t p u t l a n e 2 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (p o s i tiv e ). q u a lifie d b y th e s l v s s e r i a l c l o c k . s l v s _ 1 n o u t p u t l a n e 2 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (n e g a t iv e ) . q u a lif ie d b y t h e s l v s s e ria l c l o c k . s l v s _ 2 p o u t p u t l a n e 3 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (p o s i tiv e ). q u a lifie d b y th e s l v s s e r i a l c l o c k . s l v s _ 2 n o u t p u t l a n e 3 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (n e g a t iv e ) . q u a lif ie d b y t h e s l v s s e ria l c l o c k . s l v s _ 3 p o u t p u t l a n e 4 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (p o s i tiv e ). q u a lifie d b y th e s l v s s e r i a l c l o c k . s l v s _ 3 n o u t p u t l a n e 4 d i ffe r e n t ia l h i s p i (l v d s ) s e ria l d a ta (n e g a t iv e ) . q u a lif ie d b y t h e s l v s s e ria l c l o c k .
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 12 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or si g n al d e sc r i p t i o n s apt i na conf i d ent i al and pr opr i et ar y figure 5: hispi package pinout diagram s l v s _ c p o u t p u t d if fe re n t ia l h i s p i (l v d s ) se r i a l c l o c k ( p o s it iv e ) . q u a lifie d b y th e s l v s s e ria l c l o c k . s l v s _ c n o u t p u t d if fe re n t ia l h i s p i (l v d s ) se r i a l c l o c k ( p o s it iv e ) . q u a lifie d b y th e s l v s s e ria l c l o c k . t a bl e 3: si gna l d e scr i p t i o n s ( c on ti nued) pad name pad type description 1 2 3 4 5 6 4 84 7 4 64 5 44 43 19 20 21 22 23 24 25 26 27 28 29 30 7 8 9 10 11 12 13 14 15 16 17 18 42 41 40 39 38 37 36 35 34 33 32 31 a gnd v aa nc vaa pixgnd vaa_pix vaa_pix nc nc v aa a gnd v dd _slvs v dd _io gnd v dd extclk v dd gnd v dd _io s data sclk test reset_bar v dd gnd v dd _io gpi0 gpi1 gpi2 gpi3 shutter flash gnd v dd _pll vpp v dd _slvs_tx slvs0_n slvs0_p slvs1_n slvs1_p slvsc_n slvsc_p slvs2_n slvs2_p slvs3_n slvs3_p gnd nc
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 13 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or si g n al d e sc r i p t i o n s apt i na conf i d ent i al and pr opr i et ar y figure 6: 48-pin ilcc parallel package pinout diagram 1 2 3 4 5 6 4 84 7 4 64 5 44 43 19 20 21 22 23 24 25 26 27 28 29 30 7 8 9 10 11 12 13 14 15 16 17 18 42 41 40 39 38 37 36 35 34 33 32 31 nc pixgnd v aa a gnd vaa_pix vaa_pix v aa a gnd v aa v pp nc nc d out 7 d out 8 d out 9 d out 10 d out 11 v dd_ io pixclk v dd sclk s data reset_bar v dd _io v dd gpi0 gpi1 gpi2 gpi3 gnd test flash shutter frame_valid line_valid gnd gnd extclk v dd _pll d out 0 d out 1 d out 2 d out 3 d out 4 d out 5 d out 6 gnd nc
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 14 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y o u tp u t d a ta f o rm a t s e rial p i x e l d a ta in te rf a c e the mt9 j 00 3 sup p or ts ra w 8, ra w 10, an d ra w 12 ima g e dat a f o r m ats o v er a ser i al int e r - face . the sensor sup p or ts a 1 and 2-lan e mipi as w e ll as the h i spi i n terface . thes e inter - face s ar e not de scri bed i n the data she e t. h i gh speed ser i al pi xel i n t e r f ace the h i gh s p e e d s e ri al pixe l (h i s pi) interface use s four d a ta and one cl ock l o w v o l t ag e d i ffer e ntial si gnal ing (l vds) outputs . ? s l v s_cp , sl vs_cn ? s l v s_[0:3 ]p , sl vs_[0:3 ]n the h i spi in ter f ac e supp or ts t w o p r ot oco l s , st r e am ing an d pac k e t ize d . t h e st r e am ing protocol confor ms to a standar d video a ppl ic ati o n whe r e eac h li ne of act i ve or intr a-frame blanking pro v ided b y the sensor is tr ansm it ted at t h e sam e length. th e pack- etiz ed proto c ol will transmit o n ly the a c tiv e data ignor i ng line-to-line and fr ame-to-fr a me blanking data. the h i spi i n te r f ace b u il di ng bloc k is a unid ir ecti onal d i ffer e ntial s e rial i n te rfac e with four d a ta and on e doub le dat a r a t e (d d r ) cl oc k l a ne s . one c l oc k for e v er y four se r i a l da ta lane s is pro v id ed for pha s e al ig nm en t a c ros s m u lti p l e lane s . f i g u r e 7 s h o w s th e co nfigur ation between the h i spi tr an sm it ter and t h e r e ceiver . figure 7: hispi transmitter and receiver interface block diagram a camer a c on taining the hisp i tr ansmitter a host (dsp) c on taining the hisp i r eceiv er dp0 dn0 dp1 dn1 dp2 dn2 dp3 dn3 cp0 cn0 tx ph y0 rx ph y0 dp0 dn0 dp1 dn1 dp2 dn2 dp3 dn3 cp0 cn0
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 15 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y h i s p i p h y sic a l la y e r the h i spi phys ic al lay e r is parti t ioned i n to bl o c ks of fo ur da ta lanes and an associated c l o c k l a n e . a n y re f e re n c e t o t h e p h y i n t h e re m a i n d e r o f t h i s d o c u m e n t i s re f e r r i n g t o t h is mi nim u m b u il di ng bloc k. the p h y will ser i alize a 1 0 -, 12- , 1 4 - or 16 -bit da ta wo r d and t r ansmit each bit of data c e nte r e d on a ris i ng e d ge of the cloc k, the s e cond on the fol l o w ing ed ge of cl ock. f i g u r e 8 sh o w s bit tr ansm ission. i n this exam ple , the wo r d i s tr ansm it te d in or de r of msb t o l s b . the r e c e i v er latches d a ta at the ri sing and fall ing ed ge of the cl ock. fi g u r e 8: t i m i n g d i agram d l l t i mi n g a d j u s t me n t the s p eci f ic ati o n i n c l ud es a d ll to com p e n s a te for di ffe r e n ces i n g r oup de lay for each d a ta l a ne . the dl l is conne cted to the c l oc k lane and each data l a ne , w h i c h acts as a c o ntr o l mas t e r for the output de lay b u ffe rs . o n ce the dll has gai n e d phas e lock, e a ch l a ne c a n be d e l a y e d i n 1/8 unit i n te r v al (ui) steps . this add i tional d elay al lo ws the use r to incr ease the setup or hold time at the r e ce i v er ci r c uits and can be us ed to c o mpensate for skew intr oduc ed in pcb de si gn. i f the dll ti ming adj u stment is not r e qu ir ed, the d a ta and c l ock lane de lay s e tti n gs s h oul d be se t t o a d e f a ul t code of 0x0 0 0 t o r e duc e ji tter , skew , and po w e r di ssi pati on. f i g u re 9 : b l o c k d i a g ra m o f d l l t i m i n g a d ju s t m e n t c p dn . . ms b l s b txpost dp cn 1 ui txpre del a y de l 0 [ 2 : 0 ] delay del1 [ 2 : 0 ] delay delay de l 3 [ 2:0] delay del 2 [ 2 : 0 ] da t a _l a n e 0 da t a _l a n e 1 c l oc k _ l a ne 0 d a t a _ l a ne 2 d a t a _ l a ne 3 delclock[2:0]
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 16 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y fi g u re 1 0 : d e l a y i ng the cl o c k _ l a ne w i t h r e sp ect to d a ta _ l a n e f i g u re 1 1 : d e la y i n g d a ta _ l a n e w i th r e s p e c t t o t h e c l o c k _ la n e h i sp i st r e am i n g m o de pr ot oc ol l a ye r the protocol layer is p o sition ed between the out p ut dat a p a th of t h e sensor an d the physical lay e r . the main functions of the protocol lay e r ar e gener a ting sync codes , f o rma t ti n g pi x e l d a ta , i n se rti n g ho ri z o nt a l /v ertic a l blanking c o des , and d i s t ri buting pixe l data o v er de fined d a ta lanes . the h i spi in ter f ac e can onl y b e c o nfi g ur ed w h e n the se ns or i s in standb y . this i n cl udes configuring the interface to transmit across 1, 2, or all 4 data lanes. d a t a n ( d e l n = 0 0 0 ) cp ( delclock = 000) c p ( d e l c l oc k = 00 1) cp ( d el cl o ck = 0 1 0 ) cp ( d e l cl o ck = 0 1 1 ) cp ( d el cl o ck = 1 0 0 ) c p ( d e l c l oc k = 1 01) c p ( d el cl o ck = 1 1 0) cp ( d el cl o ck = 1 1 1 ) increasing delclock_[2:0] increases clock delay 1 u i 1 u i t dllstep cp ( d el cl o ck = 0 0 0 ) d a t a n ( d e l n = 0 0 0 ) d a ta n ( d e ln = 0 0 1 ) d a t a nd e l n = 0 1 0 ) d a ta n ( d e ln = 0 1 1 ) d a ta n ( d e ln = 1 0 0 ) d a ta n ( d e ln = 1 0 1 ) da t a n ( de l n = 1 1 0 ) da t a n ( de l n = 1 11 ) increasing deln_[2:0] increases data delay
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 17 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y pr ot oc ol fundam e nt al s r e fe rring to f i gur e 12, it c a n be s een that a sync cod e i s ins e r t e d in the s e r i al d a ta s t r e am pri o r to each li ne of imag e data. the s t r e ami n g pr otocol wi ll i n se r t a sync code to tr ansm it each active da ta li n e and v e r t ical bla n kin g lines . the p a cketiz ed protocol will tr ansmit a sync code to no te the star t and end of each ro w . the packetiz ed proto c ol uses syn c a ? s tar t of f r ame ? (s of) sync code at the star t of a fr am e and a ? s ta r t o f line ? (sol) sy nc code at th e st ar t of a line within the fr am e . the protocol will also tr ansmit an ? e nd of f r ame ? (eof) at the end of a f r ame and a n ? e nd of line ? (eol) sync code at the end of a r o w within the fr ame fi g u r e 12: s t eam i ng vs. packeti z e d tr an sm i s si o n p a rallel p i x e l d a ta in te rfa c e MT9J003 image data is read out in a progress ive scan. valid image data is surrounded by horizontal blanking and vertical blanking, as shown in figure 13. the amount of hori- zontal blanking and vertical blanking is pr ogrammable; lv is high during the shaded region of the figure. fv timing is described in the ?output data timing (parallel pixel data interface)?. ?
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 18 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y figure 13: spatial illustration of image readout p 0,0 p 0,1 p 0,2 .....................................p 0,n-1 p 0,n p 1,0 p 1,1 p 1,2 .....................................p 1,n-1 p 1,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 p m-1,0 p m-1,1 .....................................p m-1,n-1 p m-1,n p m,0 p m,1 .....................................p m,n-1 p m,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 v ali d ima ge hor iz ont al b l an ki ng 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 ver t ic al b l an ki ng ver t ic al /hor iz ont al b l an ki ng
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 19 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y o u tp u t d a ta t i m i n g (p a r a lle l p i x e l d a ta in te rfa c e ) mt 9j00 3 output data is synchronized wit h t h e pix c lk output . w h en l v is high, one pixe l v a lue i s output on the 12-b it d out output ev er y pix c lk per i od. the p i xel clock fr equ e ncy c a n be d e termi n ed bas e d on the se ns or's m a ster input c l ock and i n te rnal pll co nfigur ation. the r i sing edges on the p i x c lk si gnal occ urs one-half of a pixe l cl ock per i od after transitions on l v , fv , and d ou t (s ee f i gur e 14). thi s all o ws p i x c lk to be us ed as a cl ock to s a mple the data. p i x c lk i s conti n uousl y enabl e d , ev e n du r i ng the bl anki ng pe r i od. th e mt9 j 00 3 c a n be p r o g r a m m e d to de lay t h e pix c lk e d ge r e lati ve to the d ou t tr ansi tions . thi s can b e achie v ed b y pr og r a mmi ng the corr es pondi n g bi ts i n the r o w _ s p e e d r e gi ster . the par a mete rs p , a, and q i n f i g u r e 15 ar e de fined i n t a bl e 4 on page 20 . fig u r e 14: pi xel d a t a ti m i ng exam pl e fi g u r e 15: r o w t i m i n g an d fv /lv s i g n al s the s e nsor tim i ng (sho wn i n t a b l e 4 on pa ge 20) i s s h o wn i n terms of pi xel cl ock and mas t e r c l oc k cy cl es (se e f i gur e 14 on page 19). the de faul t se tti n gs for the on-c hip pl l ge ne r a te a p i xel arr a y clock ( v t_pix_clk ) of 16 0 m h z an d a n outp ut clock (o p_pix_clk) of 40 mhz given a 20 mhz input clock to the mt 9j 003. eq uat i on s for calcula t ing the fr ame r a te ar e giv e n in ? f r a me r a te c o ntrol ? on page 47. p 0 [11:0] p 1 [11:0] p 2 [11:0] p 3 [11:0] p 4 [11:0] p 5 p n-2 p n-1 [11:0] p n [11:0] v a lid image da ta blanking blanking lv pix c l k d ou t [11:0] fv lv number of master clocks p a q aqa p
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 20 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y table 4: row timing with hispi interface parameter name equation d e f a u lt t im in g pi xclk_p eri o d p i x el c l oc k p e r i od 1/ vt _ p i x _c l k _f r e q_m h z 1 p i xe l cl oc k = 6 . 25ns s s ki p ( s ubs am p l i n g) f act or f o r x_odd_i nc = y_odd_i n c = 3, s = 2. f o r x_ odd _ i nc = y_odd_i n c = 7, s = 4 . other w i s e, s = 1 f o r y_odd_i n c = 3, s = 2 f o r y_odd_i n c = 7, s = 4 f o r y_odd_i n c = 15 , s = 8 f o r y_odd_i n c = 31 , s = 16 f o r y_odd_i n c = 63 , s = 32 1 a a c t i v e dat a t i m e ( x _add r _ end C x_ addr _s t a r t + x _ o dd_i n c ) * 0 . 5 * p i x clk_p e ri o d / s = 3 775 - 112 + 12 18 32 pi x e l c l ocks = 1 1. 45 s p f r a m e s t ar t / end bl anki ng 6 * pi xcl k _pe r i o d 6 pi xe l cl oc ks = 3 7 . 5 ns q h o r iz o n ta l b l a n k i n g (lin e _ le n g th _ p c k C a ) * p i x c l k _ p e r io d = 3 694 C 1 832 18 62 pi x e l c l ocks = 1 1. 63 s a + q r ow t i m e l i n e_l e ngt h _pc k * p i xcl k _peri o d 3 6 94 pi x e l c l ocks = 2 3. 09 s n n um b e r of r o w s ( y _ a ddr _end - y_ad dr _ s t a r t + y_ odd _ i nc) / s = ( 2 755 - 8 + 1 ) / 1 27 48 r o w s v v e r tic a l b l a n k i n g ((fr a m e _ l e n g t h _ lin e s - n ) * (a + q )) + q C (2 * p ) = ( 2 891 - 274 8) * 369 4 + 186 2 - 12 53 0092 p i xe l cl oc ks = 3 . 31m s t f ra m e v a lid t i m e (n * (a + q )) - q + (2 * p ) = 2 748* 3 694 - 186 2 + 12 10 149262 pi x e l c l oc ks = 6 3. 42m s f t o t a l fra m e tim e lin e _ le n g th _ p c k * fra m e _ le n g th _ lin e s * p i x c l k _ p e r io d = 2 891 * 3 694 10 679354 pi x e l c l oc ks = 6 6. 75m s t a b le 5 : r o w t im in g w it h p a ra lle l in t e rfa c e parameter name equation d e f a u lt t im in g pi xc l k _pe r i o d p i x e l cl oc k per i od 1/ v t _p i x _c l k _f r e q _ m h z 1 pi x e l c l oc k = 6. 25ns s s ki p ( s ub sam p l i n g) f a c t or f o r x_odd_ i n c = y _ od d_i n c = 3, s = 2. f o r x_odd_ i n c = y _od d_i n c = 7, s = 4. ot her w i s e, s = 1 f o r y_od d_i n c = 3, s = 2 f o r y_od d_i n c = 7, s = 4 f o r y_od d_i n c = 15, s = 8 f o r y_od d_i n c = 31, s = 1 6 f o r y_od d_i n c = 63, s = 3 2 1 a a c t i v e dat a t i m e ( x _addr _end - x _ addr _s t a r t + x_ o d d _ i n c)*0 . 5 *p i x c l k _ pe r i o d /s = ( 37 75- 112+ 1) / 2 1832 pi x e l c l oc ks = 11. 45 s p f r am e st ar t / end bl anki ng 6 * pi xcl k _peri o d 6 pi xel c l oc ks = 75ns q a r r ay h o r i z o nt al bl anki ng ( l i n e_l e ngt h _pc k C a) * pi xclk_peri o d = 73 58 C 18 32 5526 pi x e l c l oc ks = 34. 5 s exte r n al hor i zon t al bl anki ng i s 30 pi x e l c l oc ks or 187ns.
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 21 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y a + q r o w tim e lim ite d b y o u tp u t i n t er f ac e s p eed x _ out p ut _si z e* c l k_p i xe l / c l k_op + 30 = 36 64* 160 m h z / 80 m h z + 30 7358 pi x e l c l oc ks = 46. 1 s n n um ber of r o w s ( y _ad d r _ end - y_add r _s t a r t + y_odd_ i n c ) / s = ( 27 55 - 8 + 1) / 1 2748 r o w s v v e r tic a l b l a n k i n g ((fr a m e _ l e n g t h _ lin e s - n ) * (a + q )) + q C (2 * p ) = ( 28 91 - 2748 ) * 7358 + 1862 - 1 2 1054 044 p i xel cl oc ks = 6. 59m s t f r a m e v a lid tim e (n * (a + q )) - q + (2 * p ) = 27 48* 735 8 - 1862 + 12 2021 7934 p i xe l c l oc ks = 126 . 36m s f t o t a l fr a m e tim e lin e _ le n g th _ p c k * fr a m e _ le n g t h _ lin e s * pi xclk_p eri o d = 28 91* 373 58 2127 1978p i x e l c l oc ks = 132 . 95m s t a b l e 6 : r o w t i mi n g wi t h p a r a l l e l i n t e r f a c e u s i n g l o w p o we r m o d e p a rameter name equation d e f a u lt t im in g pi xc l k _pe r i o d p i x e l cl oc k per i od 1/ v t _p i x _c l k _f r e q _ m h z 1 pi x e l c l oc k = 12. 5ns s s ki p ( s ub sam p l i n g) f a c t or f o r x_odd_ i n c = y _ od d_i n c = 3, s = 2. f o r x_odd_ i n c = y _od d_i n c = 7, s = 4. ot her w i s e, s = 1 f o r y_od d_i n c = 3, s = 2 f o r y_od d_i n c = 7, s = 4 f o r y_od d_i n c = 15, s = 8 f o r y_od d_i n c = 31, s = 1 6 f o r y_od d_i n c = 63, s = 3 2 1 a a c t i v e dat a t i m e ( x _addr _end - x _ addr _s t a r t + x_ o d d _ i n c)*0 . 5 *p i x c l k _ pe r i o d /s = ( 37 75- 112+ 1) / 2 1832 pi x e l c l oc ks = 22. 9 s p f r am e st ar t / end bl anki ng 6 * pi xcl k _peri o d 6 pi xel c l oc ks = 75ns q a r r ay h o r i z o nt al bl anki ng ( l i n e_l e ngt h _pc k C a) * pi xclk_peri o d = 36 94 C 18 32 1862 pi x e l c l oc ks = 23. 2 s exte r n al hor i zon t al bl anki ng i s 30 pi x e l c l oc ks or 375ns. a + q r o w tim e lim ite d b y o u tp u t i n t er f ac e s p eed x _ out p ut _si z e* c l k_p i xe l / c l k_op + 30 = 36 64* 80m h z / 80m h z + 30 3694 pi x e l c l oc ks = 46. 1 s n n um ber of r o w s ( y _ad d r _ end - y_add r _s t a r t + y_odd_ i n c ) / s = ( 27 55 - 8 + 1) / 1 2748 r o w s v v e r tic a l b l a n k i n g = ((fr a m e _ l e n g t h _ lin e s - n ) * (a + q )) + q C (2 * p ) = ( 28 91 - 2748 ) * 7358 + 1862 - 1 2 5300 92 pi x e l c l ock s = 6. 63m s t f r a m e v a lid tim e (n * (a + q )) - q + (2 * p ) = 27 48* 369 4 - 1862 + 12 1014 9262 p i xe l c l oc ks = 126 . 86m s f t o t a l fr a m e tim e lin e _ le n g th _ p c k * fr a m e _ le n g t h _ lin e s * pi xclk_p eri o d = 28 91* 369 4 1067 9354 p i xe l c l oc ks = 133 . 5m s t a bl e 5 : r o w ti m i n g w i th p a r a l l e l i n terface ( c o n ti n u ed ) parameter name equation default timing
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 22 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or o u tp u t d a ta f o rm a t apt i na conf i d ent i al and pr opr i et ar y fr am e rat e s at com m o n resol u t i ons t a bl e 7 sho w s exam pl es of r e g i ste r s e tti ngs to a c hi eve com m o n r e sol u ti ons and t h ei r fr ame r a t e s . table 7: register settings for common resolutions resolution interface fr a m e rate su b s am pli n g mode x_addr_start x_addr_end y_addr_start y_addr _end 36 64x 2748 (full resolution) h i s p i 14. 7 f p s n / a 112 37 75 8 27 55 p a r a lle l 7 . 5 f p s 19 20x 1080 ( 1080 p h d tv) h i s p i 59. 94 f p s 2 x2 s u m m i ng 32 38 73 296 24 53 par a l l e l 29. 97 f p s 1 280x 720 ( 720p h d tv) hi s p i a n d p a r a lle l 59. 94 f p s 2 x2 s u m m i ng 32 38 73 296 24 53 1 408x 792 + 10% ei s ( 720p h d tv + 10% ei s) hi s p i a n d p a r a lle l 59. 94 f p s 2 x2 s u m m i ng 624 34 37 304 18 85 6 40x 480 (lo w p o w e r m o n i to r) hi s p i a n d p a r a lle l 29. 97 f p s s um 2 s ki p 2 112 37 69 8 2 7 5 3
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 23 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t w o - w i re s e ri a l r e g i s t e r in te rfa c e apt i na conf i d ent i al and pr opr i et ar y t w o - w i re s e ria l r e g i ste r in te rfa c e the two-wir e ser i al inter f ace bus enables r e ad /wri te ac ces s to contr o l and s t atus r egi s- ters with in the mt 9j0 03. the inter f ace prot oc o l uses a master/sla ve model in which a m a st er cont r o ls one o r m o r e s l ave de vic e s . t h e sensor a c ts as a slave device . the master gener a tes a clock ( s clk ) that is an input to the sens or and is us ed to synchr oni z e tr ans- fer s . d a ta is tr ansferr e d b e tw een the m a s t er and the sl ave on a bi di r e ctional si gnal (s data ). s dat a is p u lle d up to v dd off- chip b y a 1.5k r e si stor . e i the r the sl av e or master de vi ce c a n d r i v e s da ta l o w?the inter f ace protocol dete r m in es whi c h de vic e is a l l o wed to dr ive s data at any giv e n time . the protocols descr i bed in the two-wir e ser i al inter face sp ecif ic ation allo w the sla v e d e vic e to dri v e scl k l o w ; the MT9J003 u s es sclk as an i n put only and ther efor e nev e r dr ive s it l o w . pr ot oc ol data tr ansfers on t h e two- wir e ser i al inter f ace bus ar e p e r f or med b y a sequen ce of lo w- lev e l protocol elements: 1. a (r epeated ) start condi t ion 2. a slav e addr ess/data dir e ctio n b yte 3. an (a n o -) ackno w ledge bit 4. a message b y te 5 . a s t o p c o nd it ion the bus is id le when b o th scl k an d s dat a ar e high. c o ntr o l of the bus is ini t i a ted w i th a s t a r t c o nd it ion, and t h e bus is r e l e as e d wit h a st op cond it ion. onl y the m a s t e r ca n gener a te the star t and stop conditions . s t a r t c o n d itio n a star t condition is def i ned as a high-to-l o w tr an sitio n on s da ta whil e sc lk is high. a t the end of a tr ans f e r , the master c a n ge ne r a te a start condi t i o n wi thout pr evi o usly gener a ting a stop cond it ion; th is i s kno w n as a ? r e p e a te d st ar t ? or ? r es tar t ? con d i t io n. s t o p c o n d it io n a stop cond ition is de fined as a l o w - to-high tr ans i tion on s dat a while sclk is high. da t a t r a n s f er d a ta i s tr ansfe r r e d seri all y , 8 bits at a time , with the msb tr ansm itt e d f i rst . each b yt e of d a ta i s foll o w ed b y an ackno w le dge b i t or a no-ackno wledge bit. this data tr ansfer mechanism is used f o r the slav e addr ess/da ta dir e ction b yte a n d for m e ssage b yt e s . one da ta b i t is tr an sfe r r e d dur i ng eac h scl k cl ock pe r i o d . s da t a can change whe n scl k is l o w a n d mus t be st abl e whil e scl k is hig h . sl a v e ad dr e s s / da t a di r e c t i o n b y t e b i ts [7 :1] of t h is b yte r e p r esent the device sl av e ad dr es s and bi t [0] i n di cates the d a ta tr an sfer dir e ction. a ?0 ? in bit [0] in dicat e s a w r ite, and a ?1 ? indicates a r e ad . the d e fault s l av e add r e sse s used b y the MT9J003 for the mip i config ur e d sens or ar e 0x6c (wr i te addr ess) and 0x6d (r ead a d dr ess) in a ccor d ance with the mip i spe c ifi c ation. al te r - nate s l av e add r e sse s of 0x6e(wri te add r e ss) and 0x6f(r e a d ad dr ess ) can be se le cted b y en abling and asser t ing the s a ddr signal th r ough the gpi pad. b u t for t h e ccp2 conf ig- ur ed se nsor , the de faul t s l av e addr es ses us ed ar e 0x20 (write addr es s) and 0x21 (r ead
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 24 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t w o - w i re s e ri a l r e g i s t e r in te rfa c e apt i na conf i d ent i al and pr opr i et ar y addr ess) in a c cor d ance with the smia specif ic ati o n. al so , alternate slav e add r e sse s of 0x30 (wr i te ad dr es s) and 0x 31 (r ead addr es s) c a n be s e l e cted b y enab li ng and ass e rting the s a ddr si gnal thr o ugh the gp i pad. an alter n ate slav e addr ess can al so be pr ogr a mme d thr o ug h r0x31fc. me s s a g e b y t e m e s s age b y te s ar e use d for send ing r egi ster add r e sse s and r e g i s t e r write data to the s l av e d e v i c e a n d f o r re t r i e v i n g re g i s t e r re a d d a t a . ac k n ow l e d g e b i t each 8-bi t d a ta tr ans f e r is fol l o w e d b y an ackno w le dge bi t or a no-ac k no wl ed ge b i t in the sclk clock per i od follo w in g the data tr ansfer . the tr ansmi t te r (whi ch is the master when wri t i n g, or the slav e when r e ading ) r ele ases s da ta . the r e ce iv e r i n di cate s an ackno wl- ed g e bi t b y d r ivi n g s da ta l o w . as for data transf ers , s da ta can change when sclk is l o w and mus t be stabl e whil e sclk is high. no- a c k no wl e d g e bi t the no-ackno wle d ge b i t i s ge ne r a te d when the r e cei v er doe s not d r iv e s dat a lo w d u r i ng the scl k c l oc k period foll o w ing a data tr ans f e r . a no-ac kno wl ed ge bi t i s used to ter m inate a r e a d sequence . typi c a l sequenc e a ty pic a l rea d or wr ite s e que n ce be gi ns b y t h e ma st er g e n eratin g a s t ar t c o nd iti o n o n the bus . aft e r t h e st ar t condit ion, the m a ster s e nds the 8-bi t sl av e addr es s/d a ta di r e ction b y te . the last bit indicates whether the r e q u est is f o r a r e ad or a wr ite , wher e a ?0? indi- ca tes a wr ite and a ?1? indicates a r e ad. i f the addr es s matc hes the ad dr ess of the sl av e d e vic e , the s l av e de vic e ac kno wl e d ges r e c e ipt of the add r e ss b y gene r ati n g an ackno w l- ed g e bi t on t h e b u s . if the r e q u es t w a s a w r it e, t h e m a st er the n transf ers th e 16-bit r e gister addr ess to which the w r it e should take p l ace . this tr a nsfer t a kes place a s two 8-bit seq u ences and the slav e sends a n ackno w ledge bit after each sequ ence t o indica te that t h e b y te has been r e ceiv e d . the master then tr ansfers the data as an 8-bi t sequenc e ; the sl av e send s an ac kno w l e d g e bi t a t t h e en d of t h e s e q u enc e . the m a ster stops wri t i n g b y gene r ati n g a (r e) sta r t or stop con d itio n. if the r e q u est was a r e ad , the m a ster sends the 8 - bit wr it e slave addr ess/dat a dir e ction b y te and 16-bi t r e gi ster ad dr ess , the same wa y as with a wr ite r e q u est. th e m a ster th en gener a tes a (r e)sta r t condit ion and th e 8-bit r e ad slav e addr ess/data dir e ction b yte , and clocks out the r e gister data, eight bits a t a time . t h e m a ster gener a tes an ackno w ledge bit after each 8- bit tr ansfer . t h e slave ? s int e r n al r e gi s t er add r es s is autom a ti cal l y i n cr e- m e nt ed a f te r ever y 8 bi ts ar e tr ans f e r r e d. th e dat a t r ans f er is s t op ped wh en the m a s t e r sends a no-ackno wledge bit.
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 25 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t w o - w i re s e ri a l r e g i s t e r in te rfa c e apt i na conf i d ent i al and pr opr i et ar y si ngl e rea d fr om random l o cat i on this se que n ce (f ig ur e 1 6) star ts wi th a d u mmy wr ite to the 16 -bit addr ess tha t is to be us ed for the re ad . the master termi n ate s th e write b y gen e r a ting a r e star t condition. the m a ster the n se nds the 8-bi t r e ad sl av e ad dr e s s / data d i r e cti o n b y te and cloc ks out one b y te of r e gi ster data. the m a ster te rmin ates the r e ad b y gener a ting a no-ackno wl- e d ge b i t fol l o w ed b y a s t op condi t i o n. f i gur e 16 s h o w s ho w the i n te rnal r e g i s t e r ad dr ess mai n tai n ed b y the MT9J003 is load ed and incr em ente d as the se que n ce pr ocee ds . f i gur e 16: si ngl e re ad f r om random loc a t i on s i n g l e r e a d fro m c u rre n t lo ca ti o n this seq u ence (f igur e 1 7 ) p e r f or m s a r e ad using the curr ent value of th e mt9 j 003 i n te r n al r e g i ste r ad dr e s s . the master termi n ates the read b y g e ner a ting a no-ackno wl- e d ge b i t fol l o w ed b y a s t op condi t i o n. the fi gur e sho w s tw o ind e pende n t read se q u enc e s . fi g u r e 17: s i n g l e r e a d fr o m cu rr en t locat i o n s = star t c ondition p = stop c ondition sr = r estar t c ondition a = acknowledge a = no-acknowledge slave to master master to slave slave address 0 s a reg address[15:8] a reg address[7:0] slave address a a 1 sr read data p pr e vious r eg addr ess , n r eg addr ess , m m+1 a sla v e addr ess 1 s a read data sla ve address a 1 s p r ead da ta p pr e vious r eg addr ess , n r eg addr ess , n+1 n+2 a a
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 26 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t w o - w i re s e ri a l r e g i s t e r in te rfa c e apt i na conf i d ent i al and pr opr i et ar y sequent i al rea d , st ar t fr om random loc a t i on thi s s e q u enc e (f i g ur e 1 8 ) s t ar ts in the sam e w a y as t h e si ng le rea d f r om r a nd om l o ca- tion (f igur e 1 6). i n stead of generating a no -a ckno wledge bit a f ter the f i rst b y te of data has be en tr ansferr e d , the master ge ner a tes a n ackno w ledge bit and continues to per f or m b y t e reads until ? l ? b y tes have been r e ad. f i gur e 18: sequent i al re ad, s t ar t fr om random l o c a t i on sequ en ti al r e a d , start fro m c u rren t lo ca ti o n thi s s e q u enc e (f i g ur e 19 ) s t ar ts in the sam e w a y as t h e si ng le rea d f r om curr ent l o ca- tion (f igur e 1 7 on page 25). i n stea d of gener atin g a no-ackno wledge bit af ter the first b y t e of d a ta has b een tr ansf e r r e d, the mas t e r g e ner a t e s an ac kno w l e dg e bi t and continues to per f or m b y te reads until ? l ? b ytes hav e been r e ad. f i g u re 1 9 : s e q u e n tia l r e a d , s t a r t f r o m c u rre n t lo ca tio n si ngl e w r i t e t o random loc a t i on this se que n c e (f i g ur e 2 0) b egi ns wi th the m a st er ge ne r a ti ng a st ar t cond ition. the s l av e addr ess/data dir e ctio n b yte signals a writ e an d is fo llo wed b y t h e h i gh the n l o w b y te s of the r e gi st er add r es s th at is t o b e w r i t t e n. t h e m a st er follo w s t h is with th e b y te of wr it e da ta. the w r it e is ter m inat ed b y the m a s t er ge ne r a ti ng a st op c o nd it ion. fi g u re 2 0 : s i n g l e w r i t e to r a nd o m lo ca ti o n sla v e addr ess 0 s sr a reg address[15:8] r ead da ta r ead da ta a reg address[7:0] a read data slave address pr e vious r eg addr ess , n r eg addr ess , m m+1 m+2 m+1 m+3 a 1 r e ad da ta r ead da ta m+l-2 m+l -1 m+l a p a a a a r ead da ta r ead da ta previous r eg addr ess , n n+1 n+2 n+l-1 n+l read data slave address a 1 r ead da ta a p s a a a sla v e addr ess 0 s a r e g addr ess[15:8] a r eg addr ess[7:0] a p pr e vious r eg addr ess , n r eg addr ess , m m+1 a a write data
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 27 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t w o - w i re s e ri a l r e g i s t e r in te rfa c e apt i na conf i d ent i al and pr opr i et ar y sequ en ti al w r i t e, star t at ran dom locati on t h i s s e q u e n c e ( f i g u r e 2 1 ) s t a r t s i n t h e s a m e way as the single write to r a ndom location (f ig ur e 20 on page 26). i n stead of ge ner a ting a no-ackno w led ge bi t after the fi rst b y te of d a ta has b een tr ansfe r r e d, the maste r g e ne r a tes an ackno w ledge bit an d continues to per f or m b y te w r it es until ? l ? b y t e s have been wr itten. the wr ite is ter m inat ed b y the master gener a ting a stop condition. figure 21: sequential write, start at random location slave address 0 s a reg address[15:8] a a reg address[7:0] a previous reg address, n reg address, m m+1 m+2 m+1 m+3 a a a m+l-2 m+l-1 m+l a a p write data w rite da ta w rite da ta write data w rite da ta
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 28 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or p r o g ra m m in g r e s t ri c t i o n s apt i na conf i d ent i al and pr opr i et ar y pr ogr a m m i ng re s t r i c t i o ns the fol l o w i n g s e c t i o ns l i s t pr ogr a mmi ng r u l e s that must be adher e d to for corr ect oper a- tion of th e MT9J003. x a d d r e s s r e strictio n s the minimum column addr ess available f o r the sensor is 24. the maximum value is 387 9. eff e ct of sc a l er on legal ran g e of o u t p ut si zes whe n the scal er is e n ab le d, it i s nece ssar y to adju st the v a l u es of x_output_s iz e and y_o utput_ size t o m a tch th e im age size gener a ted b y the sc ale r . the MT9J003 wil l oper ate incorr ectly if t h e x_out p ut_size a n d y_o ut pu t_siz e ar e significantly larger than the outp ut im age . t o understand the r e ason fo r this , con s ider t h e sit u a t io n wher e the sensor i s ope r ati n g at full r e sol u tion and the sc aler i s enabled with a scaling factor of 32 (h alf the num b e r of pi xel s in e a ch d i r e c t io n). thi s si tuat ion is s h o w n in f i g u r e 2 2 . fi g u re 2 2 : e f fect o f li m i te r o n the d a ta p a th i n f i gur e 22 , t h r ee differ e nt stages in t h e data path (see ? t im ing s p e cif i cations ? o n page 61) ar e s h o w n. the fi rst s t ag e i s the ou tput o f t h e s e n s o r c o r e . t h e c o re i s r u n n i n g a t full r e solutio n and x_ output _size is set to ma tc h t h e ac ti v e arr a y si ze . t h e l v s ig n a l is asser t ed once per ro w and r e mains asser t ed for n pixe l time s . the p i xel _ v a lid si gnal toggles with the s a me timi ng as l v , i n di cating that all pixe ls i n the r o w ar e v a li d. the s e c o nd s t ag e i s the output of the scal er , when the sc ale r i s set to r e duce the im ag e s i z e b y one-hal f i n e a c h d i me nsi o n. the effe c t of the sc al er i s to combi n e gr oups of pixe ls . ther efor e , the r o w ti me r e mai n s the same , but only h a lf the p i xels out of the s c ale r ar e v a li d. thi s i s si gnall e d b y tr ans i tions in p i xel_v a lid . ov er al l, p i xel_v a lid i s asser t ed for ( n /2) pixel tim e s p e r ro w . t a bl e 8: d e f i n i ti on s f o r pr ogr a m m i n g r u l e s name de f i ni t i o n x s k i p x ski p = 1 i f x _ odd _ i nc = 1; x s ki p = 2 i f x _ odd_i n c = 3; x s ki p = 4 i f x_odd_ i n c = 7 ys ki p y s k i p = 1 i f y _ odd _ i n c = 1; yski p = 2 i f y_odd_ i n c = 3 ; y s ki p = 4 i f y_od d_i n c = 7; yskip = 8 if y_odd_inc = 15; yskip = 16 if y_odd_inc = 31; yskip = 32 if y_odd_inc = 63 core output: full resolution, x_output_size = x_addr_end - x_addr_start + 1 line_valid scaler output: scaled to half siz e li n e_v ali d pixel_v ali d limiter output: scaled to half siz e, x_output_siz e = x_addr_end - x_addr_star t + 1 li n e_v ali d pixel_v ali d pixel_v ali d
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 29 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or p r o g ra m m in g r e s t ri c t i o n s apt i na conf i d ent i al and pr opr i et ar y the t h ir d stage is th e out p ut o f the lim i t e r when th e x_ output _size is still set t o m a tch the active arr a y siz e . b e ca use the s c ale r has r e duc e d the amount of v a li d pixe l data wi thout r e ducing t h e ro w time , the limiter at temp ts to pad the r o w with ( n /2 ) ad di ti onal pixe ls . i f this has t h e ef fect of extending l v a c ross th e whole of the hori z o ntal b l anking time , the MT9J003 w i l l ceas e to gene r ate output fr ame s . a corr ect configur at ion is sho w n in f i gur e 23, in additio n to sho w ing the x_out p ut_ s ize r e duced to m a tch th e output size of the scaler . i n th is configur at ion, th e output of the lim i ter does not ext e nd l v . f i gur e 23 al so s h o w s the e f fe ct of the output fifo , whi c h forms the final stage in the data pat h . the outp ut fi fo m e rges th e inter m itt e nt p i x e l d a t a b a c k i n t o a c o n t i g u o u s s t r e a m . alth ough not sh o w n in t h is exam ple , t h e outp ut fifo is al so c a pab l e of oper ating wi th an output clock that is a t a diffe r e nt fr equency from its i n put c l ock. fi g u r e 23: ti m i ng of d at a pat h c or e output: full r esolution, x_output_siz e = x_addr_end - x_addr_star t + 1 l ine _ v a l id scaler output: scaled to half siz e l ine _ v a l id pixel_v ali d limiter output: scaled to half siz e , x_output_siz e = (x_addr_end - x_addr_star t + 1)/2 pixel_v ali d l ine _ v a l id pixel_v ali d output fi fo: scaled to half siz e, x_output_siz e = (x_addr_end - x_addr_star t + 1)/2 l ine _v alid pixel_v ali d
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 30 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or p r o g ra m m in g r e s t ri c t i o n s apt i na conf i d ent i al and pr opr i et ar y o u tp u t d a ta tim i n g the output fifo acts as a boundar y between two clock dom ains . d a ta is wr itten t o t h e fi fo in the v t (video t i m i ng) clock dom ain. dat a is r e ad out of the fifo in the op (out put) clock dom a in. when the s c ale r i s di sab l ed , t h e d a ta r a te i n t h e v t c l ock d o m a in is c o ns tant and u n i f o r m du ri n g th e a c t i v e p e ri o d of ea ch p i xe l ar r a y r o w r e adout. when the sc ale r i s en abled, the data r a te in the v t clock dom a in becom e s inter m it tent, corr espondin g to the data r e duct ion per f or m e d b y the scaler . a key co nstr aint when configur ing the clock fo r the output fifo is t h at the fr a m e rate out of the fif o mu st ex ac tl y mat c h t h e f r ame r a te i n to t h e f i fo . w h en the sc ale r i s disabled, this con s traint can be m e t b y im posi ng the rule that the r o w tim e on the s e rial da ta str e a m must be gr eater th an or eq ua l t o t h e r o w time at th e pixel arr a y . the ro w tim e on the ser i al data str e am is calculated f r o m the x_ output _size and t h e data_f or m a t (8, 10, o r 1 2 b i t s p e r p i x e l ) , a n d m u s t i n c l u d e t h e t i m e t a k e n i n t h e s e r i a l d a t a s t r e a m f o r s t a r t o f fr ame/ r o w , end of r o w/ fr am e and che c ksum symb ols . c a u tion if this constraint is not met, the fifo will either underrun or overrun. fifo underrun or overrun is a fatal erro r con d i t i o n th at i s si g n a l l ed th rou g h th e d a ta p a th_ s t a tu s r e g i ster (r 0 x 3 0 6 a ) . c h a n g i n g r e g i s t e r s w h ile s t re a m in g the foll o w ing r e gi st ers s h ould only b e r e pr ogr a mm ed whil e the s e nsor is i n s o ftwar e st and b y : ?v t _p i x _c l k_d i v ? v t_sys_cl k_di v ? p r e _ p ll _c lk_ d i v ? p ll_multip l ier ? o p_ pix_ clk_div ?o p _ s ys _c l k_d i v pr ogr a m m i ng res t r i ct i o ns w h en u s i n g g l obal re s e t i n ter a ctions be twe e n the r egi ster s that co ntr o l the glob a l r e set impose s some pr ogr a m- m i ng r e s t r i c t ion s on t h e way in whic h the y ar e use d ; thes e ar e di sc usse d in "g l o b a l r e set" on p a ge 52.
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 31 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y c o n tro l o f th e s i g n a l i n te rfa c e this se ction des c ri bes the ope r ati o n of the signal inter f ace in all functiona l modes . s e ria l r e g i ste r in te rfa c e the s e ri al r e g i s t e r interface use s the se si gnals : ?s c l k ?s da ta ?s ad dr (through the gpi pad) sclk i s an i n put-onl y s i gnal and mus t always be dri v en to a v a li d log i c l e v e l for corr ect oper ation; i f the drivi n g dev i ce c a n place th is s i g n al i n h i gh-z, an external pull -up r e si stor should b e connected on thi s sig n al. s da ta is a bid i r e c t i o nal sig n al. a n ex te r n al pul l -up r e si stor should b e c o nne c ted on thi s si g n al. s ad dr is a signal, which can be optionally ena b le d and contr o ll ed b y a gp i pad, to s e l e ct an alter n ate slav e addr ess . these slave ad dr e s s e s can al so be pr ogr a mme d thr o ug h r0x3 1fc. this i n terface i s de scri bed i n d e tail i n "t wo-w ir e s e rial r e gi ster i n te r f ac e" on page 23. p a rallel p i x e l d a ta in te rfa c e the par a ll el pi xel data i n te rfac e uses thes e ou tput-onl y si gnals : ?f v ?l v ?p i x c l k ?d ou t [1 1:0] the par a ll el pi xel data i n te rfac e is di sab l e d b y default at po w e r up an d after r e set. i t can be enabled b y p r ogr a mming r0x3 01a. t a ble 10 on p a ge 32 sho w s the r e commended se tt ing s . whe n the par a l lel pi xel d a ta interface is i n us e , the s e rial d a ta output s i g n al s can b e le ft unconnec t ed. s e t r e se t_r e g i ster [12] to di sabl e the s e rial iz e r whi l e i n para ll el output mod e . ou t p u t e n a b l e c o n t r o l whe n the par a l lel pi xel d a ta interface is e n ab le d, its si gnals can be swi t ched asynchr o - nousl y b e tw ee n the d r iv en and h i gh-z unde r pi n or r e gis t er contr o l, as s h o w n i n t a bl e 9. s e lect ion of a pin to use for th e oe_n functi on is de scri be d in "gene r al p u rpose i n puts" on page 35. tab l e 9: o u t p ut enabl e co nt r o l oe_n pin d r i ve signals r0x301aCb[6] de s c r i p t i o n di sabl ed 0 i nt er f ac e h i gh- z di sabl ed 1 i nt er fac e dr i v en 10 i n t e r f a c e h i g h - z x1 i n t e r f a c e d r i v e n 0x i n t e r f a c e d r i v e n
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 32 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y c o n f ig u r a t i o n o f th e p i xe l d a ta in terface f i el ds in r0x301a ar e u s ed to c o nfi g ur e the oper ation of the pixel data inter f ace . the s u pporte d comb inations ar e sho w n in t a bl e 1 0. table 10: configuration of the pixel data interface serializer disable r0x301 aCb[12] parallel enable r0x301aCb[7] standby end-of-frame r0x301aCb[4] description 00 1 p o w e r u p d e f a u l t . ser i al pi xe l dat a i n t e r f ace an d i t s c l oc ks ar e enabl e d. tr ansi t i on s to soft s t andby ar e sy n c hr oni z e d to t h e end of f r am e s on t h e ser i al pi xel data i n t er f ac e. 1 1 0 p a r a lle l p i x e l d a ta in te rfa c e , s e n s o r c o r e d a ta o u tp u t . s e r i a l p i x e l d a t a in te rf a c e and i t s cl ocks d i s a b l ed to save po w e r . tr ansi t i o n s t o so f t st and b y are s y nc h r oni z ed t o t h e end of t h e c u r r ent r o w r e adou t on t h e par a l l e l pi xel data in te r f a c e . 1 1 1 p a r a lle l p i x e l d a ta in te rfa c e , s e n s o r c o r e d a ta o u tp u t . s e r i a l p i x e l d a t a in te rf a c e and i t s cl ocks d i s a b l ed to save po w e r . tr ansi t i o n s t o so f t st and b y are sy n c h r o n iz e d to th e e n d o f fra m e s in th e p a ra lle l p i x e l d a ta in te r f a c e .
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 33 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y sys t em st at es the s y stem state s of the MT9J003 ar e r e pr e s ented as a state diagr a m in f i gur e 24 and d e sc ribe d in subs equent s e cti o ns . the effec t of reset_bar on the system state and the co nfig ur ati o n of t h e pll in the d i ff er ent s t at es ar e s h o w n i n t a b l e 11 on p a ge 3 4 . the sensor ? s op er ation is broken do wn into thr ee se par a te state s : har d war e stand b y , so ftwar e standb y , and str e amin g. the tr an si ti on b e tw ee n these s t ates mi ght take a cer t ain amount of clo c k cy c les as outli n ed in t a bl e 1 1. figure 24: MT9J003 system states powered off streaming po w e r e d o n po r = 1 r e s e t _ b a r t r ans i t i ons 1 - > 0 ( as y nc hr onous f r om any s t at e ) init ia liz a t i o n tim e o u t tw o-wire serial interface write mode_select = 0 p ll loc k p ll l o c k ed software reset initiated (synchronous from any state) wait for frame end software standby tw o-wire serial interface write mode_select = 1 tw o-wire serial interface write software_reset = 1 internal initialization hardware standby 2400 extclk cycles reset_bar = 0 por = 0 reset_bar = 1 pll not locked por active (only if por is on sensor) power supplies turned off (asychronous from any state) frame in progress
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 34 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y n o te : v c o = v o lt a g e -c o n tro lle d o s c illa to r. p o w e r-o n r e set se q u en ce wh en po wer is applied to the m t 9j 003 , it en ters a lo w-p o wer har d war e standb y state . e x i t f r om thi s st ate i s contr o ll ed b y the l a te r of two ev ent s : 1. the ne gation of the reset_b a r i n put. 2 . a tim e out of the inter nal p o wer - on r e set cir c uit . i t i s pos sib le t o hol d reset _ bar perm ane n tl y de - a s se r t e d and r ely upon the i n te rnal p o w e r- o n r e s e t c i rc u i t . wh en reset_bar is asser t ed it asynchronous ly r e set s the sen s or , tr uncating any fr am e that is in progr e ss . whe n the sens or l e av es the har d war e standb y st ate it per f or ms an in ternal i n itial i zation seq u ence tha t t akes 240 0 ext c lk cy cles . af ter this , it en ters a lo w-po wer softwar e st and b y s t ate . w h il e the i n it ial i zat i on s e q u enc e i s in prog r e ss , the m t 9j 003 wil l not r e spond to read tr ansac t i o ns on its two-wi r e ser i al inter f ace . ther ef or e , a metho d to d e termi n e w h e n the ini t i a li zati on s e quence has compl e ted i s to pol l a s e nsor r egi ster; for exa m p l e , r0 x0000 . w h ile the initia liza tion seq u ence is in progr e ss , the sensor will not r e spond to its de vic e ad dr es s and reads fr om the s e nsor wi ll r e sul t i n a na ck on the two-w i r e s e ri al interface bus . when the se qu e n ce has comple te d, read s wil l r e turn the oper ational v a lue for the r egi ster (0x 2 800 if r0x0000 is r e ad). whe n the sens or l e av es s o ftwar e s t and b y m o de and enables the v c o , an inter n al delay wi ll ke ep the pl l di sc onne cted for up to 1ms s o that the pl l can loc k . the v c o loc k tim e is 2 00s(t ypical) , 1ms (maximum). s o f t r e set s e q u en ce the MT9J003 can b e r e set under softwar e c o ntro l b y writi n g ?1? to s o ftwar e _r es et (r0 x 010 3). a softwar e r e set asynchronously r e set s the sen s or , tr uncating any fr am e t h at is in progr e ss . th e sensor star ts the inter n al in itialization sequence , while the pll and analog blocks ar e tur n ed off. a t this point, the be havi or is exac tl y the same as for the po w e r - on r e set sequenc e . si g n al state d u ri n g r e set t a b l e 12 on page 35 sho w s the state of the si gnal in ter f ace dur i ng har d war e standb y (res et _b ar asser t ed) and th e default stat e du r i ng softwar e standb y . afte r e x it fr om har d war e s t andb y and be for e any r e gi sters wi thi n the sens or hav e be en c h ang e d fr om their default p o wer - up values . t a bl e 1 1 : r e set _ b a r an d p ll i n s y ste m s t ates state extclks pll po w e r e d o f f x vco powered down por ac t i ve x ha r d wa r e s t a n d b y 0 in te rn a l in itia liz a t io n 1 sof t w a r e st an d b y pll loc k vco pow e r i ng up an d l o c k i n g, pl l output bypas s ed st r e am i n g v co r unn i n g, pll out p ut ac ti ve w a it fo r fra m e e n d
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 35 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y g e ner a l pur p ose i n put s the MT9J003 pr o v id es four g e ner a l purpose i n puts . after r e set, t h e in put pads associ- ated wi th the s e si gnals ar e po w e r e d do wn b y de fault, allo win g the pa ds t o be left discon - ne ct ed /f loat ing . the g e ner a l purpose i n puts ar e e n ab le d b y s e tti n g r e set_r e gi ster[8] (r0x301a). o n ce e n ab le d, al l four i n puts mus t be d r i v en to v a li d logi c le v els b y e x te rnal s i g n al s . the s t ate of the ge ner a l pur p os e inputs c a n be r e ad thr o ugh g p i _ status [3:0] (r0x3026). i n addition, each of the follo w ing function s ca n b e a s s o c i a t e d w i t h n o n e , o n e, o r m o re o f the gener a l p u rp ose inp u ts so that t h e function c a n be di r e ct ly c o ntrol l e d b y a har d war e inp u t: ? o utput enabl e (see ? o utput enab le c o ntr o l ? on page 31) ? t ri gge r (s ee the s e c t i o ns b e l o w) ? s t a nd b y fu nc ti o n s ?s ad dr s e l e cti o n (see ? s e r i a l r e g i s t e r i n terface ? on page 31) the gpi _s t at us r e gi st er is us ed to a s s o c i ate a function with a general purpose inp u t. tabl e 12: si gnal st at e d u r i ng res e t pad name pad type hardware standby sof t w a r e st andby extc l k input e n a b le d . m u s t b e d r iv e n t o a v a lid lo g i c le v e l. res e t_bar (x s h u t d o w n ) g p i[3 : 0 ] p o w e r e d d o w n . c a n b e le f t d i sc o n n e c t e d / f lo a t in g . test enabl ed. m u st be dr i v en to a l o gi c 0 f o r a ser i al cc p2- c onf i gu r ed s ensor , or 1 f o r a s e r i al m i pi - c onfi gur e d se n s or . s c l k e n a b l e d . m u s t b e p u lle d u p o r d r iv e n to a v a lid lo g i c le v e l. s dat a i/ o e n a b l e d a s a n in p u t . m u s t b e p u lle d u p o r d r iv e n to a v a lid lo g i c le v e l. lin e _ v a l id out p ut h i gh - z . can be l ef t di sc onnec t ed or f l oat i ng. fram e_vali d d out [11 : 0] pi x c lk sl vs0_ p sl vs0_n sl vs1_ p sl vs1_n sl vs2_ p sl vs2_n sl vs3_ p sl vs3_n cl k_p cl k_n f l ash h i g h- z. l o gi c 0. shu t ter
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 36 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y st r e am i n g/st andby cont r o l the MT9J003 can b e swi t c h ed be tw e e n its so ft standb y and str e aming states under pin or r e gi ster contr o l, as s h o w n in t a bl e 1 3. s e le ction of a pin to use for the st a n dby func- tion is descr i bed in ? g en er al p u rpo s e i n puts ? on page 35. the sta t e diagr am fo r tr an si- tions be tw een soft standb y and str e aming states is sho w n in f i gur e 24 on p a ge 33. trigg e r c o n tro l whe n the gl ob al r e set featu r e is i n us e , the trig ger for the s e que n ce can be ini t iated either under pin or r egister cont r o l, as sho w n in t a ble 14. selection of a p i n t o use for the trigger function is d e sc r i be d in ? g en er al p u rpos e i n p u ts ? on p a ge 35. tabl e 13: st r e am i n g/stand b y st andby streaming r0x301aCb[2] de s c r i p t i o n d i sabl ed 0 s o f t st an db y di sabl ed 1 s t r eam i ng x0 s o f t s t a n d b y 01 s t r e a m i n g 1x s o f t s t a n d b y tab le 14: trigger control tri g ger global trigger r0x3160C1[0] de s c r i pt i o n di s a b l e d 0 i d l e d i s a bl ed 1 t r i gger 00 i d l e x 1 tr i gger 1 x trigger
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 37 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y pll the sensor contains a p ll for timing gener a tion and contro l . t h e pll cont ains a pr es - c a l e r to di vi de the i n pu t cl ock appl ie d on ext clk , a v c o to m u ltipl y the pr esc a le r outp ut , a n d a set of dividers to gener a te t h e outp ut clocks . t h e clocking st r u ct ur e is sh o w n in f i gur e 25. fi g u re 2 5 : c l o c k i n g s t ru ctu r e f i gur e 25 sho w s the di ffer e nt cl ocks and the r egi ster names . i t al so sho w s the d e fault s e tti n g for e a ch di vide r/m u ltipl i e r contr o l r e gi s t er , and the r a nge of le gal v a l u es for each d i vi der / mul t i p li er contr o l r e gi ster . the vt and op sys cl k d i vid e r is har d wi r e d i n the design. the pll default setting s sup p or t the h i spi in ter f ace . f r om th e di agram, the c l o c k fr e q ue nc ie s ca n b e cal c ul ate d for t h e h i spi in te r f ac e us i n g a 15 mhz input clock as follo w s: i n te r n al p i xe l cl oc k us ed to r e adout th e pixel arr a y : (eq 1) exter nal pixel clo c k used t o out p ut the data: (eq 2) in t e r n a l m a s t e r c l o c k: (eq 3) the par a m e ter limit r e gister sp ace cont ains r e gisters th at declar e the minimum and maxi mum all o wabl e v a l u es for : ? t he fr equency all o wab l e on each cloc k. ? t he divisors that ar e used to control each clock. pre _ pll _ clk _ div ( n ) 2 ( 1 - 64 ) pll _ multiplier (m ) 64 ( 32 - 128 ) ext c l k p r e p ll di v ider pll m u lt ip lie r (m ) o p sys cl k divid e r cl k _ p i xe l divider e x t ernal input clock ext_clk_fr eq_mhz op pi x clk divider op _ pix _clk _div 1 2 ( 8 , 1 0 , 1 2 ) row _ speed [ 2 : 0 ] 1 ( 1 , 2 , 4 ) p ll output c l oc k vt sys clk divider 1 ( 1 , 2 , 4, 6 , 8) vt pi x cl k di v i d e r c lk _ op divi d e r 3 (2, 3, 4, 5 , 6,7, 8) row _ speed [ 10 : 8 ] 1 ( 1 , 2 , 4 ) pll input cloc k pll _ ip_clk_freq p ll internal vco frequenc y vt_pi x _clk_div clk_pixe l vt_pi x_clk vt_sys_clk op_sys_clk op_pi x_clk clk_op 1(1, 2, 4, 6, 8) clk_pixel_freq _mhz = ex t_c l k_f r eq_mhz x pll_mul tip lie r pre_ pll_clk_div x vt_p ix_clk_div x row_speed [2: 0 ] ------- ----------------- ---------------- ----------------- ----------------- ----------------- ----------------- ----------------- - = 15 mhz x 6 4 2x 3 x1 ------------- ----------------- -- - = 160 mhz clk_op_freq_mhz = ex t_c l k _freq_mhz x pll_ mu lti plie r pre_pll_clk_div x op_pix_clk _div x ro w_speed [10:8 ] ----------------- ----------------- ---------------- ----------------- ----------------- ----------------- ----------------- --------- -- - = 15 mhz x 64 2x 12 x1 ---------------- ---------------- - = 40 m h z vt_ pix_ c lk_freq_mhz/2
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 38 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or c o n t ro l o f th e s i g n a l in te rfa c e apt i na conf i d ent i al and pr opr i et ar y the fol l o w i n g fac t ors d e termi n e what ar e v a li d va l u es, o r c o m b i n a t i o n s o f va l i d va l u es, for the di vi der / mul t i p li er contr o l r e gi sters : ? t he m i ni mum/ maximu m fr eq uency li mit s for t h e assoc i at ed c l ock must b e met . ? pl l_i p _cl k _fr e q mu st be i n the r a ng e 6? 48 mhz. h i ghe r fr equenci e s ar e pr eferr e d . ?p l l i n t e r n a l v c o f r e q u e n c y m u s t be in the r a nge 384 ?768 mhz. t h e m i ni mum/ maximu m v a l u e for t h e di vide r/m u lt ipl i e r m u st b e met . ? r ange for m: 32 ?128 . ? r ange for (n): 1? 64. ? t he op_p ix_clk must never r u n faster than the vt _pix_clk to ensur e that the output da ta str e am is c o nt ig uous . whe n us ing the h i spi se rial i n te r f ac e , the op _p i x _c lk m u st b e 1/ 4 of the vt_pix_clk. ? t he op _p ix _c lk _ d iv d i vi de r mus t mat c h t h e b i t-depth of the i m age when usi n g h i sp i. f o r exa m p l e , op_ p ix_ c lk_div m u st be set to 12 for a 12- bit h i spi outp ut. the is not r e quir ed when usi n g the par a l l e l interface . ? w he n us ing the par a ll el i n te rfac e , the op_p ix_clk must be half o f t h e vt_p ix_clk . ? t he output line tim e (including the nece ssar y blanking ) mus t be outpu t in a tim e eq ual to or less th an t h e time defi ned b y li ne_le n g t h_pck. al thoug h the pll v c o i n put fr equency r a ng e is adv e rti s ed as 6?48 mhz, superior performance i s ob tai n ed b y ke eping the v c o input fr e q ue ncy as hi gh as possi bl e . the u s age of the output c l oc ks i s sho wn b elo w: ? c lk_pi x el i s use d b y the sens or c o r e to contr o l the ti ming of the pi xel ar r a y . the se nsor co r e prod uc es on e 12- bi t p i xe l eac h vt_pi x _c lk pe r i od. th e li ne le ng th (line_length_ p ck) and fine int e gr at ion time ( f ine _i n te gratio n_ti m e ) ar e con t roll ed i n i n cr e m ents of the cl k_pixe l pe riod. ? c l k_ o p i s us ed t o l o ad parallel p i xe l dat a from t h e outp ut f i f o . t h e outp ut f i f o gener a tes one p i xel ea ch op_p ix_clk p e r i od. an exampl e of the par a ll el confi g ur ati o n for th e pll w i ll uses an input clock of 10 m h z, an inter n al pixel clock of 160 m h z , a n d an ou tp ut clock of 80 mhz. i n t h is con f igur ation: n = 1 m = 64 vt_sys_ c lk_div = 2 op _sys_ c lk_div = 1 vt_pix_clk_ d iv = 2 op _pix_clk_ d iv = 8 i n te r n al p i xe l cl oc k us ed to r e adout th e pixel arr a y : (eq 4) the exte r n al p i xe l cl oc k us ed to o u tput the data : pr ogr a m m i n g t h e pl l d i vi sor s the p ll di vis o rs must be pr ogr a mme d w h i l e the mt 9j0 03 is in t h e softwar e st andb y st ate . after p r ogr a m m i ng the divisors , wait for the v c o loc k time b e for e e n ab li ng the pl l. the pll i s e n able d b y ente ring the s t r e am ing state . clk_pixel_freq _mhz = ex t_c l k_f r eq_mhz x pll_mul tip lie r pre_ pll_clk_div x vt_p ix_clk_div x row_speed [2: 0] ------- ----------------- ---------------- ----------------- ----------------- ----------------- ----------------- ----------------- - = 10 mhz x 6 4 122 u u ------------- ----------------- -- - = 160 mhz clk_op_freq_mhz = ex t_c l k _freq_mhz x pll_ mu lti plie r pre_pll_clk_div x op_pix_clk _div x ro w_speed [10:8 ] ----------------- ----------------- ---------------- ----------------- ----------------- ----------------- ----------------- --------- -- - = 10 mhz x 64 1 x 1 x 8 ---------------- ---------------- - = 80 m h z
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 39 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or fe atu r e s apt i na conf i d ent i al and pr opr i et ar y a n e x te r n al t i m e r wil l ne ed t o d e lay th e ent r ance of the s t r e am ing mode b y 1 mi ll is econd so th at t h e pl l can lo ck. the e ffect of pr ogr a mmi ng the pll d i vi sors whi l e the MT9J003 is i n the str e aming state is un de fine d . cl oc k cont r o l the MT9J003 use s an aggr es si ve c l oc k-gating me thod ology to r e duce po w e r cons ump- tion. the cl ocked l o g i c i s di vide d into a numbe r of separ a te d o mains , e a ch of whic h i s only cl oc ked when r e qui r ed . wh en the m t 9j 003 enters a lo w-po wer stat e , a l most all of the inter n al clocks ar e s t opped. the only ex ce pti o n is that a s m al l a m ou nt of lo g i c i s c l o c ke d so t h a t t h e two- wir e ser i al inter f ace continues to r e spo nd to read and w r it e r e q u ests . fe atures sc al er the MT9J003 se ns or i n cl ude s s c al ing capabi li ti es . this al lo ws the u s er to ge ner a te ful l fi eld -of-vi ew , lo w r e solu ti on i m ages . sc ali n g i s adv a ntageous b e caus e i t us es all pi xel v a l u es to cal c ul ate the output i m age whi c h he lp s to av oid aliasing. i t is also mor e conv e- nient than binnin g because the scale factor v a rie s s m oothl y and the u s er is not li mited to cer t ain r a tios of siz e r e solution. the s c al ing factor i s pr ogr a mmabl e in 1/ 16 steps . (eq 5) scale_n is fixed at 16. scale_m is adjustable with r0x0404 l egal v a l u es for m ar e 16 thr o ug h 128. the use r has the ab il ity to s c ale fr om 1:1 ( m = 1 6) to 1 :8 ( m = 128 ). sh adi n g correct i o n l e nse s tend to pr od uce im ages whose b r ight ne ss i s s i g n if ic antl y a ttenuated near th e ed g e s . t h er e ar e als o othe r fac t ors c a us ing c o lo r pl ane nonuni for m it y in im ag es c a ptur e d b y i m age s e nsors . the cum u lativ e r e sul t of al l the s e factors is kno w n as im age sh ading. t h e mt 9j00 3 h a s an embedded shadi n g corr ecti on modu le that can b e progr a m m ed to counter th e shading ef fects on eac h ind i vi dual r e d, g r e e nb , g r e e nr, and b l ue color si gnal . th e c o rre ctio n fu n c tio n c o l o r - depe nd ent s o lutions ar e c a li br ate d usi n g the se nsor , l e ns sys t e m and an i m age of an e v enly il lum i nated, featu r el es s gr ay ca li br a t io n fi el d. f r om the r e s u lti n g i m a g e , r egi ster v a l u es for the col o r c o r r e c tion func ti on (coeffi ci ents) c a n be de riv e d . the corr ection functions can then be app l ie d to each pixe l v a l u e to equali z e the r e sponse acr o ss the i m age as foll o w s: (eq 6) scalefactor = scale_n scale_ m -------------------- - = 16 scale_ m ------------ -------- - pcor rected row, c ol = psenso r(row,col) * f(row,col)
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 40 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or fe atu r e s apt i na conf i d ent i al and pr opr i et ar y wher e p ar e th e pi xel val u es and f is the c o l o r d e pend ent corr ec ti on functions for eac h co lor c h ann e l . eac h func ti on i n c l ud es a s e t of co lor - d e pe nd en t c o e ffic i ent s de fi ned b y r e gi st ers r0x3 600 ?372 6. t h e function 's or igin is th e cent er point of the function used in the calcu- lation of the coefficients . u s ing an or igin near th e centr a l point of symmetr y of the s e nsor r e sponse pr o v i d e s the be st r e s u lts . th e cent er point o f the function is det e r m ined b y orig in_c ( r 0x3 782) and origin_ r ( r 0x37 84) and can be used to coun ter an o ffset i n the system le ns fr om the center of the se ns or ar r a y . o n e - t i me p r o g r a mma b l e me mo r y the mt9 j 003 has a two- b y te o t p mem or y that can be util iz e d duri ng m o d u le m a nufac- turing to s t or e speci f ic i n form ati o n about the modul e . this featur e pr o v i d es s y s t em inte- grators and module manuf a ctur ers the abilit y to lab e l and di stingu ish v a rious modu le typ e s based on lens , ir -cut filter , or oth e r p r oper ties . d u ri ng the pr ogr a mm ing pr oces s , a de dic a te d pi n for hig h v o ltage ne eds to b e pr o v id ed to per f or m the anti-fusin g oper ation. this v oltage ( v pp ) would n e ed to be 8.5v + 3% . in s t a n t a n e o u s v pp c a nnot e x ce ed 9v at any ti me . the comple ti on of the pr ogr a mmi ng pr oce ss wi ll be c o mmuni cated b y a r egi ster thr o ugh the two-wi r e s e rial i n te rfac e . b e caus e thi s pr og r a m m ing pin need s to sus t ai n a hi ghe r v o l t ag e than other input/ outpu t pi ns , havi ng a de dic a te d high v o ltage pin ( v pp ) m i ni miz e s the d e si gn r i sk. i f the mod u le manufacturing pr oce s s can pr ob e the s e nsor at the d i e or pcb le v e l (that i s , sup p ly al l the p o wer r a il s , c l o c k s , two- wir e se rial i n te rfac e si gnals ) , the n this de di cated hi gh v o l t ag e pi n d o es not need to be ass i gne d to the m o d u le c o nne c tor pi nou t . h o w e v e r , if the v pp pin needs to be bonded out as a pin on the modu le , the tr ace for v pp need s to c a r r y a m a ximum of 1ma i s ne ed ed for pr ogr a mm ing only . this pin should b e le ft fl oati ng once the modul e is i n te gr ate d to a d e si gn. if the v pp pin does not need to be b o nd ed-out as a pi n on the modul e , i t should b e le ft fl oati ng ins i de the modul e . the pr og r a m m ing of the o t p me mor y r e quir es the sens or to b e ful l y po w e r e d and r e m a in in s o ftwar e st and b y wit h i t s c l oc k input ap pli e d . the i n for m at ion wil l be progr a m m ed th r o ugh the use of the two - wir e ser i al inter f ace , and once the data is wr it te n t o an int e r n al r e gi s t er , the p r o g r a m m i n g hos t m a c h in e wil l a ppl y a hi gh vol t ag e to the p r ogr a m m i ng pin, an d send a p r ogr a m co mmand to initiate the anti-f using pr oce s s . af te r the sens or has finis h ed pr og r a m m ing the o t p mem o r y , a s t atus b i t wil l b e set to indicat e the end of the p r ogr a m m i ng c y cle , and the hos t mac h i n e can poll the sett ing o f th e st atus bit through t h e two- wi r e s e ria l i n t e rf a c e . o n ly o n e p r o g r a mm in g c yc le for the 16-bi t wor d can b e pe r f orme d. r e a d ing the o t p m e mor y data r e quir es the se ns or to b e fu ll y po w e r e d and oper ational wi th it s cl ock i n pu t appl ied . t h e dat a can be r e ad thr o ug h a r e g i s t e r f r om t h e two- wi r e s e ria l i n te rfa c e . the s t e p s b e l o w de sc r i be the pr oc es s to pr og r a m and ve rify the pr og r a mmed d a ta in the ot p m e m o r y : 1 . a pply po wer to all the po wer r a ils of the sen s or ( v dd , v dd _io , v aa , v aa _p i x , v dd _pll, and vdd_t x 0). 1a. s et v aa to 3.1v dur i ng o t p memor y progra mming phase . 1b . v pp nee d s to be fl oate d during this phase . 1c . o ther supplies at nomina l. 2. p r o v i d e 24 mhz ex t c l k c l oc k input. the pl l setting s ar e di sc usse d at the e n d of the do cum e nt.
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 41 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or fe atu r e s apt i na conf i d ent i al and pr opr i et ar y 3. p e r f orm the pr oper r e se t se quenc e to the s e nsor . 4 . plac e th e se ns or i n s o ft st and b y (s ens o r default state upon po w e r - up) or en sur e the s t r e am ing i s tur n ed o f f w h e n th e par t i s in act i ve m o d e . 5. v pp r a mps t o 8. 5v in pr ep ar ation to progr a m. p o wer sup ply ( v pp ) slew r a te should be sl o w er than 1v/s . 6 . p r ogr a m r0x3 052 to the va lue 0x0 45c. 7 . p r ogr a m r0x3 054 to the va lue 0xea99 . 8 . w r ite the 16 bit wor d data b y progr am m i ng r0 x304 c. 9 . i n itia te the o t p memo r y progr a mming p r o c ess b y progr a mming r0 x304a[0] to the value 0 x 000 1. 10 . c heck r0 x3 04a [2] = 1, until bit is set to ?1? t o check for p r ogr a m comp letio n . 11 . r ep eat s t e p s 9 and 1 0 t w o m o r e tim e s . 12. r e m o v e hi gh v o l t ag e and fl oat v pp pin. 13. p o w er d o w n the s e nsor . 14. a pply nom i nal po w e r to all the po w e r r a i l s of the se ns or v dd , v dd _io , v aa , v aa _pix and v dd _pl l ) . v pp mus t be fl oate d. 15 . s e t ext c lk t o no r m a l or c u s t om er de fi ned oper ating fr e q ue nc y . 1 6 . p e r f o rm the pr oper r e se t se quenc e to the s e nsor . 17. i niti ate the o t p mem o r y r e adi n g pr oc ess b y se tti n g r0x304a[4] to the v a l u e 0x0010. 18. p ol l the r egi ster bi t r0x304a[6] until bit set t o ? 1? to check fo r r e ad com p letion. 19 . r ea d the 16 bit wor d dat a f r om the r0 x304 e. f i g u re 2 6 : s e q u e n ce fo r p r o g ra m m in g th e m t 9 j 0 0 3 p o wer supplies r eset_b ar ext c l k sc lk/sd a t a v pp inf orma t ion to be initia te pr ogr amming r ead pr ogr ammed pr ogr ammed to the r egister . and poll sta tus bit . v alues f or sta tus.
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 42 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y sens or readout conf i g ur at i o n i m ag e a c qu i s i t i o n m odes the MT9J003 suppor t s two image acquisitio n modes: 1 . e l ect r o n ic rolling sh utter (er s ) mode this is the nor m al mode of oper ation. wh en the MT9J003 i s str e aming ; i t ge ne r a te s fr ames at a fixe d r a te , and eac h fr am e i s i n te gr ated (e xpos ed ) u s ing the ers. whe n the ers i s in use , tim i ng and contr o l logi c wi thin th e sensor seq u en c e s throu g h t h e ro w s of the arr a y , r e setting a n d th en r e ading each r o w in tur n . i n the tim e inter v al between r e setting a ro w and subsequently r e ading tha t r o w , the pi xel s in the r o w i n te gr ate inc i - d e nt l i ght. the integ r ati o n (exposur e ) tim e i s contr o ll ed b y v a r y ing the ti me be tw e e n ro w r e s e t an d r o w r e ad ou t. f o r ea ch ro w i n a fr ame , the time between ro w r e set and ro w r e adout is f i xed, leading to a unifor m integr a t ion tim e across the fr am e . when the i n te gr ati o n tim e is change d (b y us ing the two- w i r e s e r i al i n te r f ac e to cha n ge r e gi st er sett ings), the tim i ng and cont rol logic cont r o ls th e tr ansit i on from old to new in tegr a- tion time in such a wa y that the str e am of out p ut fr ames fr o m the m t 9j 003 switches c leanl y fr om the ol d i n tegr ation ti me to the ne w whi l e only gene r ati n g fr ame s with unif or m integr at ion. s e e ? c han g es to i n tegr ation t i me ? in the m t 9j 003 r e gist er r e f- er e n ce . 2. g l ob al r e s e t m o de this mode c a n be us ed to acqui r e a s i ngl e image at th e curr ent r e solut i on. i n this m o de , t h e en d point o f th e pixel in tegr at ion ti m e is contr o ll ed b y an e x te rnal e l e c tr o- mechanical shutter , and th e MT9J003 p r o v id e s contr o l si gnals to i n te rfac e to that s h u t t e r . t h e o p e r a t i o n o f t h i s m o d e i s d e s c r i b e d i n d e t a i l i n " g l o b a l re s e t " o n p a g e 5 2. the be nefit of usi n g an external e l e c tr omec hani cal shutte r is that it e l i m inates the visual ar tifacts associated with ers oper ation. v i su al ar tifacts ar ise in ers ope r ation, partic u- larly at lo w fr ame r a tes , because an ers image effe ctiv el y i n teg r ate s e a ch r o w of the pi xel arr ay at a dif f er en t p o int in time . w i ndow cont r o l the s e quenci ng of the pi xel arr a y i s cont r o ll ed b y the x_add r _s tart, y_addr _s tart, x_addr_end, and y_addr_end r e gisters . f o r both par a ll el and seri al i n te rfac es , the output im ag e s i ze i s con t roll ed b y the x_o u tput_s iz e and y_output_si z e r e gi sters . pi xel bo r d er t h e d e f a ul t se tt ing s of t h e s e nsor pr o v id e a 38 40h x 2 7 48v image . a bor d er of up to 8 p i x el s (4 in bi nni n g) on e a ch ed ge can b e enab le d b y r e prog r a m m i n g t h e x_ad d r _st a r t , y_a ddr_star t, x_addr_ e nd, y_addr_ e nd, x_ou tp ut_size , and y _outp ut_size r e gist ers accor d ingly . t h is p r o v ides a tot a l active pixel arr a y of 3 856 h x 2764 v includin g bor d er pixels .
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 43 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y readout m odes h o rizo n t a l m i rro r wh en t h e ho r i zont al_ m i r r o r b i t is se t i n the i m age_orie ntation r e g i ste r , the or de r of pi xel re a d o u t w i t h i n a r o w i s re v e r s e d , s o t h a t re ado u t star ts from x_a d dr_end and ends at x_add r _s tart. f i gur e 27 sho ws a s e qu ence of 6 pi xel s bei n g r e ad out with hor i z o ntal_mirror = 0 and h o r i z o ntal_mirr o r = 1. changi ng hori z o ntal _m irr o r c a u s es the b a y e r or der of the output image to chan ge; th e new b a y e r or d e r is r e fl ected i n the v a lue of the pixe l_or d e r r e gis t er . f i gur e 27: ef f e c t of hor i zont al m i r r or on readout or de r v e rtic a l f lip wh en the ve r t i c al_f li p b i t i s se t in the i m age _or ie ntat ion r e gi s t er , the o r d e r in whic h pixe l r o ws ar e r e ad out i s r e v e r s ed , so that ro w r e ad out s t ar ts from y_a dd r_e n d an d e n ds at y_addr_st a r t . f i gur e 2 8 sho w s a seq u ence of 6 r o ws being r e ad out with v e r t ical_flip = 0 and v e r t ica l _f lip = 1. ch anging v e rtic al_fli p caus es the b a y e r or d e r of the outpu t im ag e to change ; the ne w b a ye r or der i s r e fl ec te d in the v a lu e of the pixe l_or d e r r egi ster . f i gur e 28: ef f e c t of ve r t i c al fl i p on readout o r de r g0[11:0] r0[11:0] g1[11:0] r1[11:0] g2[11:0] r2[11:0] r2[11:0] g2[11:0] r1[11:0] g1[11:0] r0[11:0] g0[11:0] li n e_v ali d horiz on tal_mirr or = 0 d ou t [11:0] horiz on tal_mirr or = 1 d ou t [11:0] row0[11:0] r ow1[11:0] r ow2[11:0] r ow3[11:0] r ow4[11:0] r ow5[11:0] r ow5[11:0] r ow4[11:0] r ow3[11:0] r ow2[11:0] r ow0[11:0] fr ame_v ali d v er tical_flip = 0 d ou t [11:0] v er tical_flip = 1 d ou t [11:0] row1[11:0]
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 44 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y subs am pl i n g the m t 9j 003 suppor t s subsamp l ing. this featur e allo ws the sen s or to r e a d out a sa mp le of pi xel s av ai lab le on the arr a y . the most common subs ampli n g us ed i s either a 2x2 or 4x4 wher e ever y 2nd or 4t h pixel is r e ad in t h e x a n d y dir e ct ion. fi g u re 2 9 : p i x e l a r ray r e a d ou t w i tho u t s u bsa m p l i n g a n d w i th 2 x 2 s k i p pi n g pixel skipping can be co nf ig ur e d up t o 4 x i n th e x-d i r e c t i o n an d 32x in the y - di r e c t io n. s k i ppi ng pi xel s in the x- di r e c t ion wil l r e d u ce t h e ro w-ti m e whil e sk ipp i ng i n t h e y - di r e c- tion will r e duce the number of ro ws r e adout fr om the sensor . s k ip pin g in both dir e ctions w i l l r e duc e th e fr am e- tim e an d is a co mm on m e t h od use d to i n cr eas e th e se ns or fr a m e - r a te . s k ip ping will introduce image ar tifacts from aliasin g . figure 30: combinations of pixel skipping in the MT9J003 sensor full resolution 2 x 2 skipping skip 2x sk ip 4x sk ip 32x, 16x, or 8x
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 45 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y the s u bs ampl i n g fe atur e can al so b i n or s u m the ski p ped pi xel s . pixe l bi nni n g wil l s a m p l e pi xel s and av e r ag e the v a l u e toge the r in the analog domai n . s u mmi ng wil l add the char ge or v o ltage v a lue s of the ne ig hboring pixe ls together . f i g u re 3 1 : p i x e l b i n n in g a n d s u m m i n g t h e pi xel s u mmi ng m u st b e done with adjace nt pixels within the s a me color plane . the pixel binning can be configur ed to combine ad j a ce nt pi xel s or to c o m b i n e ever y othe r pixel. the pixel subsampling can be configur ed as a combination o f skipping and binning or sum m i n g . thi s ty pe of sub s a m p l i n g is t y pi cal l y us ed to a c hi eve the b e s t co mb ina t io n of pixe l r e sponsiv i ty and fr am e r a te . the s u mmi ng and skipping impl em en tation will sum neighboring pixels on the same color plane and skip over the adjacent group of pixels. figure 32 on page 46 shows that neighborin g pixels are summed together. in the case that a subsampling factor of 4x or greater is used with summing, the neighboring pixels will also be summed together. 2x2 binning or summing v v e - e - summing avg avg avg avg binning
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 46 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y f i g u re 3 2 : p i x e l s k i p p i n g c o m b in e d w i t h s u m m in g o r b i n n in g t a bl e 1 5 s h o w s the d i ffer e nt c o m b inat ions o f subsampling av aila bl e with the mt9 j 003 s e nsor . the se nsor cannot comb ine pixe ls usi n g two di ffe r e n t methods i n the same di r e c t io n. t h is m e ans tha t b i n - xy and sum - y ar e not v alid combinations with th e sensor . as w e ll , the bin-xy i s li mi te d to a sk ip of 4x in the ve r t i c a l di r e ct ion. t a b le 1 5 : s u b s a m p lin g c o m b in a t i o n s sk i p y skip x bin x bin xy sum x su m x y 1 1CCCC 2yCyC 4yCyC 2 1CCC y 2 yyyy 4 yyyy 4 1CCC y 2 yyyy 4 yyyy 8 1CCC y 2yCy y 4yCy y 16 1CCC y 2yCy y 4yCy y 32 1CCC y 2yCy y 4yCy y
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 47 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y fram e r a te c o n tro l the fr ame - ti me is c a l c ul ate d as the r o w-time mul t ipli ed b y the num b er of r o ws (fr a me _l eng t h_ li nes ) . th e r o w -ti me i s r e fe rr e d to in the s e cal c ul ati o ns as t h e num b e r of pi xel c l oc ks r e a d pe r ro w ( l in e_ le ngt h _pc k ) m u lt ipl i e d b y th e vt_p ix_c lk fr eq uen c y . the for m ulas fo r ca lculat ing t h e fr ame r a t e of t h e mt 9j0 03 ar e sho w n belo w . the lin e le ng th i s prog r a m m e d i n p i xe l cl oc k p e r i od s throug h th e r e gi s t er l i ne_l ength_pc k. the mi nim u m v a l u e can b e dete r m ined as the lar g est v a l u e found i n e q uati on 7. these ar e the r e quir ed v a lue s for e i ther the arr a y r e adout or the bandwi dth av ailable to the par a llel or ser i al inter f ace . abs o l u t e m i ni m u m ar r a y li ne l e ngt h pck mi nim u m l i ne _l eng t h_pck = mi n_l i ne_l ength_pc k (see t a b l e 16, ? m ini m um r o w t i me and b l an king n u mbers , ? on p age 48) ar r a y re adout l i ne le ngt h p c k (eq 7) i n t e r f ace li ne lengt h pc k (eq 8) (eq 9) n o te t h at li ne_ l e n gt h_pc k wil l be t h e m a xi mum of the thr ee equati ons . the s e cond eq uation descr i bes the lim i tations from the r e adout of the pixel arr a y while the thir d de te r m in es t h e fr am e - r a te of t h e output i n terface . the fr am e-r a te usi n g h i spi wi ll al ways b e hig h er than usi n g the par a ll el in terface . v a lue s for m i n_li ne_bl a nki n g_pc k ar e pro v id e d in ? m i n im um r o w t i m e ? on pag e 48. the fr ame l e ngth i s pr ogr a mme d dir e c t l y i n numb er of l i nes i n the r e gis t er fr ame_l i ne_l ength. f o r a speci f ic wi ndo w si z e , the mi nimu m frame l e ngt h i s sho w n i n equat i on 10: (eq 1 0) the fr ame r a te can b e c a lc ulated fr om the s e v a riab les and the pi xel c l ock speed as sh o w n i n eq uati on 1 1 : (eq 1 1) if coars e _int eg r a t i on_ t im e i s se t larg er than fr am e _le ng th_l in es t h e fr am e s i ze wi ll b e expanded to coarse_integr ation_time + 1. x_addr_end x_addr_start ? x_odd_inc + 2x x_odd_inc 1 + 2 ------------------ ---------------- - ?1 --------------------- ---------------------- --------------------- --------------------- ----------- - m i n_l i ne _bl ank i ng_pck + x_output_size op_pix_clk vt_pix_clk -------------- ----------- - ?1 30 (for parallel) + x_output_size 4 --------------- ----------------- - ?1 op_pix_clk vt_pix_clk -------------- ----------- - 30 (for hispi) + mi ni mum frame_length_lines y_addr_end - y_addr_start 1 + subsampling factor -------------------- --------------------- ------------------ ---------------- - m in_frame_blanking_lines + ?1 = f rame ra te v t _pixel_clock_mhz x 1 x 10 6 l i n e _length_pck_x frame_length_lines ------------------ ---------------------- ----------------- ------------------ ----------------- - =
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 48 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y mi n i mu m r o w t i me the m i ni mum r o w ti me and b l anking v a l u es with defaul t r e gi ster se tting s ar e sho w n in ta b l e 1 6 . i n addition, enough t i m e must be given to the outp ut fifo so it can output all data at the set fr eq uency within one ro w t i m e . the r e ar e t h er ef or e t h r e e c h ec ks t h at mus t all b e m e t w h e n p r ogr a mm i n g l i ne_l ength_pc k: 1. l i ne_l ength_pc k> min_line_length_pck in t a ble 1 6. 2 . line_length_p c k > 0.5*(x_a ddr_en d - x_ addr _star t + x_odd_inc)/((1 +x_ o dd_inc)/2 ) + min_lin e _blanking_pck in t a ble 1 6. 3 . the r o w time must allo w t h e fi fo to o u tput all data dur i ng each ro w . p a r a ll el - l i ne _leng t h_pck > (x_output_si ze) * ? v t_pix_clk per i o d ? / ? o p_ pix_ clk per i o d ? + 0 x 005e. h i spi (4 - l ane) - li ne_ l e n gt h_pck > ( 1 /4 )* ( x _out put_ si z e ) * ? v t_ pix_ cl k peri od ? / ? o p_ pix_ clk p e r i od ? + 0x00 5e. mini mu m f r a m e t i me the m i ni mum numbe r of r o ws in the i m age i s 2, s o m i n_fr ame _leng t h_l i nes wi ll al ways eq ual (min _fr a me_blank ing_lines + 2 ) . fi ne i n t e gr at i o n ti m e li m i t s the l i mits for the fine_i nte g r a ti on_ti m e ca n be foun d from fine _integr ation_ ti me _m in and fine_i nte g r a ti on_t i m e_max_mar g in. v a lue s for di ffer e nt mode c o mbi n ati o ns ar e sh o w n i n t a b l e 1 8. fi ne cor r e cti o n f o r the fi ne_integ r a ti on_tim e li mits , the fine _corr e ction constant will change with the pixe l cl ock s p e e d and bi nni n g mode . these v a l u es ar e s h o w n in t a bl e 19. t a b l e 1 6 : mi n i mu m r o w t i me a n d b l a n k i n g nu m b e r s register no row binning row b i nni ng r o w _ s p e e d [ 2 : 0 ] 1 24 12 4 m i n_l i n e_b l ank i ng_p c k 0x 046e 0x0 29a 0x 01b0 0x 0822 0x 046c 0x 0292 m i n_l i n e_l e ngt h _pc k 0x 06 70 0x 03e0 0 x02 f 0 0 x 0 cc0 0x 06 60 0 x 0 3 d 8 table 1 7 : mi n i mu m f r a m e t i me a n d b l a n k i n g n u mb e r s register m i n_f r am e_ bl anki ng_l i n es 0x 008f m i n_f r am e_l e ngt h _l i n es 0x 0091 tabl e 18: fi ne_i nt egr a t i on_ti m e li m i t s register no row b inning row b i nni ng r o w _ s p e e d [ 2 : 0 ] 1 24 12 4 f i ne_ i nt egr a t i on_t i m e_m i n 0 x 03f 2 0 x0 20a 0x 094 0 x 0 7b2 0x 03ae 0 x 0 1 0 c f i ne_i nt egr a tion_time_max_margin 0x027e 0x012e 0x0108 0x050e 0x0276 0x0224
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 49 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y l o w p o we r mo d e the MT9J003 se ns or s u pports a lo w po w e r mode , whi c h c a n be e n te r e d b y pr ogr a mm ing r egi ster bi t r e ad_mod e[9]. s e tting this bi t wi ll d o the fol l o w i n g: ? d ouble the va lue of pc_speed[2:0] int e r n al ly . this mean s halving the inter n al p i xel cl oc k f r e q ue ncy . ? l o w er curr ents in the analog dom a in. this can be done b y setting a lo w po wer bit in the stati c contr o l r e gis t er . the curr ent wi l l b e hal v e d w h er e app r o p r i a t e in the analo g do mai n . n o t e that e n ab li ng the l o w po w e r mode wi ll not put the sensor in subsam p l in g mo de . this wi ll hav e to be pr ogr a mme d separ a tely as de sc r i be d e a rli e r i n t h is d o c u m e nt . l o w po wer is indepen d ent of the r e adout mode an d can also be enabled in full r e so lution m o de . bec a us e the pi xe l c l ock s p ee d i s halve d , t h e fr am e r a te s tha t c a n be ac hi eve d w i t h l o w po w e r mode ar e lo w e r than i n full po w e r mod e . b e cause only in ter n al pixel clock sp eeds of 1 , 2 , and 4 ar e suppor t ed, lo w po wer mode co mbin ed with pc_sp e ed[2:0] = 4 is an illegal combination. any lim i tations r e lated to changing th e int e r n al pi xel c l ock speed wi ll al so apply to lo w po w e r mode , b e c a use it automatic a ll y change s the pixe l cl ock s p e e d. the r efor e , the l i mi t e r r e gi st ers nee d to be r e pr ogr a mme d t o m a tch the new inter n al p i xel clock fr eq uency . in te g r a t io n t i m e the i n tegr ation (e xpos ur e ) time of the MT9J003 i s contr o ll ed b y the fin e _integr ation_ time and coarse_integr at ion_time r e g i ste rs . the lim i ts for the fine in te gr ation time ar e def i ned b y : fine_int egr a tion_time_mi n < fine_integration_time < (line_ length_p ck ? (eq 1 2 ) fine_int egr a tion_time_max_margin the l i mits for the coars e i n tegr ation ti me ar e d e fine d b y : coarse_integration_time_min < co arse_ i ntegr a tio n _time ( eq 1 3 ) the actual integr atio n time is giv e n b y : (eq 1 4 ) i t is r e q u ir ed that: co ars e _inte g r a tio n _t ime < = ( f r a me _l ength_line s - coa r se_integ r a tio n _time_ma x_margin) ( eq 1 5 ) if this limit is ex ceeded, th e fr am e ti me wi ll aut o m a ti cal l y b e ext e nd e d to ( co ars e _inte g r a tio n _t ime + co arse _inte g a r tio n _t ime_ma x_margin ) to a c com m o d at e the l a r ger i n te gr ation ti me . tabl e 19: fi ne_cor r e ct i o n v a l u es regi st er no row binning row binning row_speed[2:0] 1 24 12 4 f i ne_ c or r e c t i o n 0 x 09c 0x 04 8 0 x 01e 0x 0134 0 x 09 4 0 x 044 i n teg r a tio n_ti m e coa r se_ i nteg ratio n_t ime * line_ leng th_p ck fin e_int e grati on_ tim e + vt_p ix_cl k _freq_m hz*10 6 - ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- - -- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- - =
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 50 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y apt i na g a i n m odel the a p ti na gai n mod e l use s color - speci f ic r e gisters to control both analog and digital g a i n to the se nsor . thes e r e g i s t e r s ar e : ? g l o b a l_ gai n ?g r e e n r _ g a i n ?r e d _ g a i n ? b lue_g a i n ?g r e e n b _ g a i n the r e g i s t e r s pr o v id e thr ee 2x and one 4x anal og gain stage s . the fir s t analog gai n s t ag e has a granular ity of 64 st ep s o v er 2x gain. a d i gi tal gain fr om 1-7x can als o be appli e d. ana l og gain = (8 /(8-g ( co lamp) < 11:9 >) x (1 + colo r_ga in[8 ])(1 + colo r_ga in[7 ])(colo r _ g ain[6: 0]/64) (eq 1 6 ) b i ts 1 1 t o 9 ar e also r e st r i cted to 0, 4, and 6. this li mi ts the parti c ular gai n s t ag e to 4x. as a r e sult of the d i ffer e nt g a in stages , anal og gain le v e l s c a n be ac hiev e d in diffe r e nt ways . the r e com m end e d gai n se que n ce is s h o w n be lo w in t a bl e 20. f l a s h cont r o l the mt 9j0 03 suppo r t s bot h xenon and led fl ash thr o ugh the fl ash output si gnal. the timing of the fl ash signal wit h th e defa ult setting s i s sho w n i n f i gur e 33, and i n f i gur e 34 and f i gur e 35 on pag e 51. the flash and fl ash_count r egi ster s al lo w the ti ming of the fl ash to b e cha n ge d . t h e fla s h ca n b e progr ammed to fir e on ly once , delayed b y a few fr ames when asser t ed, and (for xenon fl as h) the fl as h d u r a ti on can be pr ogr a mme d. e n abl i ng the l e d flas h wil l c a use one bad fr ame , wher e se v e r a l of the r o ws only have the fla s h on for par t o f th eir in tegr at ion time . t h is c a n be a v oid e d ei the r b y fi rst e n ab li ng mas k bad fr ame s (write r e set_r e gi ster[9] = 1) b e for e the e n ab li ng the fl ash or b y for c ing a r e star t (wr i te r e set_r e gister[1] = 1) im m e diat el y after enabl i ng the fl ash; the firs t bad fr ame wi ll then be m a s k ed out, as sho w n in f i gur e 35 on page 51. r e ad -onl y bi t fl as h[14] is set dur i ng fr am es that ar e co rr ectly int egr ated; the s t ate of this bi t i s sho w n i n f i gur e s 3 3 , 3 4, a n d 35. f i gur e 33: xeno n f l as h e n ab l e d tabl e 20: re com m e nded gai n st ages desired gain r e c o m m e nded g a i n regi st er set t i ng 1C 1. 98 0x 1040C 0x1 07f 2C 3. 97 0x 1840C 0x1 87f 4C 7. 94 0x 1c40C 0x1 c 7 f 8C1 5. 87 5 0 x1 c c 0C 0x 1cff 16C31.75 0x1dc0C0x1dff fr ame_v ali d flash s t r ob e sta te of trigger ed bit (r0x3046-7[14])
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 51 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y fi g u r e 34: led fl ash en abl e d n o t es: 1. i n t egr at i o n t i m e = num be r of r o w s i n a f r am e . 2. b a d fr a m e s w ill b e m a s k e d d u rin g l e d fla s h o p e r a t io n w h e n m a s k b a d fra m e s b i t fie l d is s e t (r 0 x 301a[ 9 ] = 1) . 3 . an opt i on t o i n ver t t h e f l ash out p ut si gnal t h r o ugh r0 x3 046[ 7] i s al so avai l a bl e . fi g u r e 35: led fl ash en abl e d fo l l o w i n g f o rce d re star t bad frame fr ame_v ali d flash s t r ob e s ta te of trig ger ed bit (r0x3046-7[14]) flash enabled bad fr ame good fr ame good fr ame flash disabled during this fr ame during this f rame flash enabled masked out good frame good fr ame flash disabled and a r estar t fr ame and a r estar t trigger ed trigger ed fr ame_v ali d flash s t r o b e sta te of trigger ed bit (r0x3046-7[14]) mask ed out fr ame
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 52 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y gl o b a l r e s e t g l obal r e set mode allo ws the in tegr at ion time o f th e mt9 j 00 3 t o be controlled b y an ext e r n al el ec trom e c ha nic a l sh ut te r . gl ob al r e se t m o de i s g e ne r a l l y us ed i n c o nj unc t ion with ers mode . the ers mode is used to pr o v ide vi ewfi nder i n format ion, the sensor is s w itched i n to gl obal r e se t mode to c a ptur e a single fr ame , and the senso r is then r e tur n ed to ers m o de to r e sto r e viewfinder op eratio n. o v er vi ew of g l obal res e t seq u enc e the b a si c ele ments of the gl ob al r e set sequenc e ar e: 1 . b y d e f a ult, th e se ns or ope r at es i n er s m o de and the shut ter output s i g n al is l o w . the e l e c tr ome c hanical s h utter mus t be open to all o w l i g h t to fall on the pixe l ar r a y . i n tegr ation ti me is c o ntr o l l e d b y the coars e _integ r a tion_time and fi ne _i ntegr ation_ti me r egi ster s . 2. a gl obal r e se t se que n c e is trig ger ed . 3. al l of the r o ws of the pi xel arr a y ar e pl aced i n r e se t. 4. al l of the r o ws of the pi xel arr a y ar e taken out of r e set si multaneous ly . al l r o ws start to i n te gr ate i n ci dent l i ght. the e lec tr omec hani cal shutter may b e ope n or clos ed at this time . 5. i f the el ectr om echanic a l shutte r has b een cl osed , i t is opened . 6 . after th e desir e d integr ation t i m e (cont r o lle d inter n ally or exter n ally t o t h e mt 9j0 03), the el ectr ome c hanic a l shutte r i s cl os ed . 7 . a s i ng le output fr am e i s ge ne r a te d b y t h e sensor with the usual l v , fv , p i x c lk, and d ou t timing. as soon as the output fr ame ha s comple ted (f v de -ass erts), the el ectr o- mechanical shutter ma y be opened agai n. 8 . the se ns or autom a t i c a ll y r e sum e s ope r ati o n i n ers m o d e . this seq u ence is sho w n in f i gur e 36. th e fo llo w ing sect ions expa nd to sho w ho w the timing of this seq u e n c e is cont roll ed . f i gur e 36: o v er vi ew of gl obal rese t se quence ent e r i ng and leavi n g t h e gl ob al res e t sequenc e a gl obal r e se t se que n c e can b e tri gge r e d b y a r e gi ster write to gl obal _s eq_trig ger [0] (global tr igger , t o transition this bit from a 0 to a 1) or b y a r i sing edge on a suit- abl y -c onfi gur e d gp i i n put (s ee ? t ri gge r c o ntr o l ? on pag e 36). whe n a gl obal r e s e t se que n c e i s trig ger ed , the se ns or waits for the end of the c u rr e n t r o w . whe n l v d e -as s e r ts for that r o w , f v is de -as s erted 6 p i x c l k pe riod s l a te r , potential l y tr uncating th e fr am e that was in p r ogr e ss . the g l ob al r e s e t s e quence c o mplete s wi th a fr ame r e adout. a t th e end of this r e adout phase , the senso r automatically r e sumes op er ation in ers mode . the fi rs t fr am e inte- g r ated wi th ers wi ll b e gene r ated after a d elay of appr o x i m atel y : ((1 3 + co arse _inte g r a tion_time) * line_ l ength_p c k). this se que n ce is s h o w n in f i g u r e 37. ers e rs r ow r eset in tegr a tion r eadout
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 53 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y wh il e ope r ati n g in ers m o de , d o ub le -b uf fer e d r e gisters ar e updated at the star t of each fr ame in the us ual way . d u ring the g l ob al r e s e t s e quence , d o ubl e -buffer e d r egi ster s ar e updated just befor e the sta r t o f th e r e adout p h ase . fi gur e 37: ent e r i ng and l e avi n g a g l obal reset sequenc e p r o g r a mma b l e s e t t i n g s the r e g i s t e r s gl obal_rs t _end and gl obal_r ead_ star t allo w the dur a tion of th e r o w r e set phase and the i n te gr ation phase to be contr o ll ed, as s h o w n in f i gur e 38. the d u r a ti on of the r e ad out phas e is de termi n e d b y the activ e i m age s i z e . as so on as the global_rst_end c o unt has expir e d, all r o ws i n the pi xel ar r a y ar e si multa- neous l y taken out of r e se t and the pixe l arr a y beg i ns to i n te gr ate i n ci de nt li ght. fi g u re 3 8 : c o n t ro l l i n g th e r e se t a n d i n te g r a t i o n p h a s es o f th e g l o b a l r e se t s e q u e n c e ers ers r o w reset integration readout t rigger w ait f or end of curr en t r ow a utoma tic a t end of fr ame r eadout ers e rs row re set in tegr a tion r eadout t rigger w ait f or end of curr en t r ow a utoma tic a t end of fr ame r eadout global_rst_end global_r ead_star t
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 54 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y c o nt r o l of t h e el ect r o m ech an i cal sh ut ter fi gur e 39 sho ws two di ffe r e n t ways i n whi c h a shutter can b e contr o ll ed duri ng the g l obal r e s e t se que n ce . i n b o th case s , t h e ma ximum integr ation t i m e is set b y the differ - en ce b e twee n gl oba l _r ea d_s t a r t a n d gl ob al_ r s t _ e nd . i n s h utt e r e x am pl e 1, the s h utt e r i s open du r i ng the i n itial ers sequenc e and d u ri ng the r o w r e set phase . the shutte r cl oses dur i ng the integr ation phase . the p i xel arr a y is i n te gratin g inc i d e nt l i g h t from t h e st ar t of the integr a t ion pha s e t o th e point a t wh ich th e shut ter closes . f i nally , the shutter opens again after the end of the r e adout pha s e . i n shutte r example 2, the shutte r is open d u r i ng the i n itial ers s e quence and cl ose s som e tim e dur i ng the ro w r e set phase . the sh utter both opens and closes dur i ng the int egr ation phase . the pixe l arr a y is i n te gr ating inc i de nt li ght for the p a r t of t h e int e g r at ion phas e d u r i ng whi c h th e shut te r is o p en . a s for the pr e v ious ex am pl e , the s h utte r opens agai n afte r the end of the r e adout phase . fi g u re 3 9 : c o n t ro l o f the e l e c tro m ec ha n i ca l s h u tte r i t is essential that th e shut ter r e m a ins clos ed duri ng the entir e r o w r e ad out phas e (that is , until fv h a s de-asser t ed f o r the fr am e r e adou t); other w ise , so me ro ws o f data will be co rr up ted (o ver - int e gr ated). i t is essential that th e shut te r closes befor e the end of the integr a t ion pha s e . if the ro w r e ad out phas e is a llo wed t o s t ar t b e fo r e th e shut te r c l os es , e a ch ro w i n t u r n w i ll b e int e - g r ated for one r o w - tim e longe r than the pr evi o us r o w . after fv de-asser t s to signal the com p let i on of the r e adout phase , ther e is a tim e dela y of app r o x imately 10 * line_ l ength_p c k b e for e t h e s e ns or s t ar ts to int e g r at e li ght -s e ns it ive ro ws for t h e next er s fr a m e . i t is essent ial that the shutter be opened at s o m e poi n t in this time windo w ; oth e r w ise , the f i rst er s fr am e wi ll not b e unif or m l y int e g r at ed . the MT9J003 pr o v id es a shut ter output s i g n al to contr o l (or hel p t h e hos t sy st em co ntrol) t h e el ec trom e c ha nic a l sh utte r . t h e timing of the shut ter output is sho w n in f i g u r e 4 0 on pag e 55 . shut ter i s d e -as s e r te d b y d e faul t. t h e po int at wh ic h it as s e r t s i s c o ntr o l led b y the pr og r a mmi ng of gl ob al_shu tter_start. a t the end of the glob a l r e set r e adout phase , shut ter de-asser ts ap pro x imately 2 * line _le n g t h_ pc k af ter the de- asser t ion o f fv . t h is pr ogr a mmi ng r e st rict i o n mus t be me t for c o rr e c t oper at ion: global_r ead_st ar t > global_shutter_s t ar t ers ers row reset integration r eadout t rigger w ait f or end of curr en t r o w a utoma tic a t end of fr ame r eadout global_rst_end global_r ead_star t maximum in tegr a tion time shutter open shutter open shutter closed ac tual in tegr a tion time shutter open shutter open shutter closed closed shutter open ac tual in tegr a tion time sh u tt er e x ample 1 sh u tt er e x ample 2
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 55 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y fi g u re 4 0 : c o n t ro l l i n g th e sh u tte r o u tp ut u s i n g fl ash w i t h g l obal res e t i f g l ob al _seq_tri gg er[2] = 1 (gl o bal flas h enab led ) when a g l obal r e s e t se que n ce i s trig - ge r e d , t h e f l a s h output s i g n al wil l be p u ls ed d u r i ng the i n te grati o n p h ase o f t h e gl ob al r e se t se que n ce . t h e f l ash output w i l l asse r t a f i x e d numbe r of cy cl es af te r the st art of the integr ation phas e and wi ll r e mai n as serted for a tim e that is cont rolled b y the value of the flash _ count r e gist er , as sho w n in f i gur e 41 . fi g u r e 41: u s i n g fla s h w i th gl o b al r e set e x te rn a l c o n t ro l o f in te g r a t io n t i m e i f g l ob al _seq_tri gg er[1] = 1 (gl o bal bul b enabl e d ) when a gl obal r e se t se que n ce is trig - g e r e d, the end of the integ r ati o n phase is c o ntr o l l e d b y the le ve l of trig ger (gl o bal_se q_trig ger [0] or the ass o c i ated gp i inpu t) . this allo ws the int e gr ation time to be co ntroll e d di r e ct ly b y an in put to t h e s e ns or . this oper ation corr esponds to the shutter ? b ? s e t t in g on a tr a d i t io nal c a m e r a , whe r e ? b ? orig inal ly s t ood for ? b ul b ? (the shutter se tting used for s y nc hr onization with a magne- si um foi l fla s h bul b ) and w a s lat e r cons i d e r e d to st and for ? b r i ef ? (an exp o sur e that w a s lon g er th an t h e sh ut ter coul d aut o ma tically accom m o date). w h e n the tri gg er i s de -as s ert ed to e n d i n t e gr at i o n, the i n tegr ation phase i s e x te nded b y a fur t h e r t i me given b y glo b al_ r e a d _ st art ? globa l _shutte r_st art . u s ually this m e a n s that gl ob al_ r e a d_ st ar t sho u l d b e se t to global_shutter_star t + 1 . the ope r ati o n of thi s mod e is sho w n in f i g u r e 42 on page 56. the figu r e s h o w s the g l ob al r ese t se que n ce be ing t r igg er ed b y the gp i2 i n put , b u t it coul d b e tri gg er ed b y any of t h e gpi inputs or b y th e setting and subs equence cl earing of the gl obal_se q _trigg er[0] unde r so ftw a r e con t rol. ers e rs row reset integration readout t rigger w ait f or end of curr en t r ow a utoma tic a t end of fr ame r eadout global_rst_end global_r ead_star t sh u tt er global_shutter_star t ~2*line_length_pck ers e rs r ow r eset in tegr a tion r eadout tr i g g e r w ait f or end of curr en t r ow a utoma tic a t end of fr ame r eadout global_rst_end flash flash_c oun t (fix e d)
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 56 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y the i n tegr ation ti me of the grr s e quence i s defi ned as: (eq 17) wh er e: (eq 1 8) (eq 1 9) the i n tegr ation equati on all o ws fo r 24- bi t pr e c is ion whe n c a lc ula t ing bot h th e shut te r and r e adout of the image . th e global_rst_end ha s only 16-bit as th e arr a y r e set function and r e quir es a shor t amount of time . the inte g r ati o n t i m e c a n a l s o b e s c al ed us i n g gl ob al_ s c a le . t h e var i abl e c a n b e s e t to 0?5 12, 1? 2048 , 2 ?128 , an d 3?3 2 . t h ese progr a mm ing r e st ric t i o ns must b e me t for corr ec t operati o n of b u lb e x pos u r e s: ? g lobal_r e ad_star t > global_sh u tter_star t ? g l o b a l_ shut te r_ st ar t > g l ob al_ r st_ e n d ? g lobal_ shut ter_ st ar t must be sm aller than the exposur e tim e ( t hat is , this counter mus t expi r e be for e the tri gge r i s de -as s erted ) fi g u r e 42: g l obal r e set b u l b ret r i g ger i ng t h e g l obal res e t s e quence the tr igger for th e globa l r e set sequence is edge -se n s i ti ve; the gl ob al r e set sequenc e c a nnot b e r e tri gge r e d u n ti l the g l obal trig ger b i t (i n the g l ob al _seq_tri gg er r e gis t er) has b een r e turned to ?0, ? and the gp i (i f any) as so ciated wit h th e tr igger function has been de -a ss er ted . the earliest tim e that the glob a l r e set sequence can be r e tr igger ed is t h e point at which the s h ut ter output de- a sser ts; t h is o c curs appro x ima t ely 2 * line_length _pck after the negation of fv fo r the glo b al r e set r e a d out pha s e . the fr am e tha t is r e ad out of the sensor dur i ng the gl obal r e se t r e ad out phas e has exac tl y the same for m at as an y other fr ame out of th e se rial pixe l data i n terface , incl udi n g the add i ti on of two l i ne s of emb e dd ed d a ta. the v a lue s of the c o ar se_integ r a ti on_tim e and fi ne _i ntegr ation_ti me r egi ster s w i thin the em bed d e d data match the pr ogr a mme d v a l u es of those r e gi sters and do not r e flect the integratio n tim e us ed duri ng the gl obal r e se t se que n ce . int e gration ti me gl ob al _ scale [ glob al _ read _ sta rt g loba l _ shutter _ start ? globa l _ rst _ end ] ? u vt _ pix _ clk _ freq _ mhz - -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --- -- -- -- -- - - -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - - = gl ob al _ read _ start 2 16 glob al _ read _ start 27 : 0 >@ u glob al _ read _ start 11 5 : 0 >@ + = globa l _ shutter _ st ar t 2 16 g l oba l _ shutter _ start 27 : 0 >@ u gl ob a l _ shutter _ start 11 5 : 0 >@ + = ers e rs r ow r eset in tegr a tion r eadout t rigger w a it f or end of curr en t r ow a utoma tic a t end of fr ame r eadout global_rst_end gpi2 global_read_start - global_shutter_start
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 57 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e ns or re adout c o nf i g ur at i o n apt i na conf i d ent i al and pr opr i et ar y g l obal re set and sof t st a n d b y if t h e mo de _s el ec t[s t r e am ] b i t i s c l e a r e d w h i l e a g l o b al r e s e t s e q u enc e is i n prog r e s s , the MT9J003 w i l l r e main in str e am ing state u n ti l the g l obal r e s e t se que n ce (incl u di ng fr am e r e adout) has com p leted, as sho w n in f i gur e 43. figure 43: entering soft standby during a global reset sequence ers e rs r ow r eset in tegr a tion r eadout mode_selec t[str eaming] system state sof tw ar e standby str eaming
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 58 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e n s o r c o r e di g i t a l da t a p a t h apt i na conf i d ent i al and pr opr i et ar y s e ns or co r e di gi t a l dat a pa t h te st p a ttern s the MT9J003 supports a numbe r of test patterns to faci li tate syste m d e b u g. t e st patterns ar e enabled using test_ p att e r n _mode ( r 0x0 600? 1). the test pat t er ns ar e listed in ta b l e 2 1 . t e st patt er n s 0?3 r e place pixel data in the out p ut im age (the em bedded data ro ws ar e still pr esent). t e st patter n 4 r e pl ac es all d a ta in the output im ag e (the em bed d ed d a ta r o ws ar e om itted and te st pattern data r e plac es the pi xel data). h i sp i tes t pat t er ns t e st patt er n s sp ecific to the h i spi ar e also gene r ated . the te st patte r ns ar e e n abl e d b y using test_enable ( r 0x31 c6 - 7 ) an d con t rolled b y test_ m ode ( r 0x31 c6[6:4 ]). f o r all of the test pa tter n s , the mt9 j 00 3 r e gist e r s must b e s e t appr op ri atel y to contr o l the fr ame r a te and outp ut timing. this in cludes: ?a l l c l o c k d i v i s o r s ? x _addr_ st ar t ? x _addr_ end ? y_a ddr_star t ? y_a ddr_end ? f r a me_l ength_li ne s ?l i n e _ l e n g t h _ p c k ?x _ o u t p u t _ s i z e ? y_output_size tab l e 21: te s t pat t er n s test_pattern_mode de s c r i pt i o n 0 n o r m a l o p era t io n : n o te s t p a tte rn 1 s o lid c o lo r 2 1 0 0 % c o lo r b a rs 3 f a d e - to -g ra y co l o r b a r s 4 p n 9 lin k in t e g rity p a tte r n (o n l y o n s e n s o rs w i th se r i a l in te rf a c e ) 256 w a l k i n g 1s ( 12- bi t val u e) 257 w a l k i n g 1s ( 10- bi t val u e) 2 5 8 w a lk in g 1 s (8 -b it v a lu e ) tabl e 22: h i spi tes t pat t e r n s te st_mode de s c r i p t i o n 0 t ra n s m i t a c o n s ta n t 0 o n a ll e n a b le d d a ta la n e s . 1 t ra n s m i t a c o n s ta n t 1 o n a ll e n a b le d d a ta la n e s . 2 t r an s m i t a squar e w ave at h al f t h e se r i al dat a r at e on al l enabl e d data l anes . 3 transmit a s q u a re w a v e a t t h e p i x e l r a te o n a ll e n a b le d d a ta la n e s. 4 t r a n s m i t a c o nti nuous sequenc e of ps eudo r a ndom dat a , w i th n o s a v code, c o pi ed on al l enabl ed dat a l a nes . 5 r ep l a ce d a t a f r om t h e sensor w i t h a kn ow n se q u e n c e c o p i e d o n a ll e n a b le d d a ta la n e s .
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 59 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e n s o r c o r e di g i t a l da t a p a t h apt i na conf i d ent i al and pr opr i et ar y te s t cur s or s the mt 9j0 03 suppor t s o n e ho r i zont al and one ve r t ical cursor , allo win g a crosshair to be sup e r i m p os ed o n th e im ag e or on te st p a tter n s 1 ? 3. the p o sition a n d width of each curs or ar e programm ab le i n r0 x31e8 ? r0x3 1ee. both ev en and odd cursor positions and widths a r e suppor t ed. each curs or can b e i n hibi ted b y s e tti n g i t s wi dth to ?0. ? the pr og r a m m ed curs or posi ti on c o r r e s pond s to the x and y addr es ses of the pixe l arr a y . f o r e x ample , s e tti n g horiz o nt al_ c ur sor_ pos i t i on to the s a me v a lu e as y_addr_star t would r e sult in a ho r i - z o ntal curso r being dr a w n star ting on the fi rst r o w of the image . the cursor s ar e opaque (the y r e plac e d a ta fr om the i m age d sce n e or tes t pattern). the col o r of each curs or i s se t b y the v a l u es of the b a y e r components in the test_data_r e d, test_data_gr eenr, test_data_blue and test_data_ g r e e nb r e gi sters . a s a conse q ue nce , the curs ors ar e the sa me color as test patter n 1 and ar e ther efor e invi si b l e w h e n t e s t patt er n 1 is s e le ct ed . wh en ver t ical_cursor_po sitio n = 0x0fff , the ver t ica l cursor oper at es in an auto mat i c mod e in w h i c h its pos i ti on adv a nce s ev er y fr am e . i n th is m o de the cursor st ar ts at t h e co lumn a s sociated with x_addr_star t = 0 an d ad v a nc es b y a s t e p -si z e of 8 c o lum n s e a ch fr ame , until it r e aches the column associat ed with x_addr_sta r t = 204 0, after which it wr aps (256 steps). the wid t h and color of the cursor in this autom a tic m o de ar e c o ntr o l led i n the usual way . the ef fec t of e n ab li ng th e te s t curs ors w h e n the imag e_or i e ntati o n r egi ster is non-z e r o is not defined b y the design specification. the beh a vior o f t h e mt9 j 00 3 is sho w n in f i gur e 44 on pag e 60 and the te st c u rsors ar e sho w n as tr a n slucent, for clar ity . i n p r ac- tice , th ey ar e opaq ue (they o v erlay the im ag ed sc ene). the manner in which the tes t curs ors ar e affe ct ed b y t h e val u e of i m age _ or ientation can be understood from these im plem entat i on deta ils: ? t he te st cu rsors ar e i n se r t ed l a st i n the da ta pat h , t h e cursor is app l ied with o u t an y sensor corr ection s . ? t he dr awing of a curso r star ts when the pi x e l a rray ro w or c o lu m n add r es s is w i thi n the a d dr ess r a nge of curso r st ar t to cursor star t + width. ? the cursor is independent of image orientation.
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 60 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or s e n s o r c o r e di g i t a l da t a p a t h apt i na conf i d ent i al and pr opr i et ar y figure 44: test cursor behavior with image orientation r eadout dir ec tion v er tical cursor star t horizontal cursor start horizon tal mirr or = 0, v er tical flip = 0 v e r tical cursor star t horiz on tal cursor star t horizontal mirr or = 0, v er tical flip = 1 v ertical cursor start horiz on tal cursor star t horizontal mirr or = 1, v er tical flip = 0 v er tical cursor star t horizontal cursor start horiz on tal mirr or = 1, v er tical flip = 1 r eadout dir ec tion r eadout dir ec tion r e adout dir ec tion
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 61 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t im in g s p e c if ic a t io n s apt i na conf i d ent i al and pr opr i et ar y ti m in g s p e c if ic a t io n s p o we r - up s e q u e n c e the r e comme nded po w e r - up se que n ce for the MT9J003 is sho w n i n f i gur e 45. the av ai l- able po wer supp lies?v dd _io , v dd , v dd _t x, v dd _pll, v aa , v aa _p i x , v dd _sl v s, v dd _s lvs _ tx ?c an b e tur n ed o n at the sam e ti m e or have the sep a r a tion specified belo w . 1. t u rn on v dd _ i o po w e r supp ly . 2 . after 1? 500ms , tur n on v dd and v dd _t x po wer supply . 3 . after 1? 500ms , tur n on v dd _pll and v aa /v aa _ p ix po wer supp lies . 4. after the l a st po w e r s u ppl y is s t ab le , e n ab le ext clk . 5. asser t r e set_bar for at least 1ms . 6 . w a it 240 0 ext c lk s for int e r n a l i n i t ial i zat i on in to s o ft war e s t and b y . 7 . c onfigur e pll, output , and im age settings to desir e d values 8 . s e t mode_select = 1 (r0 x 0100 ). 9 . w a it 1m s for the pl l to loc k be for e st r e am ing s t at e is r e a c he d . f i g u re 4 5 : p o w e r-u p s e q u e n ce n o te : d ig ita l s u p p lie s m u st b e tu r n e d o n b e fo re a n a l o g s u p p lie s. tabl e 23: pow er - up se que n ce definition sy m b ol min typ max un i t v dd _i o t o v dd , v dd _t x t i m e t 1 0 C 500 m s v dd , v dd _t x t o v dd _p ll t i m e t 2 0 C 500 m s v dd , v dd _t x t o v aa /v aa _p i x t i m e t 3 0 C 500 m s v aa , v aa _p i x t o v dd _sl v s_ tx t 4 C C 500 m s ac ti ve har d r e set t 5 1CC m s in te rn a l in itia liz a t io n t 6 2400 C C extclks pll lock time t 7 1CC ms internal init hard reset software standby pll lock streaming t 1 t 2 t 3 t 5 t 6 t 7 v dd_ slvs_tx t 4 v aa , vaa_pix extclk v dd _pll v dd, v dd_ slvs, v dd_ tx v dd_ io reset_bar
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 62 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t im in g s p e c if ic a t io n s apt i na conf i d ent i al and pr opr i et ar y powe r - d o w n s equenc e the r e c o mme nd ed po w e r - d o wn se que n ce for the MT9J003 i s sho w n i n f i gur e 46. the av ailable p o wer supp lies?v dd _io , v dd , v dd _t x0, v dd _pl l , v aa , v aa _pix, v dd _sl v s, v dd _s l v s_t x ?can be tur n ed off at the sam e tim e or have th e separ a tio n specified b elo w . 1 . disable str e am in g if output is act i ve b y sett ing m o de_ s elect = 0 (r0x0 100 ). 2. the soft standb y state is r e ached after th e c urr ent r o w or fr ame , d e pend ing on c o nfi g - ur ation, has ended. 3 . asser t h a r d r e set b y setti ng res e t_bar to a logic ?0. ? 4. t u rn off the v aa /v aa _pix and v dd _pl l po w e r s u pp l i e s . 5. af t er 1 ? 50 0ms , t u r n of f v dd and v dd _t x0 po wer supply . 6. af t er 1 ? 50 0ms , t u r n of f v dd _io p o wer supp ly . f i g u re 4 6 : p o w e r-d o w n s e q u e n ce t a b l e 2 4 : p o we r - d o wn s e q u e n c e definition symbol min typ max uni t har d r e s e t t 1 1CC m s v dd _s lv s _ tx t o v dd tim e t 2 0 C 500 m s v dd /v aa /v aa _p i x t o v dd tim e t 3 0 C 500 m s v dd _pl l t o v dd tim e t 4 0 C 500 m s v dd to v dd _i o t i m e t 5 0 C 500 ms t 5 t 4 t 3 v dd _ io v dd , v dd _ tx, v dd _slvs v dd _pll v aa , vaa_pix v dd _slvs_tx extclk reset_bar turning off power supplies hard reset software standby streaming t 1 t 2
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 63 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t im in g s p e c if ic a t io n s apt i na conf i d ent i al and pr opr i et ar y ha r d s t andby and h a r d res e t the har d stan db y state is r e a c hed b y the as ser t ion o f th e reset_ bar pad ( h ar d r e set). r e gis t er v a lue s ar e not r e tai n ed b y thi s action, and wil l be r e turned to thei r d e fault v a l u es once har d r e se t i s c o mple te d. the mini mum po w e r consum ption is achi ev ed b y the har d standb y state . the de tai l s of the se que n c e ar e de sc r i be d bel o w and sho w n in f i gur e 47 on p a g e 63 . 1 . disable str e am in g if output is act i ve b y sett ing m o de_ s elect = 0 (r0x0 100 ). 2. the soft standb y state is r e ached after th e c urr ent r o w or fr ame , d e pend ing on c o nfi g - ur ation, has ended. 3 . asser t r e set_b a r (active l o w ) to r e set th e sensor . 4 . the se ns or r e m a ins in har d s t an db y s t at e if reset _b a r r e m a in s in the l o gi c ?0 ? s t at e . f i g u re 4 7 : h a rd s t a n d b y a n d h a r d r e se t extclk mode_select r0x0100 reset_bar logic 1 logic 0 s treaming soft standby hard standby from hard reset next row/frame
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 64 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or t im in g s p e c if ic a t io n s apt i na conf i d ent i al and pr opr i et ar y soft st andby and sof t res e t the MT9J003 can r e d uce po w e r consum pti o n b y swi t c h ing to the s o ft standb y state when the output is not ne ede d . r egi ster v a lu es ar e r e tained i n the soft standb y state . o n ce this s t ate is r e ache d, s o ft r e set can b e e n abl e d opti onal ly to r e turn al l r egi ster v a l u es back to the defaul t. the de tai l s of the s e quence ar e d e sc ribe d bel o w and sho wn i n fi g u r e 4 8. sof t s t andby 1 . disable str e am in g if output is act i ve b y sett ing m o de_ s elect = 0 (r0x0 100 ). 2. the soft standb y state is r e ached after th e c urr ent r o w or fr ame , d e pend ing on c o nfi g - ur ation, has ended. sof t res e t 1. f o l l o w the s o ft standb y sequenc e li sted abo v e . 2 . s e t soft war e _r eset = 1 ( r 0x01 03) to star t the inter n al init ializat i on seq u ence . 3 . after 2 400 ext c lk s , the int e r n al initializa t i on se que n ce is comple te d and the curr ent s t ate r e t u r n s to s o ft st andb y autom a ti ca lly . al l r e gi s t e r s , in cl udi n g so ftwar e _r e s e t , r e tur n to their default values . f i gur e 48: sof t st andby and s o f t res e t extclk mode_select r0x0100 software_reset r0x0103 logic 1 logic 0 s treaming s o f t s tandby soft reset soft standby next row/frame logic 0 logic 1 logic 0 2400 extclks logic 0 logic 0 logic 0
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 65 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or sp ect r al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y spect r al char act e r i s t i c s figure 49: quantum efficiency 0 5 10 15 20 25 30 35 40 45 50 350 400 450 500 550 6 00 650 7 00 750 blue green red quantum efficiency (%) w a v elength (nm)
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 66 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or sp ect r al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y table 25: cra (13.4) image height cra % mm deg 00 0 50 . 1 9 1 0. 67 10 0. 3 8 2 1. 34 15 0. 5 7 4 2. 01 20 0. 7 6 5 2. 68 25 0. 9 5 6 3. 35 30 1. 1 4 7 4. 03 35 1. 3 3 9 4. 70 40 1. 5 3 0 5. 37 45 1. 7 2 1 6. 04 50 1. 9 1 2 6. 71 55 2. 1 0 3 7. 38 60 2. 2 9 5 8. 05 65 2. 4 8 6 8. 72 70 2. 6 7 7 9. 39 75 2. 8 6 8 10. 06 80 3. 0 5 9 10. 73 85 3. 2 5 1 11. 41 90 3. 4 4 2 12. 08 95 3. 6 3 3 12. 75 100 3. 8 2 4 13. 42 0 2 4 6 8 10 12 14 16 18 20 0 1 02 03 04 05 06 07 08 09 0 1 0 0 1 1 0 cra (deg) image heigh t (%)
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 67 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or el ect r i c al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y electrical characteristics caution stresses greater than those listed in table 27 may cause permanent damage to the device. this is a stress rating only, and functional ope ration of the device at these or any other con- dit i ons abov e tho s e indi cat e d i n t h e oper a t i ona l s e c t i o ns of this s p ecifi c a t ion is not impl ied. notes: 1. e x posur e to absolute maxim u m r a ting c o nd itions f o r e x tended periods ma y af f e c t r e liability . 2. to keep dark current and shot noise artifacts from impacting image quality, care should be taken to keep t op at a minimum. tabl e 26: d c el ec tr i c al def i ni t i ons and c h ar act e r i sti c s f extcl k = 15 m h z; v dd = 1. 8v; v dd _i o = 1. 8v; v aa = 2. 8v; v aa _pi x = 2 . 8v; v dd _pl l = 2. 8v; v dd _s lvs = 1. 8 v , v dd _s lvs_ tx = 0 . 8v ; o u t p ut l o ad = 6 8 . 5p f; t j = 60 c ; d a t a rat e = 480 m h z, ; dll set t o 0 , 10m p f r am e - r a t e at 14. 7 f p s definition condition symbol min typ max uni t cor e di gi t a l vol t age v dd 1. 7 1. 8 1. 9 v i/o d i g i ta l v o lta g e p a ra lle l p i x e l d a t a in te r f a c e v dd _i o 1. 7 1. 8 1. 9 v an al og vol t age v aa 2. 4 2. 8 3. 1 v p i xel s u ppl y v o l t age v aa _pi x 2. 4 2. 8 3. 1 v p l l s u p p ly v o lta g e v dd _pl l 2. 4 2. 8 3. 1 v h i s p i d i g i ta l v o lt a g e v dd _sl v s 1 . 7 1. 8 1 . 9 v h i s p i i/o d i g i ta l v o lta g e v dd _s lvs _ tx 0. 3 0 . 4 0. 9 v d i g i ta l o p e r a t in g c u r r e n t s tre a m i n g , fu ll re s o l u t io n 3 5 4 1 4 5 m a i/o d i g i ta l o p e r a t in g c u rr e n t s tre a m i n g , fu ll re s o l u t io n 0 0 0 m a an al og ope r at i n g cur r ent st r eam i n g , f u l l r esol uti o n 1 32 169 190 m a p i x e l su p p l y c u rr e n t s tre a m i n g , fu ll re s o l u t io n 2 . 7 7 . 6 1 3 . 3 m a p l l s u p p ly c u rr e n t s tre a m i n g , fu ll re s o l u t io n 6 . 5 7 7 .5 m a h i s p i d i g i ta l o p e ra t in g c u r re n t s tre a m i n g , fu ll re s o l u t io n n /a 2 0 n / a m a h i s p i i/o d i g i ta l o p e r a t in g c u rr e n t s tre a m i n g , fu ll re s o l u t io n 1 3 1 3 .5 1 4 m a so f t st an db y ( c l o c k o n ) 1 . 3 1 . 5 1 . 9 m w t abl e 27: absol u te max i mum r a t i ng s symbol definition condition min max unit v dd _m a x c o r e d i gital v o lta g e C0 .3 1.9 v v dd _i o_ m a x i / o d i gital v o lta g e C0 .3 3 . 1 v v aa _max analog v o lt age C0 .3 3.5 v v aa _pix p ix e l supply v o ltage C0.3 3.5 v v dd _pl l pl l supply v o ltage C0.3 3.5 v v dd _sl v s_max h isp i digital v o ltage C0.3 1.9 v v dd _sl v s_tx_max hisp i i/ o digital v o ltage C0.3 1.2 v i dd digital oper a t ing curr en t C 90 ma i dd _i o i/ o digital oper a t ing curr e n t C 100 ma i aa _max analog oper a t in g cu rr en t C 225 ma i aa _pi x p ix e l supply curr e n t C 6 25 ma i dd _pll pll supply curr en t C 25 ma t op oper a t ing temper a t ur e measur e a t junc tion C30 70 c t s t stor age temp er a t ur e C4 0 8 5 c
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 68 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or el ect r i c al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y n o te : m o n it o r is a lo w p o w e r v g a p r e v ie w m o d e . t h e p o w e r c o n s u m p t io n v a lu e s in t h is t a b l e r e p r e s e n t a sm al l s a m p l e of m t 9j003 sens o r s. th e i dd io c u r r e n t w ill d o u b le if t h e v dd _ i o v o lt a g e is r a ise d to 2 . 8 v . f i g u re 5 0 : t w o - w i re s e ria l b u s t i m i n g p a r a m e te rs note: read sequence: for an 8-bit read, read waveforms start after write command and register address are issued. tabl e 28: par a l l e l i n t e r f ace conf i g ur ed t o us e l o w pow e r m o de f extcl k = 15 m h z ; v dd = 1. 8v; v dd _i o = 1. 8v; v aa = 2 . 8v; v aa _pi x = 2. 8 v ; v dd _ p l l = 2. 8v; tj = 60 c; par a l l e l d at a r at e = 80m p/s frame rate i aa i ddpll i dd i ddio ia apix 10m p 7. 5 f p s 103. 29 10 . 26 2 3. 93 11. 53 2. 33 388m w 72 0p60 5 9. 94 f p s 1 22. 78 10 . 25 2 3. 85 11. 21 5. 39 451m w 108 0p30 2 9. 97 f p s 1 14. 67 10 . 26 2 2. 89 4. 4 9 4. 14 411m w vg a6 0 5 9. 94 f p s 8 2. 66 10 . 2 7 1 8. 5 4 . 5 1 5 . 2 5 316m w m o ni t o r 2 9. 97 f p s 6 9. 22 10 . 2 8 1 6. 3 6 . 3 5 2 . 7 6 271m w t a b l e 2 9 : t w o - w i re s e ria l r e g i ster i n te rfa c e e l e c trica l c h a r a c te ristics f extcl k = 15 m h z ; v dd = 1. 8v; v dd _i o = 1. 8v; v aa = 2 . 8v; v aa _pi x = 2. 8 v ; v dd _ p l l = 2. 8v; v dd _sl v s = 1. 8v, v dd _s lvs _ tx = 0 . 4 v; o u t p ut l o ad = 68. 5p f; t j = 60 c; dat a rat e = 4 80 m h z, ; dll set t o 0 symbol parameter condition min typ max un i t v il in p u t l o w v o lt a g e C 0 . 5 0 .7 3 0 . 3 x v dd _i o v i in i n pu t l e ak ag e cur r e nt n o pul l u p r e s i st or ; v in = v dd _i o or d gn d C2 2 a v ol out p ut l o w vol t age at spe c i f i e d 2m a 0 . 031 0. 0 3 2 0 . 035 v i ol o u tp u t lo w cu rr e n t a t sp ec i f i e d v ol 0. 1v 3 m a c in i n pu t pad cap a ci t a nce 6 p f c loa d l o ad capac itance pf s data s clk wri t e s t ar t a c k s t op s data s clk r ead s t ar t ac k tr_clk tf_clk 90 % 10 % tr_sdat tf_sdat 90 % 10 % t sd h t sd s t s haw t ahsw t s tps t s tph register address bit 7 w rite address bit 0 register value bit 0 register value bit 7 read address bit 0 register value bit 0 w rite address bit 7 read address bit 7 t sh a r t s dsr t s dhr t ahsr t s rth t sc l k
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 69 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or el ect r i c al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y t a b l e 3 0 : t w o - w i re s e ria l r e g i ster i n te rfa c e t i m i n g s p e c ifica t io n f extcl k = 15 m h z ; v dd = 1. 8v; v dd _i o = 1. 8v; v aa = 2 . 8v; v aa _pi x = 2. 8 v ; v dd _ p l l = 2. 8v; v dd _sl v s = 1. 8v, v dd _s lvs _ tx = 0 . 4 v; o u t p ut l o ad = 68. 5p f; t j = 60 c; dat a rat e = 4 80 m h z, ; dll set t o 0 figure 51: i/o timing diagram symbol parameter condition min typ max uni t f sc lk s e ri a l i n te rfa c e i n p u t cl o c k C 0 1 0 0 4 0 0 kh z s c l k d u ty cycl e v od 45 50 60 % t r scl k/s data ris e tim e 300 s t s r t s s ta r t se tu p tim e m a st er w r ite to s l a v e 0 .6 s t srth st ar t hol d t i m e m a s t e r w r i t e t o sl ave 0 . 4 s t sdh s data hol d m a s t e r w r i t e t o sl ave 0 . 3 0. 65 s t sds s data s e t u p m as te r w r i t e t o sl ave 0 . 3 s t sh aw s data h o ld t o a c k m a s t e r r e a d t o s l a v e 0 .1 5 0 .6 5 s t ahs w ac k h o l d t o s data m a s t e r w r i t e t o sl ave 0 . 1 5 0 . 7 0 s t stps st op setup t i m e m a s t er w r i t e t o sl ave 0 . 3 s t stp h st op hol d t i m e m a s t e r w r i t e t o sl ave 0 . 6 s t sh ar s data hol d to a c k m as te r w r i t e t o sl ave 0 . 3 1. 65 s t ahs r ac k h o l d t o s data m a s t e r w r i t e t o sl ave 0 . 3 0. 65 s t sdh r s data h o ld m a s t e r r e a d f r o m s l a v e . 0 1 2 0 .7 0 s t sdsr s data se tu p m a s te r r e a d f r o m sla v e 0 .3 s da ta[11:0] fr a me_v ali d/ li n e_v ali d fr ame_v ali d leads li n e_v ali d by 6 pix c lks. fr a me_v ali d tr ails li n e_v ali d by 6 pix c lks. pixc l k extclk t cp t r t extclk t f t rp t fp t pd t pd t pfh t plh t pfl t pll pxl _ 0 pxl _ 1 pxl _ 2 pxl _ n 90 % 10 % 90 % 10 %
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 70 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or el ect r i c al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y t a b l e 3 1 : i/o p a ra m e ters f extcl k = 15 m h z ; v dd = 1. 8v; v aa = 2. 8v; v aa _p i x = 2 . 8v; v dd _p ll = 2. 8 v ; v dd _ s l v s = 1. 8v, v dd _sl vs_t x = 0. 4v; out p ut l o ad = 68. 5 p f ; t j = 60 c ; d a t a rat e = 480 m h z, ; dll set t o 0 symbol definition conditions min max uni t s v ih in p u t h i g h v o lta g e v dd _i o = 1. 8 v 1 . 4 v dd _i o + 0. 3 v v dd _i o = 2. 8 v 2 . 4 v il i n p u t lo w vo l t age v dd _i o = 1. 8 v g n d C 0 . 3 0. 4 v dd _i o = 2. 8 v g n d C 0 . 3 0. 8 i in i n p u t l e a k a g e cu rr e n t n o p u l l - u p resi sto r ; v in = v dd or d gn d C 20 20 a v oh o u tp u t h i g h v o lt a g e a t sp e c ifie d i oh v dd _i o - 0 . 4v C v v ol o u tp u t l o w v o lta g e a t s p e c ifie d i ol C0 . 4 v i oh o u tp u t h i g h cu rr e n t a t spe c i f i e d v oh C C12 m a i ol o u tp u t lo w cu rre n t a t s p ec ifie d v ol C9 m a i oz tr i - st ate out p ut l e akage cu r r en t C1 0 a tabl e 32: i / o ti m i ng f extcl k = 15 m h z; v dd = 1. 8v; v dd _i o = 1. 8v; v aa = 2. 8v; v aa _pi x = 2 . 8v; v dd _pl l = 2. 8v; v dd _s lvs = 1. 8 v , v dd _s lvs_ tx = 0 . 4v ; o u t p ut l o ad = 6 8 . 5p f; t j = 60 c ; d a t a rat e = 480 m h z, ; dll set t o 0 sy m b ol definition conditions min typ max un i t s f ext c lk i n put c l oc k f r e q uenc y p l l enabl e d 6 24 48 m h z t extcl k i n put c l oc k p e r i od pl l enab l e d 1 66 41 20 ns t r i nput c l oc k r i se t i m e 0. 1 C 1 v /ns t f i nput c l oc k f a l l t i m e 0. 1 C 1 v /ns cl oc k dut y c y cl e 4 5 5 0 5 5 % t jitt e r in p u t clo c k jitt er C C 0 . 3 n s ou t p ut pi n s l ew f a st est c loa d = 15p f C 0. 7 C v/ ns f p i xcl k pi xcl k f r e q uenc y d ef aul t C 8 0 C m h z t pd pi xclk t o d a t a val i d d e f a ul t C C 3 ns t pf h p i x clk t o f r am e_val i d hi gh d e f a ul t C C 3 ns t plh pi xclk t o l i ne_val i d hi gh d e f a ul t C C 3 ns t pf l p i x clk t o f r am e_val i d l o w d ef aul t C C 3 ns t pll p i x clk t o l i ne_val i d l o w d ef aul t C C 3 ns
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 71 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or el ect r i c al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y fi gur e 52: h i spi eye d i agr am f o r bot h cl oc k and d at a si gnal s table 33: h i spi ri s e and f a l l ti m e s at 480 m h z m e as ur em e n t condi t i o ns : p h y supp l y 1. 8 v , h i s p i p o w e r s u pp l y 0. 8 v , d a t a rat e 480m h z , d l l s e t t o 0 p a rameter name va l u e uni t m a x setup ti m e f r o m transm i t t e r t x p r e 0. 4 4 u i m a x h o l d ti m e f r om tr ansm i t ter t xp ost 0. 44 u i ri se t i m e t t ri se 350 p s f a ll t i m e t t fa ll 3 5 0 p s ou t p u t i m p e d a nc e 6 6 tabl e 34: h i spi ri s e and f a l l ti m e s at 360 m h z m e asurement conditions: phy supply 1.8v, hispi power supply 0.8v, data rate 480mhz, dll set to 0 p a rameter name va l u e uni t m a x setup ti m e f r o m transm i t t e r t x p r e 0. 4 8 u i m a x h o l d ti m e f r om tr ansm i t ter t xp ost 0. 42 u i ri se t i m e t t ri se 350 p s f a ll t i m e t t fa ll 3 5 0 p s ou t put impedance 66 cl k j i t t e r tri gge r / re f e r e n c e vd i f f ma x vd i f f ui/ 2 ui/ 2 vd i f f tx p r e tx p o s t cl o c k m a sk da t a m a sk t ri s e t fa l l 20% 80%
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 72 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or el ect r i c al ch ar act e r i st i c s apt i na conf i d ent i al and pr opr i et ar y fi g u re 5 3 : h i sp i s k e w b e tw e e n d a t a s i g n a l s w i th i n th e ph y not e : t he cl ock d l l s t ep s 6 and 7 ar e not r e c o m m e nd ed b y ap t i na f o r t h e m t 9 j 0 03 rev. 2. note: the data dll steps 3, 5, and 7 are not recommended by aptina for the MT9J003 rev. 2. t a b l e 3 5 : c h a n n e l, p h y a n d in tra - p h y s k e w m e as ur em e n t condi t i o ns : p h y supp l y 1. 8 v , h i s p i p o w e r s u pp l y 0. 8 v , d a t a rat e 480m h z , d l l s e t t o ze r o d a t a l a n e s k e w in r e f e r e n c e t o c l o c k t c h s k e w 1 p h y - 1 5 0 p s t a bl e 36: c l ock d ll step s m e a s u r e m e n t c o n d itio n s : p h y s u p p ly 1 .8 v , h i s p i p o w e r s u p p ly 0 .8 v , d a ta d l l s e t to z e r o cl ock dll step 1 2 3 4 5 step d e l a y @ 480 m h z 0. 2 5 0. 375 0. 5 0. 62 5 0. 75 ui e y e _ o p e n in g @ 4 8 0 m h z 0 .8 5 0 . 7 8 0 . 7 1 0 .7 1 0 .6 9 u i eye_ ope n i n g@ 36 0 m h z 0 . 8 9 0 . 8 3 0 . 8 1 0 . 6 0 046 ui tabl e 37: d a t a d l l st eps m e a s u r e m e n t c o n d itio n s : p h y s u p p ly 1 .8 v , h i s p i p o w e r s u p p ly 0 .8 v , c l o c k d l l s e t to 0 data dll step 1 2 4 6 step d e l a y @ 480 m h z 0. 2 5 0. 375 0.62 5 0. 8 7 5 ui ey e op eni n g@ 480 m h z 0. 7 9 0. 84 0. 71 0. 6 1 u i ey e op eni n g@ 360 m h z 0. 8 5 0. 83 0. 82 0. 7 7 u i tc h s ke w1phy
pdf: 4791388811 source: 9166348326 MT9J003-ds - rev c 2/12 en 73 ?2009 aptina imaging corporation all rights reserved. MT9J003: 1/2.3-inch 10mp cmos digital image sensor package dimensions aptina confidential and proprietary package d i m e nsi o ns f i g u re 5 4 : 4 8 -p in il c c p a c k a g e o u t lin e d r a w in g n o te s : 1 . d i m e n s io n s in m m . d i m e n s io n s in () a r e f o r re fe r e n c e o n ly . 2. enc a psul ant : e p oxy 3 . s u b s tra t e m a te ria l : p l a s tic la m i n a te 0 . 5 th ic kn es s 4 . l i s m a te r i a l : b o ro silic a t e g l a s s 0 . 4 th ic k n e s s . r e fr a c tiv e in d e x a t 2 0 c = 1 .5 255 @ 5 46nm aand 1. 5 231 @ 5 88nm . 5. l e a d f i n i s h : g o l d p l a t i n g , 0 . 5 mi c r o n s mi n i mu m t h i c k n e s s . 6 . i m age s e nsor di e 0. 2 t hi ck n e ss. 7. m a xi m u m rota ti on o f o p ti ca l a r e a rel a ti ve to se a t i n g p l a n e a : 2 5 m i cro n s . m a xi m u m ti l t of o p ti ca l a r e a re l a ti ve to top of cove r g l a s s: 2 0 m i cron s . m a x i m u m t ilt o f o p t i a l a r e a r e la t i v e t o t o p o f c o v e r g l a s s : 5 0 m i c r o n s . 8 . d i e ce nt er = pac k age c e nt er ; opt i c a l c e nt e r of f s e t f r om pac k age c e t e r : x = 0. 0 1356, y = - 0 . 0817 05 (0, 2) (1, 25) 1.40.5 0.7250.075 100.075 5.0820.075 5.0140.075 100.075 47x 0.80.05 48x 0.40.05 0.5250.05 7.50.10 ct r optical c en ter 8 optical ar ea 7 f irst clear p ix el (4.589 ct r) (6.413 ct r) (0.125) encapsulan t 2 substr a te 3 lid 4 image sensor die 6 3.85 0.7 t yp . 7.7 7.7 3.85 4.5 9 0.7 t yp . 4.2 4.5 80.10 ct r sec tion a - a sea ting plane a 0.1 a 0.1 a c a 0.15 c b a 0.15 c b a 0.15 c b
pdf: 4791388811 source: 9166348326 MT9J003-ds - rev c 2/12 en 74 ?2009 aptina imaging corporation all rights reserved. MT9J003: 1/2.3-inch 10mp cmos digital image sensor package dimensions aptina confidential and proprietary figure 55: 48-pin tplcc package outline drawing top view (see-through) c aptur e dir ec tion with lens die pad 1 f irst clear pix el primar y da tum sensor cen ter side view housing substra te glass 8.000.05 ?0.60 0.00 -0.03 4.000.1 ?0.60 0.00 -0.03 4.000.1 8.000.05 ?0.55 0.00 -0.03 3 - 0.050.05 3 - 0.650.05 8.000.05 8.200.05 10.300.05 7.200.05 10.300.05 6.400.05 6.200.05 1.350.15 0.300.05 1.050.10 4 - 0.41 4 - 0.30 0.250.05 0.550.1 0.850.1 3 - ?1.60 3 - ?1.85 b b b b 4 -r0.30 b 120.075 1.40.05 120.075 3.85 7.7 0.7 t yp . 0.7 t yp . 3.85 7 .7 48*0.40.05 47*0.80.05 1 48 4.2 4.5 4.5 bottom view 1 48 9.0 notes: 1. d i e t h i c k n e s s : 2 0 3 m m t y p . 2. g l os s t h i c k n e s s : 30 0m m t y p . 3. p c b t h i c k n e s s : 3 0 0 m m t y p . 4. t i l t of se n s or r e l a t i v e t o su b s t r a t e : 0 . 3 m a x. 5. t i l t o f s e n s o r o p ti c a l a r e a r e l a ti ve t o th r e e s e a t i n g p a d s l o c a t e d o n t he s e ns o r ho us i ng : 0 . 7 m a x . 6. r o t a ti o n o f s e n s o r o p ti c a l a r e a r e l a ti ve to th e tw o o f th e h o riz o n t a l l y l o c a t e d f0 . 6 0 p i n s : 1 . 0 m a x. 7. o p t i c a l c e n t er o f f s et f r o m h o u s i n g c e n t e r : 1 0 0 m m m a x . 8. o p t i c a l c e n t er = p a c k a g e c e n t er = h o u s i n g c en t e r
pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 75 ?2009 aptina imaging corporation. all rights reserved. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or pa c k a g e di m e ns i o ns apt i na conf i d ent i al and pr opr i et ar y tabl e 38: 48-pin tplcc pin assignment pi n number name pi n number name pi n number nam e 1 s lvs c _n 17 t e st 33 ates t1_bt m 2 sl v s_1 _ p 1 8 r es et_b ar 34 ates t2_bt m 3 s l v s_1_ n 19 v dd 35 v aa _pi x 4s l v s _ 0 _ p 2 0 g n d 3 6 v aa _pi x 5 s l v s_0_ n 21 v dd _i o 3 7 p i x gn d 6v dd _s lvs_ tx 22 g p i 0 38 v aa 7v dd _ s l v s 2 3g p i 13 9 a t e s t 2 _ t o p 8v dd _ i o 2 4g p i 24 0 a t e s t 1 _ t o p 9 g n d 25 g p i 3 41 v aa 10 v dd 26 s h u t ter 4 2 a gn d 11 ext c lk 27 f l ash 4 3 g nd 12 v dd 28 g n d 4 4 s l v s3 _p 13 g n d 29 v dd _p ll 4 5 s l v s 3_ n 14 v dd _i o 3 0 v pp 46 sl vs2 _p 15 s dat a 31 a gn d 47 sl vs2 _n 16 s cl k 32 v aa 48 sl vsc_p
10 e u nos roa d 8 1 3 - 4 0 , si n g a p or e p o st cen t e r , s i n g ap or e 40 86 00 pr od m k t g @ a p t i n a . c o m w w w . a p t i n a. c o m a p ti n a , a p ti n a i m a g i n g , h i s p i, a n d th e a p ti n a l o go a r e th e p r o p e r ty o f a p ti n a im a g i n g c o r p o ra ti o n all other trademarks are the property of their respective owners. m t 9j 003: 1/ 2. 3- i n c h 10m p cm o s d i gi t a l i m age se ns or r e v i si o n h i sto r y pdf : 4 7 9 138 88 11 sou r c e : 91 66 34 832 6 . MT9J003-ds - rev c 2/12 en 76 ?2009 aptina imaging corporation all rights reserved. apt i na conf i d ent i al and pr opr i et ar y re v i s i on hi s t o r y r ev . c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 /10/12 ? u pdated tr ademarks ? u pdated section on ? p ll ? on page 37 r ev . b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 /18/10 ? u pdated t a ble 1, ? a v a ilable p a r t n u mbers , ? on p a ge 1 ? u pdated t a b l e 2, ? k ey p e rformanc e p a r a me te rs , ? on pag e 1 ? a dded t a ble 25, ? c ra (13 .4) , ? on page 66 ? u pdated f i gur e 54: ?48-pi n i l c c p a ckage o u tli n e d r awing, ? on page 73 ? a dded f i gur e 55 : ? 48- pin tpl c c p a ckage outline d r awin g, ? on p a ge 74 ? a dded t a ble 38, ?48 - pin tpl c c pin assignment, ? on page 75 r ev . a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 /25/09 ?i n i t i a l r e l e a s e

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