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  directfet  power mosfet  
        directfet  isometric  applicable directfet outline and substrate outline   rohs compliant, halogen free   lead-free (qualified up to 260c reflow)   ideal for high performance isolated converter primary switch socket  optimized for synchronous rectification  low conduction losses  high cdv/dt immunity  low profile (<0.7mm)  dual sided cooling compatible   compatible with existing surface mount techniques   industrial qualified description the irf7769l1trpbf combines the latest hexfet? power mosfet silicon technology with the advanced directfet tm packaging to achieve the lowest on-state resistance in a package that has a footprint smaller than a d 2 pak and only 0.7 mm profile. the directfet package is compatible with existing layout geometries used in power applications, pcb assembly equipment and vapor phase, infra-red or con vection soldering techniques, when application note an-1035 is followed regarding the manufacturing methods and processes. the directfet package allows dual sided cooling to maximize thermal transfer in power systems. the irf7769l1trpbf is optimized for high frequency switching and synchronous rectification applications. the reduced total loss es in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for syste m reliability improvements, and makes this device ideal for high performance power converters. fig 1. typical on-resistance vs. gate voltage  click on this section to link to the appropriate technical paper.  click on this section to link to the directfet website.   surface mounted on 1 in. square cu board, steady state.   t c measured with thermocouple mounted to top (drain) of part.   repetitive rating; pulse width limited by max. junction temperature.  starting t j = 25c, l = 0.09mh, r g = 25 , i as = 74a.  2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 v gs , gate-to-source voltage (v) 0.00 2.00 4.00 6.00 8.00 10.00 12.00 t y p i c a l r d s ( o n ) , ( m ) t j = 25c t j = 125c i d = 74a fig 2. typical on-resistance vs. drain current 20 40 60 80 100 i d , drain current (a) 2.80 2.90 3.00 3.10 t y p i c a l r d s ( o n ) ( m ) t a = 25c v gs = 8.0v v gs = 7.0v v gs = 10v v gs = 15v v dss v gs r ds(on) 100v min 20v max 2.8m @ 10v q g tot q gd v gs(th) 200nc 110nc 2.7v sb sc m2 m4 l4 l6 l8 d s g d s s s s s s s absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) a i d @ t a = 25c continuous drain current, v gs @ 10v (silicon limited)  i d @ t c = 25c continuous drain current, v gs @ 10v (packa ge limited ) i dm pulsed drain current e as single pulse avalanche energy  mj i ar avalanche current  a 74 375 260 ma x. 88 20 500 20 100 124 
      
   
    note form quantity irf7769l1trpbf directfet large can tape and reel 4000 "tr" suffix part number package type standard pack
    
   
    
     repetitive rating; pulse width limited by max. junction temperature.   pulse width 400 s; duty cycle 2%. static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 100 ??? ??? v ? v dss / t j breakdown voltage temp. coefficient ??? 0.02 ??? v/c r ds(on) static drain-to-source on-resistance ??? 2.8 3.5 m v gs(th) gate threshold voltage 2.0 2.7 4.0 v v gs(th) / t j gate threshold voltage coefficient ??? -10 ??? mv/c i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 410 ??? ??? s q g total gate charge ??? 200 300 q gs1 pre-vth gate-to-source charge ??? 30 ??? q gs2 post-vth gate-to-source charge ??? 9.0 ??? nc q gd gate-to-drain charge ??? 110 165 q godr gate charge overdrive ??? 51 ??? see fig. 9 q sw switch charge (q gs2 + q gd ) ??? 119 ??? q oss output charge ??? 53 ??? nc r g gate resistance ??? 1.5 ??? t d(on) turn-on delay time ??? 44 ??? t r rise time ??? 32 ??? t d(off) turn-off delay time ??? 92 ??? ns t f fall time ??? 41 ??? c iss input capacitance ??? 11560 ??? c oss output capacitance ??? 1240 ??? pf c rss reverse transfer capacitance ??? 590 ??? c oss output capacitance ??? 6665 ??? c oss output capacitance ??? 690 ??? diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 124 (body diode) a i sm pulsed source current ??? ??? 500 (body diode)  v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 75 112 ns q rr reverse recovery charge ??? 220 330 nc i d = 74a v ds = 80v, v gs = 0v, t j = 125c v gs = 20v v gs = -20v v gs = 10v v ds = 25v, i d = 74a v ds = 50v t j = 25c, i f = 74a, v dd = 50v di/dt = 100a/ s  t j = 25c, i s = 74a, v gs = 0v  showing the integral reverse p-n junction diode. v ds = v gs , i d = 250 a v ds = 100v, v gs = 0v conditions v gs = 0v, i d = 250 a reference to 25c, i d = 2ma v gs = 10v, i d = 74a  v ds = 16v, v gs = 0v v dd = 50v, v gs = 10v  v gs = 0v ? = 1.0mhz i d = 74a mosfet symbol r g =1.8 v ds = 25v conditions v gs = 0v, v ds = 80v, f=1.0mhz v gs = 0v, v ds = 1.0v, f=1.0mhz
    
   
    
  fig 3. maximum effective transient thermal impedance, junction-to-case    surface mounted on 1 in. square cu board, steady state.  t c measured with thermocouple incontact with top (drain) of part.  used double sided cooling, mounting pad with large heatsink. 
 mounted on minimum footprint full size board with metalized back and with small clip heatsink. r is measured at t j of approximately 90c.  surface mounted on 1 in. square cu board (still air).   mounted on minimum footprint full size board with metalized back and with small clip heatsink. (still air) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci i / ri ci= i / ri c 4 4 r 4 r 4 ri (c/w) i (sec) 0.1080 0.000171 0.6140 0.053914 0.4520 0.006099 1.47e-05 0.036168 absolute maximum ratings parameter units p d @t c = 25c power dissipation w p d @t c = 100c power dissipation p d @t a = 25c power dissipation  t p peak soldering temperature c t j operating junction and t st g storage temperature range thermal resistance parameter typ. max. units r  ??? 45 r  12.5 ??? r ja junction-to-ambient  20 ??? c/w r j-can junction-to-can  ??? 1.2 r j-pcb junction-to-pcb mounted ??? 0.4 270 -55 to + 175 max. 3.3 125 63
    
   
    
  fig 5. typical output characteristics fig 4. typical output characteristics fig 6. typical transfer characteristics fig 7. normalized on-resistance vs. temperature fig 8. typical capacitance vs.drain-to-source voltage fig 9. typical total gate charge vs gate-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 25c 3.5v vgs top 15v 10v 8.0v 6.0v 5.0v 4.5v 4.0v bottom 3.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 175c 3.5v vgs top 15v 10v 8.0v 6.0v 5.0v 4.5v 4.0v bottom 3.5v 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) v ds = 25v 60 s pulse width t j = 175c t j = 25c t j = -40c -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 74a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 50 100 150 200 250 300 q g total gate charge (nc) 0 2 4 6 8 10 12 14 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v v ds = 50v v ds = 20v i d = 74a
    
   
    
  fig 13. typical threshold voltage vs. junction temperature fig 12. maximum drain current vs. case temperature fig 10. typical source-drain diode forward voltage fig11. maximum safe operating area 0.2 0.4 0.6 0.8 1.0 1.2 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) v gs = 0v t j = 175c t j = 25c t j = -40c 25 50 75 100 125 150 175 t c , casetemperature (c) 0 25 50 75 100 125 i d , d r a i n c u r r e n t ( a ) fig 14. maximum avalanche energy vs. drain current 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 13a 20a bottom 74a -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 1.0a i d = 1.0ma i d = 250 a 0 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec dc
    
   
    
  fig 17. 
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!#"$  for n-channel hexfet   power mosfets fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 ) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 19a, 19b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) =
 t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 40 80 120 160 200 240 280 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 74a p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period %   
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  fig 18a. gate charge test circuit fig 18b. gate charge waveform fig 19b. unclamped inductive waveforms t p v (br)dss i as fig 19a. unclamped inductive test circuit fig 20b. switching time waveforms fig 20a. switching time test circuit r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v '  vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 1k vcc dut 0 l s 20k v ds 90% 10% v gs t d(on) t r t d(off) t f   ( ) 1 *   $
0.1 %        + -  
    
   
    
  g = gate d = drain s = source d d d d d d ss s s g ss ss 
         please see an-1035 for directfet assembly details and stencil and substrate design recommendations note: for the most current drawing please refer to ir website at http://www.irf.com/package
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  directfet  part marking note: for the most current drawing please refer to ir website at http://www .irf.com/package 
          please see an-1035 for directfet assembly details and stencil and substrate design recommendations max 0.360 0.280 0.236 0.026 0.024 0.048 0.017 0.030 0.017 0.058 0.106 0.0274 0.0031 0.007 imperial metric dimensions min 0.356 0.270 0.232 0.022 0.023 0.046 0.015 0.029 0.015 0.053 0.099 0.0235 0.0008 0.003 code a b c d e f g h j k l m n p min 9.05 6.85 5.90 0.55 0.58 1.18 0.98 0.73 0.38 1.34 2.52 0.616 0.020 0.09 max 9.15 7.10 6.00 0.65 0.62 1.22 1.02 0.77 0.42 1.47 2.69 0.676 0.080 0.18 part number logo batch number date code line above the last character of the date code indicates "lead-free" gate marking +
    
   
    
  directfet  tape & reel dimension (showing component orientation). loaded tape feed direction note: controlling dimensions in mm code a b c d e f g h imperial min 4.69 0.154 0.623 0.291 0.283 0.390 0.059 0.059 max 12.10 4.10 16.30 7.60 7.40 10.10 n.c 1.60 min 11.90 3.90 15.90 7.40 7.20 9.90 1.50 1.50 metric dimensions max 0.476 0.161 0.642 0.299 0.291 0.398 n.c 0.063 +   qualification standards can be found at international rectifier?s web site http://www.irf.com/product-info/reliability   higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales representative for further information: http://www.irf.com/whoto-call/salesrep/   applicable version of jedec standard at the time of product release. *  industrial qualification standards except auto-clav test conditions 
 
 

  
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&# '## ())*** "+)*'#," ) note: controlling dimensions in mm std reel quantity is 4000 parts. (ordered as irf7769l1trpbf). reel dimensions max n.c n.c 0.520 n.c 3.940 0.880 0.720 0.760 imperial min 330.00 20.20 12.80 1.50 99.00 n.c 16.40 15.90 standard option (qty 4000) code a b c d e f g h max n.c n.c 13.20 n.c 100.00 22.40 18.40 19.40 min 12.992 0.795 0.504 0.059 3.900 n.c 0.650 0.630 metric note: for the most current drawing please refer to ir website at http://www.irf.com/package qualification level msl 1 (per jedec j-std-020d ??? ) rohs compliant yes moisture sensitivity level directfet qualification information ? industrial ?? * revision history date comments 2/13/2013 tr1 option removed and tape & reel info updated accordingly. hyperlinks added throw-out the document


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