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  STN4826 dual n channel enhancement mode mosfet 8.0a 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STN4826 2013. v1 1 description the STN4826 is the dual n-channel logic enhancement mode power field effect transistors are produced using high cell density , dmos trench technology. this high density process is especially tailored to minimize on-state resistance. these devices are particularly suited for low voltage app lication , notebook computer power management and other battery powered circuits where high-side switching . pin configuration sop-8 marking y: year code a: porduce code b: process code feature  60v/ 8.0a, r ds(on) = 30m? (typ.) @vgs = 10v  60v/6.0a, r ds(on) = 40m? @vgs = 4.5v  super high density cell design for extremely low r ds(on)  exceptional on-resistance and maximum dc current capability  sop-8 package design
STN4826 dual n channel enhancement mode mosfet 8.0a 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STN4826 2013. v1 2 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drain-source voltage v dss 60 v gate-source voltage v gss 20 v continuous drain current (tj=150 ) t a =25 t a =70 i d 8.0 6.0 a pulsed drain current i dm 20 a continuous source current (diode conduction) i s 2.0 a power dissipation t a =25 t a =70 p d 2.0 1.3 w operation junction temperature t j -55/150 storgae temperature range t stg -55/150 thermal resistance-junction to ambient r ja 75 /w
STN4826 dual n channel enhancement mode mosfet 8.0a 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STN4826 2013. v1 3 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drain-source breakdown voltage v (br)dss v gs =0v,i d =250ua 60 v gate threshold voltage v gs(th) v ds =v gs ,i d =250 ua 0.8 2.5 v gate leakage current i gss v ds =0v,v gs = 20v 100 na v ds =48v,v gs =0v 1 zero gate voltage drain current i dss t j =55 v ds =48v,v gs =0v 5 ua on-state drain current i d(on) v ds Q 5v,v gs =4.5v 20 a drain-source on-resistance r ds(on) v gs = 10v, i d =8a v gs = 4.5v, i d =4a 0.030 0.040 0.038 0.045 forward tran conductance g fs v ds =5.0v,i d =5.3a 11 s diode forward voltage v sd i s =1.7a,v gs =0v 0.8 1.0 v dynamic total gate charge q g 10 gate-source charge q gs 3.5 gate-drain charge q gd v ds =15v,v gs =10v i d 5.3a 3.6 nc input capacitance ciss 455 output capacitance coss 243 reverse transfercapacitance crss vds=15v,vgs=0v f=1mhz 45 pf 10 14 turn-on time t d(on) tr 10 20 20 35 turn-off time t d(off) tf v dd =15v,r l =15 i d =1.4a,v gen =10v r g =6 10 15 ns
STN4826 dual n channel enhancement mode mosfet 8.0a 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STN4826 2013. v1 4 typical characterictics (25 unless note)
STN4826 dual n channel enhancement mode mosfet 8.0a 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STN4826 2013. v1 5
STN4826 dual n channel enhancement mode mosfet 8.0a 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2007, stanson corp. STN4826 2013. v1 6 sop-8 package outline


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