cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 1 / 9 mtb030 n 04 n3 cyste k product specification 40 v n - channel enhancement mode mosfet mtb030 n 04 n3 features ? low on - resistance ? low voltage gate drive ? excellent thermal and electrical capabilities ? pb - free lead plating and halogen - free package equivalent circuit outline ordering information device package shipping MTB030N04N3 - 0 - t1 - g sot - 23 ( pb - free lead plating and halogen - free package ) 3000 pcs / tape & reel mtb030 n 04 n3 sot - 23 g gate s sour c e d drain d g s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel,7 reel product rank, zero for n o rank products product name bv dss 40v i d @v gs =10v 8a r dson(typ) v gs= 10v, i d =7.9a 25.3m v gs= 4.5v, i d =7.3a 34.2m
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 2 / 9 mtb030 n 04 n3 cyste k product specification absolute maximum ratings (ta=25 ? c) paramete r symbol limits unit drain - sour c e voltage v ds 40 v gate - source voltage v gs 20 continuous drain current @ v gs = 10 v, t c =25 ? c i d 8 a continuous drain current @ v gs = 10 v, t c =125 ? c 4.6 continuous drain current @ v gs = 10 v, t a =25 ? c (note 3) i dsm 4.7 continuous drain current @ v gs = 10 v, t a =70 ? c (note 3) 3.8 pulsed drain current (note 1, 2) i dm 32 maximum power dissipation t c =25 c p d 3 w t c =125 c 1 t a =25 c p d sm 1. 25 t a =70 c 0.8 operating juncti on and storage temperature tj , tstg - 55~+1 75 ? c thermal performance parameter symbol limit unit thermal resistance, junction - to - ambient , max (note 3) r ja 100 ? c /w thermal resistance, junction - to - case , max r j c 50 note: 1. p ulse width limited by maximum junction temperature. 2. pulse width 300 s , duty cycle 2% 3. surface mounted on 1 in2 copper pad of fr - 4 board at steady state; 417 ? c/w when mounted on minimum copper pad. 4. the power dissipation p d is based on t j(max) =175 c, using junction - to - case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 5. the power dissipation p dsm is based on r ja an d the maximum allowed junction temperature of 150 c. the value in any given application depends on the users specific board design, and the maximum temperature of 175 c may be used if the pcb allows it. electrical characteristics (t j =25 ? c , unless oth erwise specified ) symbol min. typ. max. unit test conditions static bv dss 40 - - v v gs =0v, i d = 25 0 a bv dss /tj - 32 - m v/ reference to 25 , i d = 250 a v gs(th) 1.0 - 2.5 v v ds =v gs , i d = 25 0 a g fs - 9.1 - s v ds =5v, i d =7.9a i gss - - 10 0 n a v gs = 20 v , v ds =0v i dss - - 1 a v ds =40v, v gs =0v - - 50 v ds =40v, v gs =0v, tj=125 ? c - - 150 v ds =40v, v gs =0v, tj =175 ? c * r ds(on) - 25.3 34 m ? v gs =10v, i d = 7.9 a - - 4 7 v gs =10v, i d = 7.9 a , tj=125 ? c - - 65 v gs =10v, i d = 7.9 a , tj=175 ? c - 34.2 46 v gs =4.5v, i d = 7.3 a
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 3 / 9 mtb030 n 04 n3 cyste k product specification dynamic ciss - 694 - pf v ds =20v, v gs =0, f=1mhz coss - 36 - crss - 40 - * t d(on) - 6.8 - ns v d s = 2 0 v, i d =1a, v gs =10v, r g = 1 * t r - 15.8 - * t d(off) - 22 - * t f - 5.4 - * qg - 11 - nc v ds = 20 v, i d = 3.9 a, v gs = 10 v * qgs - 2.02 - * qgd - 2.05 - rg - 1.9 - f=1mhz source - drain diode *i s - - 3.8 a *i sm - 32 * v sd - 0.82 1. 2 v v gs =0v, i s = 5.4 a *trr - 6.7 - ns i f =3 .9a, di f /dt=100a/ s *qrr - 2.9 - nc *pulse test : pulse width ? 300s, duty cycle ? 2% recommended soldering footprint
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 4 / 9 mtb030 n 04 n3 cyste k product specification typical characteristics typical output characteristics 0 4 8 12 16 20 24 28 32 0 1 2 3 4 5 v ds , drain-source voltage(v) i d , drain current(a) v gs = 2.5 v 3 v 3.5v 4 v 10v, 9v, 8v, 7v, 6v, 5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature( c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) 4.5v 3 v 10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 1 2 3 4 5 6 7 8 9 10 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25 c tj=150 c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 30 60 90 120 150 180 210 240 270 300 0 2 4 6 8 10 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d = 7.9 a drain-source on-state resistance vs junction tempearture 0.4 0.8 1.2 1.6 2 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature( c) r ds(on) , normalized static drain- source on-state resistance v gs = 10 v, i d = 7.9 a r dson @tj=25c : 25.3m typ.
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 5 / 9 mtb030 n 04 n3 cyste k product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature( c) v g s(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) pulsed ta=25 c v ds = 5 v gate charge characteristics 0 2 4 6 8 10 0 2 4 6 8 10 12 qg, total gate charge(nc) v gs , gate-source voltage(v) v ds = 20 v i d = 3.9 a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms t a =25c, tj=1 50 c,v gs = 10 v r ja = 100 c/w, single pulse 100 s maximum drain current vs case temperature 0 1 2 3 4 5 6 7 8 9 10 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs = 10 v , r jc =50c/w
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 6 / 9 mtb030 n 04 n3 cyste k product specification typical characteristics(cont.) typical transfer characteristics 0 4 8 12 16 20 24 28 32 0 1 2 3 4 5 v gs , gate-source voltage(v) i d , drain current(a) v ds = 5 v single pulse power rating, junction to ambient (note on page 2) 0 1 2 3 4 5 6 7 8 9 10 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =100c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =100c/w
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 7 / 9 mtb030 n 04 n3 cyste k product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 8 / 9 mtb030 n 04 n3 cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second m ax. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of th e package, measured on the package body surface.
cystech electronics corp. spec. no. : c 884 n3 issued date : 20 14.08.20 revised date : page no. : 9 / 9 mtb030 n 04 n3 cyste k product specification sot - 23 dimension *: typical dim inches millimeters dim inches millimeters min. max. min. max. min. max. min. max. a 0.1 063 0.12 20 2. 7 0 3. 10 j 0.0034 0.007 9 0. 0 85 0. 20 b 0.0472 0.0630 1.20 1.60 k 0.0128 0.0266 0.32 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1 161 2.10 2. 9 5 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.000 0 0.0040 0.0 0 0.10 notes: 1. controlling dimension: millim eters. 2 . maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cyste k sales office. ma terial: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves the right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? cyste k assumes no liability for any consequence of customer produ ct design, infringement of patents, or application assistance. style: pin 1.gate 2.source 3.drain marking: 3 - lead sot - 23 plastic surface mounted package cyste k package code: n3 30n04 h j k d a l g v c b 3 2 1 s te
|
