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eua4992/4992a ds4992/4992a ver1.0 mar. 2009 1 2.25w stereo audio power amplifier description the eua4992/4992a are dual bridge-connected audio power amplifiers, capable of delivering 1.25w of continuous average power to an 8 ? btl with less than 1% distortion (thd+n) from a 5.0v power supply, and 540mw to an 8 ? btl load from a 3.3v power supply. the eua4992/4992a provide high quality audio while requiring few external components and minimal power consumption. they feature a low-power shutdown mode, which is achieved by driving the pin with logic low. the eua4992/4992a contain circuitry to prevent from ?pop and click? noise that would otherwise occur during turn-on and turn-off transitions. for maximum flexibility, the eua4992/4992a provide an externally controlled gain (with resistors), as well as an externally controlled turn-on and turn-off times (with the bypass capacitor). the eua4992/4992a are avai lable in a 16-pin tqfn package. typical application circuit features z output power at 10% thd+n, v dd =5v -- 2.25w/ch (typ) into a 4 ? load -- 1.54w/ch (typ) into a 8 ? load z output power at 1% thd+n, v dd =5v -- 1.9w/ch (typ) into a 4 ? load -- 1.25w/ch (typ) into a 8 ? load z output power at 1% thd+n, v dd =3.3v -- 0.75w/ch (typ) into a 4 ? load -- 0.54w/ch (typ) into a 8 ? load z shutdown current 0.06a (typ) z supply voltage range 2.5v to 5.5v z ?click and pop? suppression z thermal shutdown protection circuitry z available in 3mm ?? 3mm tqfn-16 (eua4992) and 4mm ?? 4mm tqfn-16 (EUA4992A) packages z rohs compliant and 100% lead(pb)-free applications z cell phones z portable and desktop computers z portable audio system z multimedia monitors figure 1. shutdown http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 2 pin configurations package type pin configurations tqfn-16 pin description name pin i/o description ina 4 i left channel input inb 8 i right channel input -outa 3 o left channel ?output +outa 1 o left channel +output -outb 10 o right channel ?output +outb 12 o right channel +output vdd 2,11 supply voltage shutdown 15 i shutdown control, hold low for shutdown mode bypass 9 bypass capacitor which provides the common mode voltage gnd 5,6,7,13,14,16 gnd http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 3 ordering information order number package type marking operating temperature range eua4992jir1 tqfn-16 xxxxx a4992 -40 c to +85c EUA4992Ajir1 tqfn-16 xxxxx 4992a -40 c to +85c eua4992/a ?? ?? ?? ?? lead free code 1: lead free 0: lead packing r: tape & reel operating temperature range i: industry standard package type j: tqfn http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 4 absolute maximum ratings t supply voltage ---------------------------------------------------------------------------------------------- 6v t input voltage --------------------------------------------------------------------------------- -0.3 v to v dd +0.3v t storage temperature rang, t stg ----------------------------------------------------------------- -65c to +150c t junction temperature -------------------------------------------------------------------------------------- 150c recommended operating conditions min max unit supply voltage (from ac input),v cc 2.5 5.5 v operating junction temperature range, t j -40 150 c electrical characteristics (5v) the following specifications apply for v dd =5v unless otherwise noted. limits apply for t a =+25c. eua4992/4992a symbol parameter conditions min typ max. unit v dd supply voltage 2.5 5.5 v i dd quiescent power supply current v in =0v,i o =0a 5 8 ma i sd shutdown current gnd applied to the shutdown pin 0.06 1 a v ih shutdown input voltage hi g h 1.1 v v il shutdown input voltage l 0.9 v t wu turn on time 1 f bypass cap (c4) 107 ms v os output offset voltage v in =0v 5 25 mv thd+n=1%, f=1khz r l =4 ? (note 1) 1.90 w thd+n=1%, f=1khz r l =8 ? 1.25 w thd+n=10%, f=1khz r l =4 ? (note 1) 2.25 w p o output power thd+n=10%, f=1khz r l =8 ? 1.54 w thd+n total harmonic distortion + noise 1khz, avd=2 r l =8 ? ,po=1w 0.06 % input grounded f=217hz vripple=200m vp-p c4=1 f, r l =8 ? 51 input grounded f=1khz vripple=200m vp-p c4=1 f, r l =8 ? 63 input unterminated f=217hz vri pp le=200m v p - p c4=1 f, r l =8 ? 69 psrr power supply rejection ratio input unterminated f=1khz vri pp le=200m v p - p c4=1 f, r l =8 ? 66 db xtalk channel separation f=1khz, c4=1 f 95 db v no output noise voltage 1khz 11 uvrms note 1. the thermal performance of the qfn package when used with the expose d-dap connected to a thermal plane is sufficient for driving 4 ? loads. http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 5 electrical characteristics (3.3v) the following specifications apply for v dd =3.3v unless otherwise noted. limits apply for t a =+25c. eua4992/4992a symbol parameter conditions min typ max. unit i dd quiescent power supply current v in =0v,i o =0a 3.8 ma i sd shutdown current gnd applied to the shutdown pin 0.02 a v ih shutdown input voltage hi g h 0.9 v v il shutdown input voltage l 0.8 v t wu turn on time 1 f bypass cap (c4) 105 ms v os output offset voltage v in =0v 5 mv thd+n=1%, f=1khz r l =4 ? (note 1) 0.75 w thd+n=1%, f=1khz r l =8 ? 0.54 w thd+n=10%, f=1khz r l =4 ? (note 1) 0.93 w p o output power thd+n=10%, f=1khz r l =8 ? 0.64 w thd+n total harmonic distortion + noise 1khz, avd=2 r l =8 ? ,po=0.25w 0.076 % input grounded f=217hz vripple=200m vp-p c4=1 f, r l =8 ? 51 input grounded f=1khz vripple=200m vp-p c4=1 f, r l =8 ? 64 input unterminated f=217hz vri pp le=200m v p - p c4=1 f, r l =8 ? 76 psrr power supply rejection ratio input unterminated f=1khz vri pp le=200m v p - p c4=1 f, r l =8 ? 70 db xtalk channel separation f=1khz, c4=1 f 95 db v no output noise voltage 1khz 11 uvrms note 1. the thermal performance of the qfn package when used with the expose d-dap connected to a thermal plane is sufficient for driving 4 ? loads. http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 6 typical operating characteristics figure2. figure4. figure6. figure3. figure5. figure7. http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 7 figure8. figure10. figure12. figure9. figure11. figure13. http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 8 figure14. figure16. figure18. figure15. figue17. figure19. 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 8 ohm 4 ohm power dissipation vs output power, v dd =5v power dissipation(w) output power(w) http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 9 figure20. figure22. figure24. figure21. figure23. figure25. 0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 8 ohm 4 ohm power dissipation vs output power, v dd =3.3v power dissipation(w) output power(w) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 1% thd+n 10% thd+n f=1khz output power vs supply voltage, rl=4 ohm output power(w) supply voltage(v) 0.00.10.20.30.40.50.6 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 8 ohm 4 ohm power dissipation vs output power, v dd =2.6v power dissipation(w) output power(w) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 1% thd+n 10% thd+n f=1khz output power vs supply voltage, rl=8 ohm output power(w) supply voltage(v) 2.53.03.54.04.55.05.5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1% thd+n 10% thd+n f=1khz output power vs supply voltage, rl=16 ohm output power(w) supply voltage(v) http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 10 figure26. http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 11 application information bridged configuration explanation as shown in figure 1 , the eua4992/4992a consists of two pairs of operational amplifiers, forming a two-channel (channel a and channel b) stereo amplifier. (though the following discusses channel a, it applies equally to channel b.) external resistors rf and ri set the closed-loop gain of amp1a, whereas two internal 20k ??? resistors set amp2a?s gain at -1. the eua4992/4992a drives a load, such as a speaker, connected between the two amplifier outputs, -outa and +outa. figure 1 shows that amp1a?s output serves as amp2a?s input. this results in both amplifiers producing signals identical in magnitude, but 180 out of phase. taking advantage of this phase difference, a load is placed between ?outa and +outa and driven differentially (commonly referred to as "bridg e mode"). this results in a differential gain of (1) bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier?s output and ground. for a given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. this produces four times the output power when compared to a single-ended amplifier under the same conditions. this increase in attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped. to ensure minimum output signal clipping when choosing an amplifier?s closed-loop gain, refer to the audio power amplifier design section. another advantage of the differential bridge output is no net dc voltage across the load. this is accomplished by biasing channel a?s and channel b?s outputs at half-supply. this eliminates the coupling capacitor that single supply, single ended amplifiers require. eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier?s half-supply bias voltage across the load. this increases internal ic power dissipation and may permanently damage loads such as speakers. power supply bypassing as with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. applications that employ a 5v regulator typically use a 10f in parallel with a 0.1f filter capacitors to stabilize the regulator?s output, reduce noise on the supply line, and improve the supply?s transient response. however, their presence does not eliminate the need for a local 1.0f tantalum bypass capacitance connected between the eua4992/4992a?s supply pins and ground. do not substitute a ceramic capacitor for the tantalum. doing so may cause oscillation in the output signal. keep the length of leads and traces that connect capacitors between the eua4992/4992a?s power supply pin and ground as short as possible. connecting a 1f capacitor, c b , between the bypass pin and ground improves the internal bias voltage?s stability and improves the amplifier?s psrr. the ps rr improvements increase as the bypass pin capacitor value increases. too large, however, increases turn-on time and can compromise amplifier?s click and pop performance. the selection of bypass capacitor values, especially c b , depends on desired psrr requirements, click and pop performance (as explained in the section, proper selection of external components ), system cost, and size constraints. micro-power shutdown the voltage applied to the shutdown pin controls the eua4992/4992a?s shutdown function. activate micro-power shutdown by applying v dd to the shutdown pin. when active, the eua4992/4992a?s micro-power shutdown feature turns off the amplifier?s bias circuitry, reducing the supply current. there are a few ways to control the micro-power shutdown. these include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. when using a switch, connect an external 10k ? pull-up resistor between the shutdown pin and v dd . connect the switch between the shutdown pin and ground. select normal amplifier operation by closing the switch. opening the switch connects the shutdown pin to v dd through the pull-up resistor, disable micro-power shutdown. the switch and resistor guarantee that the shutdown pin will not float. this prevents unwanted state changes. in a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the shutdown pin. driving the shutdown pin with active circuitry eliminates the pull up resistor. table 1. logic level truth table for shutdown operation shutdown operational mode high full power, stereo btl amplifiers low micro-power shutdown selecting proper external components optimizing the eua4992/4992a?s performance requires properly selecting external components. though the eua4992/4992a operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. the eua4992/4992a is unity-gain stable, giving a designer maximum design flexibility. the gain should be set to no more than a given application requires. this allows the amplifier to achieve minimum thd+n and maximum signal-to-noise ratio. these parameters are compromised as the closed-loop gain increases. however, low gain demands input signals with greater voltage swings to achieve maximum output power. fortunately, many signal sources such as audio codecs have outputs ( ) i r/ f r2 vd a = http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 12 of 1v rms (2.83v p-p ). please refer to the audio power amplifier design section for more information on selecting the proper gain. input capacitor value selection amplifying the lowest audio frequencies requires high value input coupling capacitor (c i in figure 1 ). a high value capacitor can be expensive and may compromise space efficiency in portable designs. in many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150hz. applications using speakers with this limited frequency response reap little improvement by using large input capacitor. besides effecting system cost and size, c i has an affect on the eua4992/4992a?s click and pop performance. when the supply voltage is first applied, a transient (pop) is created as the charge on the input capacitor changes from zero to a quiescent state. the magnitude of the pop is directly proportional to the input capacitor?s size. higher value capacitors need more time to reach a quiescent dc voltage (usually v dd/2 ) when charged with a fixed current. the amplifier?s output charges the input capacitor through the feedback resistor, r f . thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired -3db frequency. a shown in figure 1 , the input resistor (r i ) and the input capacitor, c i produce a -3db high pass filter cutoff frequency that is found using equation (2). (2) as an example when using a speaker with a low frequency limit of 150hz, c i . the 1.0f c i shown in figure 1 allows the eua4992/4992a to drive high efficiency, full range speaker whose response extends below 30hz. bypass capacitor value selection besides minimizing the input capacitor size, careful consideration should be paid to value of c b , the capacitor connected to the bypass pin. since c b determines how fast the eua4992/4992a settles to quiescent operation, its value is critical when minimizing turn-on pops. the slower the eua4992/4992a?s outputs ramp to their quiescent dc voltage (nominally 1/2 v dd ), the smaller the turn-on pop. choosing cb equal to 1.0f along with a small value of c i (in the range of 0.1f to 0.39f), produces a click-less and pop-less shutdown function. as discussed above, choosing c i no larger than necessary for the desired bandwidth helps minimize clicks and pops. optimizing click and po p reduction performance the eua4992/4992a contains circuitry to minimize turn-on and shutdown transients or "clicks and pop". for this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. while the power supply is ramping to its final value, the eua4992/4992a?s internal amplifiers are configured as unity gain buffers. an internal current source changes the voltage of the bypass pin in a controlled, linear manner. ideally, the input and outputs track the voltage applied to the bypass pin. the gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches 1/2 v dd . as soon as the voltage on the bypass pin is stable, the device becomes fully operational. although the bypass pin current cannot be modified, changing the size of cb alters the device?s turn-on time and the magnitude of "clicks and pops". increasing the value of c b reduces the magnitude of turn-on pops. however, this presents a tradeoff: as the size of c b increases, the turn-on time increases. there is a linear relationship between the size of c b and the turn-on time. in order eliminate "clicks and pops", all capacitors must be discharged before turn-on. rapidly switching v dd may not allow the capacitors to fully discharge, which may cause "clicks and pops". audio power amplifier design audio amplifier design: driving 1w into an 8 ? load the following are the desired operational parameters: power output: 1w rms load impedance: 8 ? input level: 1v rms input impedance: 20k ? bandwidth: 100hz-20 khz 0.25 db the design begins by specifying the minimum supply voltage necessary to obtain the specified output power. one way to find the minimum supply voltage is to use the output power vs supply voltage curve in the typical performance characteristics section. another way, using equation (4), is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. to account for the amplifier?s dropout voltage, two additional voltages, based on the dropout voltage vs supply voltage in the typical performance characteristics curves, must be added to the result obtained by equation (3). the result in equation (4). (3) (4) the output power vs supply voltage graph for an 8 ? load indicates a minimum supply voltage of 4.6v. this is easily met by the commonly used 5v supply voltage. the additional voltage creates the benefit of headroom, allowing the eua4992/4992a to produce peak output power in excess of 1w without clipping or other audible distortion. the choice of supply voltage must also not create a situation that violates maximum power dissipation as explained above in the power dissipation section. iin _3db cr2 1 f = () ol opeak pr2 v = ( ) ( ) bot od top od outpeak dd vv vv ++ http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 13 after satisfying the eua4992/4992a?s power dissipation requirements, the minimum differential gain is found using equation (5). (5) thus, a minimum gain of 2.83 allows the eua4992/4992a?s to reach full output swing and maintain low noise and thd+n performance. for this example, let a vd = 3. the amplifier?s overall gain is set using the input (r i ) and feedback (r f ) resistors. with the desired input impedance set at 20k ? , the feedback resistor is found using equation (6). (6) the value of r f is 30 k ? . the last step in this design example is setting the amplifier?s -3db frequency bandwidth. to achieve the desired 0.25db pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. the gain variation for both response limits is 0.17db, well within the 0.25db desired limit. the results are an (7) and an (8) as mentioned in the external components section, r i and c i create a highpass filter that sets the amplifier?s lower bandpass frequency limit. find the coupling capacitor?s value using equation (9). (9) the result is (10) use a 0.39f capacitor, the closest standard value. the product of the desired high frequency cutoff (100khz in this example) and the differential gain, a vd , determines the upper pass band response limit. with a vd = 3 and f h = 100khz, the closed-loop gain bandwidth product (gbwp) is 300khz. this is less than the eua4992/4992a?s 3.5mhz gbwp. with this margin, the amplifier can be used in designs that require more differential gain while avoiding performance-lrestricting bandwidth limitations. thermal pad considerations the thermal pad must be connected to ground. the package with thermal pad of the eua4992/4992a requires special attention on thermal design. if the thermal design issues are not properly addressed, the eua4992/4992a will go into thermal shutdown when driving a heavy load. the thermal pad on the bottom of the eua4992/4992a should be soldered down to a copper pad on the circuit board. heat can be conducted away from the thermal pad through the copper plane to ambient. if the copper plane is not on the top surface of the circuit board, 8 to 10 vias of 13 mil or smaller in diameter should be used to thermally couple the thermal pad to the bottom plane. for good thermal conduction, the vias must be plated through and solder filled. the copper plane used to conduct heat away from the thermal pad should be as large as practical. if the ambient temperature is higher than 25 j ,a larger copper plane or forced-air cooling will be required to keep the eua4992/4992a junction temperature below the thermal shutdown temperature (150 j). in higher ambient temperature, higher airflow rate and/or larger copper area will be required to keep the ic out of thermal shutdown. () () vinrms/vorms v/rpa inlo vd = 2/ar/r vdif = hz205/hz100 l f = = ci i fr2 1 c khz1005khz20 h f == () f398.0hz20k202/1 =??? http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 14 packaging information tqfn-16 (3mm 3mm) millimeters inches symbols min. max. min. max. a 0.70 0.80 0.028 0.031 a1 0.00 0.05 0.000 0.002 b 0.18 0.30 0.007 0.012 e 2.90 3.10 0.114 0.122 d 2.90 3.10 0.114 0.122 d1 1.70 0.067 e1 1.70 0.067 e 0.50 0.020 l 0.30 0.50 0.012 0.020 http://www.bdtic.com/eutech
eua4992/4992a ds4992/4992a ver1.0 mar. 2009 15 tqfn-16 (4mm 4mm) millimeters inches symbols min. max. min. max. a 0.70 0.80 0.028 0.031 a1 0.00 0.05 0.000 0.002 b 0.25 0.35 0.009 0.014 e 3.90 4.10 0.153 0.161 d 3.90 4.10 0.153 0.161 d1 2.50 0.098 e1 2.50 0.098 e 0.65 0.026 l 0.30 0.50 0.012 0.020 detaila http://www.bdtic.com/eutech

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