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| mp5414 pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 1 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the mp5414 is a highly-efficient fully-integrated pmu with a current-mode step-up converter, four single-pole/double-throw switches, low drop-out, and a battery charger designed for battery-powered supply applications. the step-up converter can start-up from an input voltage as low as 1.8v. it uses a current- limited variable-frequency control algorithm to optimize efficiency and minimize external component size and cost. the internal low- resistance n-channel mosfet switch can withstand up to 10v, allowing the mp5414 to produce a high output voltage with high efficiency from a dual-cell nicd/nimh or single- cell li-ion battery. in addition, the step-up converter can disconnect all loads from the input dc power supply. the charger features constant-current and constant-voltage charging modes with a programmable charge current (50ma to 300ma), trickle-charge capability, and a charge- status indicator. charging is enabled with an input voltage greater than 3.5v, and is disabled when unplugged from the ac adaptor. the charger does not need an external reverse- blocking diode. the low-dropout linear regulator operates with low noise from a 2.7v-to-6.5v input voltage, and regulates the output voltage with 2% accuracy from 1.25v to 5v. the mp5414 is available in a 4mm x 5mm 28- pin qfn package. features boost ? 1.8v low voltage start-up ? 1.8v to 5.5v input range ? output disconnect ? integrated power mosfet and schottky diode ? variable frequency control ? <1 a shutdown current ? current mode control with internal compensation ? inrush current limiting and internal soft- start ? input under-voltage lockout charger ? 0.75% v batt accuracy ? low reverse-battery current (< 1a) ? programmable charge current ? charge status indication ? no external sense resistor ? no external reverse blocking diode linear regulator ? low 100mv dropout at 100ma output ? programmable output voltage with 2% accuracy ? up to 6.5v input voltage ? high psrr: 70db at 1khz ? better than 0.001%/ma load regulation ? stable with low-esr output capacitor applications ? 2-cell and 3-cell nicd/nimh or single-cell li-ion battery consumer products ? 3d glass driver ? small lcd displays bias supply ? digital still and video cameras ? smartphones, netbooks, and handheld video game consoles all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithi c power systems, inc.
mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 2 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical application mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 3 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* package top marking MP5414DV qfn28 (4x5mm) mp5414 * for tape & reel, add suffix ?z (e.g. MP5414DV?z); for rohs compliant packaging, add suffix ?lf (e.g. MP5414DV?lf?z) package reference top view 1 2 3 4 5 6 7 8 22 21 20 19 18 17 16 15 91011121314 28 27 26 25 24 23 s2 bstgnd d c s3 s1 bsten bstl chggnd chgz ldoen ldoin ldognd ldoout chggnd chgin b a s0 ipgm batt bstin bstsw ldofb ldoout bstfb bstiset bstout mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 4 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. absolute maxi mum ratings (1) bstsw, a, b, c, d to bstgnd ...-0.5v to +12v chgin to chggnd .....................-0.3v to +25v ldoin to ldognd......................-0.3v to +7.0v ldofb to ldognd.... -0.3v to (v ldoout + 0.3v) all other pins................................-0.3v to +6.0v continuous power dissipation (t a = 25c) (2) ............................................................ 3.1 w junction temperature ...............................140c lead temperature ....................................260c storage temperature............... -65c to +150c recommended operating conditions (3) v bstin .............................................1.8v to 5.5v v bstout .......................................... v bstin to 10v v chgin .........................................4.75v to 5.25v v ldoin ..............................................2.7v to 6.5v v ldoout .............................................1.25v to 5v i ldoout .....................................250ma maximum operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc qfn28 (4x5mm) ....................40 ....... 9 .... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operation conditions. 4) measured on jesd51-7 4-layer board. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 5 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics v bstin = 2.4v, v bstout =10v, i bstout =2ma, v chgin = v ldoin = 5v, t a = 25c, unless otherwise noted. parameters symbol condition min typ max units step-up converter operating input voltage v bstin 1.8 5.5 v minimum startup voltage v bstst v bstout =0v 1.8 v quiescent current i bstq_ns i bstout =0, v bstfb =1.3v, no switching 28 50 a shutdown current i bstsd v bsten =0v 0.1 1 a in under voltage lockout v bstuvlo v bstin rising 1.58 1.7 v under voltage lockout hysteresis 100 mv maximum on time t bston 4 6 7.5 s minimum off time t bstoff 400 550 700 ns sw on-resistance r bstds_on i bstsw = 200ma 0.73 0.8 ? sw leakage current i bstsw_lkg v bstsw =12v 2 a sw current limit i bstsw_limit r bstiset =300k ? 180 ma schottky diode forward voltage v bstfw i bstfw =100ma 0.4 0.5 0.6 v fixed out supply voltage v bstout_fd let bstfb pin floating, 1.8v mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 7 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics (continued) v bstin = 2.4v, v bstout =10v, i bstout =2ma, v chgin = v ldoin = 5v, t a = 25c, unless otherwise noted. parameters symbol condition min typ max units spdt switch switch on-resistance r spdt_on v bstout =10v, i a , i b , i c , i d =2ma 25 50 ? switch on-resistance match between channels ? r spdt_on v bstout =10v, i a , i b , i c , i d =2ma 10 ? turn-on time t on r l = 300 ? , c l = 35pf 80 ns turn-off time t off r l = 300 ? , c l = 35pf 170 ns protection output disconnect switch on- resistance r disc_on v bstout =10v 0.74 0.8 ? thermal shutdown 150 c notes: 5) i chg is the target preprogrammed charge current (die temperature below 110c). 6) guarantee by design 7) dropout voltage is defined as the input to output differ ential when the output voltage drops 1% below its normal value 8) v ldoin = 2.7v for v ldoout = 1.25v to 2.2v. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 8 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics step-up converter v bstin = v bsten = 2.4v, v bstout = 10v, i bstout = 2ma, l1 = 10h/150m ? , unless otherwise noted. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 9 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics ( continued ) charger v chgin = 5v, c3 = c5 = 1f, t a = 25c, unless otherwise noted. 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 4.9 4.2 3.5 2.8 2.1 1.4 0.7 0.0 charge current (a) 0 20 40 60 80 100 battery charge curve i batt v batt v status charge current vs. battery votlage 0.36 0.30 0.24 0.18 0.12 0.06 0.00 charge current (a) 0 0.9 1.8 4.5 3.6 2.7 battery voltage vs. input voltage 4.30 4.26 4.22 4.18 4.14 4.10 4.5 5.0 5.5 6.0 7.0 7.5 8.0 6.5 charge current vs. battery voltage charge current (a) 0.36 0.30 0.24 0.18 0.12 0.06 0.00 2.9 3.1 3.3 3.7 3.9 3.5 4.1 charge current vs. input voltage 4.5 6.0 9.0 7.5 350 300 250 200 150 100 50 0 charge current vs. r pgm resistance 8 7 6 5 4 3 2 1 0 0 50 100 150 200 350 400 250 300 0.8 0.7 0.6 0.5 0.4 0.3 0.2 2.5 3.0 3.5 4.5 4.0 5.5 5.0 6.0 6.5 7.0 forward leakage current reverse current vs. battery votlage 0.8 0.75 0.7 0.65 0.6 0.55 0.5 0.45 0.4 2.5 2.8 3.1 3.4 4.3 3.7 4 charge current vs. temperature 160 156 152 148 144 140 -50 -25 0 25 75 50 mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 10 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics ( continued ) charger v chgin = 5v, c3 = c5 = 1f, t a = 25c, unless otherwise noted. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 11 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics ( continued ) ldo v ldoin = 4.5v, v ldoout = 2.85v, c4 = 1 f, c byp = 0.1 f, c6 = 2.2 f, t a = 25c, unless otherwise noted. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 12 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics ( continued ) spdt switch v bstin = v bsten = 2.4v, v bstout = 10v, i bstout = 2ma, l1 = 10h/150m ? , unless otherwise noted. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 13 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions pin # name pin function 1 s2 c-channel spdt switch control input. if the chip is enabled, a logic low input switches c to gnd and a logic high input switches c to bstout. do not leave this pin floating. 2 bstfb step-up converter regulator feedback. connect to the tap of an external resistor divider from the output to bstfb to set the boost conver ter output voltage. float this pin to achieve fixed 10v output. 3 bstiset step-up converter constant peak current set. connect to an external resistor to bstgnd to set the boost converter peak current. 4 bstgnd step-up converter and spdt ground. 5 batt charger output. 6 ipgm constant-charge?current programmer. connect to an external resistor to ground to program the charging current in constant-curr ent mode. do not connect a capacitor to this pin. 7, 9 chggnd charger ground. 8 chgin charger input supply. chgin receives the ac adapter. 10 chgz open-drain charger status indicator. 11 ldoen low dropout enabled. drive ldoen high to turn on the low dropout, drive ldoen low to turn it off. for automatic star tup, connect ldoen to ldoin. 12 ldoin low dropout power source input. ldoin supplies the internal power to the low dropout and is the source of the pass transistor. bypass ldoin to ldognd with a 1 f or greater capacitor. 13 ldognd low dropout ground. 14, 15 ldoout low dropout regulator output. ldoout is the output of the linear regulator. bypass ldoout to ldognd with a 1 f or greater capacitor. 16 ldofb low dropout feedback input. connect a resistor divider from ldoout to ldofb to set the output voltage. 17 bstsw step-up converter output switch node. bstsw is the drain node of the internal low-side n- channel mosfet. connect the inductor from bstl to bstsw to complete the step-up converter. 18 bstout step-up converter output. 19 bstin step-up converter and spdt input supply. bstin pin powers the internal circuitry and is the drain of the internal disconnecting n-channel mosfet. bypass locally. 20 bstl step-up converter inductor output. bstl is the source/body of the internal n-channel mosfet, m3. connect the inducto r from this pin to bstsw. 21 bsten step-up converter and spdt on/off control input. a logic high input turns the chip on.. do not leave this pin floating. 22 s1 b-channel spdt switch control input. if the chip is enabled, a logic low input switches b to gnd and a logic high input switches b to bstout. do not leave this pin floating. 23 s0 a-channel spdt switch control input. if the chip is enabled, a logic low input switches a to gnd and a logic high input switches a to bstout. do not leave this pin floating. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 14 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions (continued) pin # name pin function 24 a a-channel spdt switch output. 25 b b-channel spdt switch output. 26 c c-channel spdt switch output. 27 d d-channel spdt switch output. 28 s3 d-channel spdt switch control input. if the chip is enabled, a logic low input switches d to gnd and a logic high input switches d to bstout. do not leave this pin floating. exposed pad connect exposed pad to ground plane in pcb for proper thermal performance. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 15 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. functional block diagram step-up converter control logic - + step-up converter internal power supply step-up & spdt enable control bstsw m1 + - ea bstl bsten regulator 1.23v current sensing amp spdt control c1 battery r1 r2 c2 l+ l- r+ r- control signal s0 s1 s2 s3 a b c d l1 bstgnd bstfb peak current control bstiset bstout m2 bstin bstout m3 driver driver bstout battery charger control r + - bandgap reference batt c3 c4 r3 r4 ldoout ldoin ldofb c6 v ldoout ldognd c byp vin c5 chgin chgz chggnd ipgm r pgm ldoen figure 1?functional block diagram mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 16 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. operation the mp5414 is a high-efficiency fully-integrated pmu with a current-mode step-up converter, four single-pole/double-throw (spdt) switches, low dropout (ldo), and a battery charger designed for low-power battery-operated bias-supply applications. step-up converter output disconnection the step-up converter integrates a disconnect switch between the bstin and the bstl pins. the switch is composed of an nmos and a pmos in parallel. the step-up converter can disconnect all loads from input dc power supply when the bsten pin is connected to ground. under voltage lockout an under-voltage lockout (uvlo) function prevents device startup for values of v batt < 1.5v. if v bstin falls below 1.5v during device operation and battery discharge, the device automatically enters the shutdown mode. step-up converter start-up the converter undergoes the following steps after first applying the input signal and followed by the enable signal: 1. pmos of the disconnect switch turns on, 2. internal soft-start boosts step-up converter, causing v bstout to rise, 3. v bstout drives the nmos of the disconnect switch when v bstout reaches threshold. because the on-resistance of the nmos is smaller than that of pmos, the nmos shorts the pmos under normal operation to reduce conduction loss. the mp5414 offers both soft-start and inrush current limiting during start-up and under normal operation. soft-start the step-up converter implements a soft-start by charging an internal capacitor with a very weak current source. the voltage on this capacitor, in turn, slowly ramps the peak inductor current limit from zero to the setting value. the step-up converter limits this inrush current by increasing the current limit in three steps, rising from 0a to i lim /4 in 256 switching cycles, then i lim /4 to i lim /2 for the next 256 cycles, before rising to the full current limit. the soft-start time varies greatly with load current; output voltage, and input voltage. variable frequency constant-peak?current operation when the power mosfet m1 is turned on, the inductor current increases until it hits its current limit. the power mosfet then turns off for a set minimum-off time. if the feedback pin is still lower than the 1.23v internal reference at the end of this minimum off time, the power mosfet will turn on again. otherwise the step-up converter waits until the voltage drops below the threshold before turning on the mosfet again. this process allows for optimal use of the inductor while minimizing the output ripple, reducing the size of the output capacitor, and maintaining low operating current. integrated schottky diode a high switching frequency requires high-speed rectification for optimum efficiency. the step-up converter integrates a low-voltage?drop schottky diode to reduce the number of external parts to save critical board space. four spdt switches the mp5414 includes four spdt analog switches, where pins s0 through s3 control the switches, respectively. while the chip is enabled, a logic-low input switches the corresponding channel output to bstgnd. conversely, a logic- high input switches the channel to bstout. table 1 shows the control logic. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 17 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. table 1?switching selection control logic control input switch output bsten s0 s1 s2 s3 a b c d l x x x x open open open open h l l l l bstgnd bstgnd bstgnd bstgnd h h l l l bstout bstgnd bstgnd bstgnd h l h l l bstgnd bstout bstgnd bstgnd h h h l l bstout bstout bstgnd bstgnd h l l h l bstgnd bstgnd bstout bstgnd h h l h l bstout bstgnd bstout bstgnd h l h h l bstgnd bstout bstout bstgnd h h h h l bstout bstout bstout bstgnd h l l l h bstgnd bstgnd bstgnd bstout h h l l h bstout bstgnd bstgnd bstout h l h l h bstgnd bstout bstgnd bstout h h h l h bstout bstout bstgnd bstout h l l h h bstgnd bstgnd bstout bstout h h l h h bstout bstgnd bstout bstout h l h h h bstgnd bstout bstout bstout h h h h h bstout bstout bstout bstout h: high level l: low level x: irrelevant mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 18 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. charger the charger is enabled when the input supply voltage reaches 3.5v, the uvlo threshold, or the battery voltage?whichever voltage is highest. an internal 500k ? pull-down resistor connects the chgin and chggnd pins. the charger automatically switches between cc/cv charging algorithms depending on the battery status. figure 2 shows a typical charging sequence. trickle charging charge start charge end soft-start time thermal regulation cc mode cv mode 10% of i chg 90% of i chg i chg 2.6v 4.2v v batt v batt i batt i batt figure 2?charger typical charging procedure programming of charge current and battery full current table 2?r pgm and i chg relationship r pgm (k ? ) i chg (ma) 7.210 54.67 5.555 70.99 4.010 98.70 3.742 105.90 2.497 159.80 1.873 214.30 1.492 269.90 1.249 323.00 1.080 371.00 a resistor (r pgm ) connecting the ipgm pin to ground programs the charge current, i chg . table 2 and figure 3 show the relationship between the charge current and the value of the programming resistor. when the battery voltage falls below the trickle- charge threshold (2.6v), the charge current is limited to 10% of the programmed value. after the battery voltage reaches 2.6v, the charger switches to constant-current (cc) mode using a programmed current value, i chg . once the battery voltage reaches 4.2v, the charger will operate in the constant voltage (cv) mode until the battery is fully charged. charge current vs 1/r pgm resistance 400 350 300 250 200 150 100 50 0 charge current (ma) 0 0.2 0.4 0.8 1.0 0.6 figure 3?charge current vs. 1/r pgm resistance charge status (chgz) the open-drain chgz pin monitors charge status by connecting to v batt through an led, a resistor, or both. the chgz pin signals the end-of- charge?or battery full?when its voltage goes from low to high (i.e. the led turns off), which occurs when i chg decreases to 10% of the programmed value. thermal protection the charger automatically limits the die temperature to 130c by reducing the current to prevent overheating. the current remains continuous throughout. ldo the mp5414 has an integrated low-current, low- noise, high-psrr, low-dropout linear regulator. it is suitable for use in devices that require very low noise power supplies and high-psrr such as pll vco supplies for mobile handsets and 802.11 pc cards, as well as audio codecs and microphones. the ldo uses a pmos pass element and features internal thermal shutdown. an optional feed-forward capacitor c byp between ldofb and ldoout pins for improves transient response. mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 19 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. application information components referenced below apply to typical application circuit on page 2. setting the step-up converter bstsw current limit the resistor on the bstiset pin sets the bstsw current limit. figure 4 illustrates the relationship of the bstsw current limit vs. the bstiset resistor. in constant-peak-current mode, the inductor current increases until the current limit is reached after the power mosfet turns on. since the response delay, the actual bstsw peak current value exceeds the setting current limit a little. under same condition, a lower current limit allows lower bstsw current and higher switching frequency, while a higher current limit allows higher bstsw current and lower switching frequency. 0 100 200 300 400 500 600 700 800 900 0 200 400 600 800 1000 r bstiset vs. current limit figure 4?bstiset resistance vs. bstsw current limit setting the bstout output voltage mp5414?s step-up converter features an internal resistor divider that allows the device to output a fixed 10v when the bstfb is left floating. connecting the bstfb pin to the tap of an external resistor divider between bstout to ground otherwise sets the boost converter output voltage, where: bstout bstfb r1 r 2 vv r2 + = where v bstfb = 1.23v. for example, if r1=178k ? and r2 = 24.9k ? , then v bstout = 10v. selecting the step-up converter inductor select an inductor with a dc current rating of at least 40% higher than the maximum input current. for best efficiency, select an inductor with the lowest-possible dc resistance. selecting the step-up converter input capacitor the input capacitor, c1, reduces both the surge current drawn from the input supply and the switching noise from the device. select a capacitor with a switching frequency impedance less than the input source impedance to prevent high-frequency switching current from passing through the input: for example, ceramic capacitors with x5r or x7r dielectrics with low esr and small temperature coefficients. a 4.7 f or 10 f capacitor will suffice for most applications. selecting the step-up converter output capacitor the output capacitor, c2, limits the output voltage and improves feedback loop stability. select an output capacitor with a low switching frequency impedance, such as ceramic capacitors with x7r dielectrics with low esr characteristics. a ceramic capacitor with a value of less than 10 f will suffice for most applications. flow chart of charger operation the power-on reset (por) feature can ensure that the device initiates in a known state. the flow chart in figure 5 describes the conditions that lead to charger operation modes, such as constant voltage charge (cvc) and constant- current charge (ccc). mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 20 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. figure 5?flow chart of charger operation mp5414?pmu for 3d glasses mp5414 rev.1.12 www.monolithicpower.com 21 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. setting the ldo output voltage the ldo output voltage can be also adjusted by using an external resistor divider (r3 and r4 in the functional block diagram). however, the value of r3 and r4 in series should not exceed 100k ? to minimize the impact on the internal resistor divider. to accurately set the output voltage, use 10k ? ( 1%) for the low-side resistor (r4), and determine the value of the high-side resistor r3 using the following equation: ldoout ldofb ldofb vv r3 r4 v ?? ? = ?? ?? where v ldofb is the out feedback threshold voltage equal to 1.222v. for example, for a 2.5v output 2.5v 1.222v r3 10.41k 1.222v 10k ? == ?? ?? ?? you can select a standard 10.5k ? ( 1%) resistor for r3. the following table lists the selected standard r3 values for correlated with their output voltages: table 3?adjustable ldo output voltage r3 values v ldoout (v) r3 ( ? ) r4 ( ? ) 1.25 232 1.5 2.26k 1.8 4.75k 2 6.34k 2.5 10.5k 2.8 13k 3 14.7k 3.3 16.9k 4 22.6k 5 30.9k 10k selecting the ldo input capacitor for proper operation, place a ceramic capacitor (c4) between 1f and 10f of dielectric type x5r or x7r between the ldoin pin and ground. larger values in this range will help improve line transient response at the cost of increased size. selecting the ldo output capacitor for stable operation, use a ceramic capacitor of type x5r or x7r between 1f and 10f for the ldoout capacitor, c6. larger values in this range will help improve load transient response and reduce noise at the cost of increased size. other dielectric types can be used, but their temperature-sensitivity can unduly influence their capacitances. to improve load transient response, add a small ceramic (x5r, x7r or y5v dielectric) 100nf feed-forward capacitor in parallel with r3. the feed-forward capacitor is not required for stable operation. layout considerations proper layout of the high frequency switching path is critical to limit noise issues and electromagnetic interference. the circuit loop from bstout pin, output capacitor to bstgnd pin is flowing with high frequency pulse current. it must be as short as possible. the bstin pin is the power supply input for the internal mosfet switch gate driver and the internal control circuitry and requires decoupling. for the ldo, the input and output need bypass ceramic capacitors close to the ldoin pin and ldoout pin respectively. ensure all feedback connections are short and direct. place the feedback resistors and compensation components as close to the chip as possible. connect ldoin, ldoout and especially ldognd respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. see the mp5414 demo board layout for reference. mp5414?pmu for 3d glasses notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp5414 rev. 1.12 www.monolithicpower.com 22 12/13/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information qfn28 (4x5mm) side view top view 1 28 23 22 15 14 9 8 bottom view 3.90 4.10 2.50 2.80 4.90 5.10 3.50 3.80 0.50 bsc 0.18 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 2.70 0.25 recommended land pattern 3.90 note: 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeter max. 4) drawing conforms to jedec mo-220, variation vghd-3. 5) drawing is not to scale. pin 1 id see detail a pin 1 id option a 0.30x45 o typ. pin 1 id option b r0.25 typ. detail a pin 1 id index area 0.70 0.35 0.45 0.50 3.70 4.90 |
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