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  features ? floating channel designed for bootstrap opera tion fully operational to +500v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 12 to 18v ? undervoltage lockout ? current detection and limiting loop to limit driven power transistor current ? error lead indicates fault conditions and programs shutdown time ? output in phase with input ? 2.5v, 5v and 15v input logic compatible ? also available lead-free description the ir2125(s) is a high voltage, high speed power mosfet and igbt driver with over-current limiting protection circuitry. proprietary hvic and latch im- mune cmos technologies enable ruggedized mono- lithic construction. logic inputs are compatible with standard cmos or lsttl outputs, down to 2.5v logic. the output driver features a high pulse current current limiting single channel driver product summary v offset 500v max. i o +/- 1a / 2a v out 12 - 18v v csth 230 mv t on/off (typ.) 150 & 150 ns packages typical connection buffer stage designed for minimum driver cross-con duction. the protection circuitry detects over-current in the driven power transistor and limits the gate drive voltage. cycle by cycle shutdown is programmed by an external capacitor which directly controls the time interval between detection of the over-current limiting conditions and latched shutdown. the floating channel can be used to drive an n-channel power mosfet or igbt in the high or low side configuration which operates up to 500 volts. ir2125 ( s ) & (pbf) data sheet no. pd60017 rev.q www.irf.com 1 (refer to lead assignments for correct pin configura- tion). this/these diagram(s) show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. 8-lead pdip 16-lead soic (wide body)
ir2125 ( s ) & (pbf) 2 www.irf.com symbol definition min. max. units v b high side floating supply voltage -0.3 525 v s high side floating offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc logic supply voltage -0.3 25 v v in logic input voltage -0.3 v cc + 0.3 v err error signal voltage -0.3 v cc + 0.3 v cs current sense voltage v s - 0.3 v b + 0.3 dv s /dt allowable offset supply voltage transient 50 v/ns p d package power dissipation @ t a +25 c (8 lead pdip) 1.0 (16 lead soic) 1.25 rth ja thermal resistance, junction to ambient (8 lead pdip) 125 (16l lead soic) 100 t j junction temperature 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. symbol definition min. max. units v b high side floating supply voltage v s + 12 v s + 18 v s high side floating offset voltage note 1 500 v ho high side floating output voltage v s v b v cc logic supply voltage 0 18 v in logic input voltage 0 v cc v err error signal voltage 0 v cc v cs current sense signal voltage v s v b t a ambient temperature -40 125 c note 1: logic operational for v s of -5 to +500v. logic state held for v s of -5v to -v bs . (please refer to the design tip dt97-3 for more details). recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15v differential. w c/w c v
www.irf.com 3 ir2125 ( s ) & (pbf) symbol definition figure m in. typ. max. units test conditions v ih logic 1 input voltage 14 2.2 v il logic 0 input voltage 15 0.8 v csth+ cs input positive going threshold 16 150 230 320 v csth- cs input negative going threshold 17 130 210 300 v oh high level output voltage, v bias - v o 18 100 i o = 0a v ol low level output voltage, v o 19 100 i o = 0a i lk offset supply leakage current 20 50 v b = v s = 500v i qbs quiescent v bs supply current 21 400 1000 v in = v cs = 0v or 5v i qcc quiescent v cc supply current 22 700 1200 v in = v cs = 0v or 5v i in+ logic 1 input bias current 23 4.5 10 av in = 5v i in- logic 0 input bias current 24 1.0 v in = 0v i cs+ high cs bias current 25 4.5 10 v cs = 3v i cs- low cs bias current 26 1.0 v cs = 0v v bsuv+ v bs supply undervoltage positive going 27 8.5 9.2 10.0 threshold v bsuv- v bs supply undervoltage negative going 28 7.7 8.3 9.0 threshold v ccuv+ v cc supply undervoltage positive going 29 8.3 8.9 9.6 threshold v ccuv- v cc supply undervoltage negative going 30 7.3 8.0 8.7 threshold i err err timing charge current 31 65 100 130 v in = 5v, v cs = 3v err < v err+ i err+ err pull-up current 32 8.0 15 v in = 5v, v cs = 3v err > v err+ i err- err pull-down current 33 16 30 v in = 0v i o+ output high short circuit pulsed current 34 1.0 1.6 v o = 0v, v in = 5v pw 10 s i o- output low short circuit pulsed current 35 2.0 3.3 v o = 15v, v in = 0v pw 10 s v mv ma v a a static electrical characteristics v bias (v cc , v bs ) = 15v and t a = 25 c unless otherwise specified. the v in , v th and i in parameters are referenced to com. the v o and i o parameters are referenced to v s . dynamic electrical characteristics v bias (v cc , v bs ) = 15v, c l = 3300 pf and t a = 25 c unless otherwise specified. the dynamic electrical characteristics are measured using the test circuit shown in figures 3 through 6. symbol definition figure min. t yp. max. units test conditions t on turn-on propagation delay 7 170 240 v in = 0 & 5v v s = 0 to 600v t off turn-off propagation delay 8 200 270 t sd err shutdown propagation delay 9 1.7 2.2 s t r turn-on rise time 10 43 60 t f turn-off fall time 11 26 35 t cs cs shutdown propagation delay 12 0.7 1.2 t err cs to err pull-up propagation delay 13 9.0 12 c err = 270 pf ns s ns
ir2125 ( s ) & (pbf) 4 www.irf.com lead definitions symbol description v cc logic and gate drive supply in logic input for gate driver output (ho), in phase with ho err serves multiple functions; status reporting, linear mode timing and cycle by cycle logic shutdown com logic ground v b high side floating supply ho high side gate drive output v s high side floating supply return cs current sense input to current sense comparator functional block diagram lead assignments 8 lead pdip ir2125 16 lead soic (wide body) ir2125s part number v cc in err com v b ho cs v s 1 2 3 4 8 7 6 5 1 2 7 6 5 4 3 8 16 15 14 13 12 11 10 9 vcc in err com vs cs ho vb
www.irf.com 5 ir2125 ( s ) & (pbf) t sd hv=10 to 600v err ho
ir2125 ( s ) & (pbf) 6 www.irf.com 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) err to output shutdown delay time (s) max. typ. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) turn-off delay time (ns) max. typ. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) turn-on delay time (ns) max. typ. figure 8a. turn-off time vs. temperature fi gure 8b. turn-off time vs. voltage figure 7a. turn-on time vs. temperature fi gure 7b. turn-on time vs. voltage figure 9b. err to output shutdown vs. voltage figure 9a. err to output shutdown vs. temperature 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-on time (ns) max. typ. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-off time (ns) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bias supply voltage (v) err to output shutdown delay time (s) max. typ.
www.irf.com 7 ir2125 ( s ) & (pbf) 0.00 0.40 0.80 1.20 1.60 2.00 -50 -25 0 25 50 75 100 125 temperature (c) cs to output shutdown delay time (s) max. typ. 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) turn-on rise time (ns) max. typ. figure 11a. turn-off fall time vs. temperature figure 11b. t urn-off fall time vs. voltage figure 10a. turn-on rise time vs. temperature figure 10b. turn-on rise time vs. voltage figure 12a. cs to output shutdown vs. temperature figure 12b. cs to output shutdown vs. voltage 0 20 40 60 80 100 10 12 14 16 18 20 v bias supply voltage (v) turn-on rise time (ns) max. typ. 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) turn-off fall time (ns) max. typ. 0 20 40 60 80 100 10 12 14 16 18 20 v bias supply voltage (v) turn-off fall time (ns) max. typ. 0.00 0.40 0.80 1.20 1.60 2.00 10 12 14 16 18 20 v bias supply voltage (v) cs to output shutdown delay time (s) max. typ.
ir2125 ( s ) & (pbf) 8 www.irf.com 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) logic "1" input threshold (v) min. figure 14a. logic 1 input threshold vs. temperature figure 14b. logic 1 input threshold vs. voltage figure 13b. cs to err pull-up vs. voltage figure 13a. cs to err pull-up vs. temperature figure 15a. logic 0 input threshold vs. temperature figure 15b. logic 0 input threshold vs. voltage 0.0 4.0 8.0 12.0 16.0 20.0 10 12 14 16 18 20 v bias supply voltage (v) cs to err pull-up delay time (s) max. typ. 0.0 4.0 8.0 12.0 16.0 20.0 -50 -25 0 25 50 75 100 125 temperature (c) cs to err pull-up delay time (s) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc logic supply voltage (v) logic "1" input threshold (v) min. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc logic supply voltage (v) logic "0" input threshold (v) max. 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) logic "0" input threshold (v) max.
www.irf.com 9 ir2125 ( s ) & (pbf) 0.00 0.20 0.40 0.60 0.80 1.00 -50 -25 0 25 50 75 100 125 temperature (c) high level output voltage (v) max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) cs input positive going threshold (mv) min. typ. max. figure 17a. cs input threshold (-) vs. temperature figure 17b. cs input threshold (-) vs. voltage figure 16a. cs input threshold (+) vs. temperature figure 16b. cs input threshold (+) vs. voltage figure 18a. high level output vs. temperature figure 18b. high level output vs. voltage 0 100 200 300 400 500 10 12 14 16 18 20 v bs floating supply voltage (v) cs input positive going threshold (mv) min. typ. max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) cs input negative going threshold (mv) max. typ. min. 0 100 200 300 400 500 10 12 14 16 18 20 v bs floating supply voltage (v) cs input negative going threshold (mv) min. typ. max. 0.00 0.20 0.40 0.60 0.80 1.00 10 12 14 16 18 20 v bs floating supply voltage (v) high level output voltage (v) max.
ir2125 ( s ) & (pbf) 10 www.irf.com 0.00 0.40 0.80 1.20 1.60 2.00 -50 -25 0 25 50 75 100 125 temperature (c) v bs supply current (ma) max. typ. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) offset supply leakage current (a) max. 0.00 0.20 0.40 0.60 0.80 1.00 -50 -25 0 25 50 75 100 125 temperature (c) low level output voltage (v) max. figure 20a. offset supply current vs. temperature fi gure 20b. offset supply current vs. voltage figure 19a. low level output vs. temperature figure 19b. low level output vs. voltage figure 21a. v bs supply current vs. temperature figure 21b. v bs supply current vs. voltage 0.00 0.20 0.40 0.60 0.80 1.00 10 12 14 16 18 20 v bs floating supply voltage (v) low level output voltage (v) max. 0 100 200 300 400 500 0 100 200 300 400 500 v b boost voltage (v) offset supply leakage current (a) max. 0.00 0.40 0.80 1.20 1.60 2.00 10 12 14 16 18 20 v bs floating supply voltage (v) v bs supply current (ma) max. typ.
www.irf.com 11 ir2125 ( s ) & (pbf) 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) logic "0" input bias current (a) max. 0 5 10 15 20 25 -50 -25 0 25 50 75 100 125 temperature (c) logic "1" input bias current (a) max. typ. 0.00 0.40 0.80 1.20 1.60 2.00 -50 -25 0 25 50 75 100 125 temperature (c) v cc supply current (ma) max. typ. figure 23a. logic 1 input current vs. temperature figure 23b. logic 1 input current vs. voltage figure 22a. v cc supply current vs. t emperature figur e 22b. v cc supply current vs. voltage figure 24a. logic 0 input current vs. temperature figure 24b. logic 0 input current vs. voltage 0.00 0.40 0.80 1.20 1.60 2.00 10 12 14 16 18 20 v cc logic supply voltage (v) v cc supply current (ma) max. typ. 0 5 10 15 20 25 10 12 14 16 18 20 v cc logic supply voltage (v) logic "1" input bias current (a) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v cc logic supply voltage (v) logic "0" input bias current (a) max.
ir2125 ( s ) & (pbf) 12 www.irf.com 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v bs undervoltage lockout + (v) max. typ. min. 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) "low" cs bias current (a) max. 0.0 5.0 10.0 15.0 20.0 25.0 -50 -25 0 25 50 75 100 125 temperature (c) "high" cs bias current (a) max. typ. figure 26a. low cs bias current vs. temperature figure 26b. low cs bias current vs. voltage figure 25a. high cs bias current vs. temperature figure 25b. high cs bias current vs. voltage figure 27. v bs undervoltage (+) vs. temperature figure 28. v bs undervoltage (-) vs. temperature 0.0 5.0 10.0 15.0 20.0 25.0 10 12 14 16 18 20 v bs floating supply voltage (v) "high" cs bias current (a) max. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bs floating supply voltage (v) "low" cs bias current (a) max. 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) vbs undervoltage lockout - (v) max. typ. min.
www.irf.com 13 ir2125 ( s ) & (pbf) 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature (c) err timing charge current (a) max. typ. min. 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v cc undervoltage lockout + (v) max. typ. min. figure 31a. err timing charge current vs. temperature figure 31b. err timing charge current vs. voltage figure 29. v cc undervoltage (+) vs. temperature figure 30. v cc undervoltage (-) vs. temperature figure 32a. err pull-up current vs. temperature figure 32b. err pull-up current vs. voltage 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v cc undervoltage lockout - (v) max. typ. min. 0 50 100 150 200 250 10 12 14 16 18 20 v cc logic supply voltage (v) err timing charge current (a) min. typ. max. 0.0 5.0 10.0 15.0 20.0 25.0 -50 -25 0 25 50 75 100 125 temperature (c) err pull-up current (ma) ty p. min. 0.0 5.0 10.0 15.0 20.0 25.0 10 12 14 16 18 20 v cc logic supply voltage (v) err pull-up current (ma ) min. ty p.
ir2125 ( s ) & (pbf) 14 www.irf.com 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) output sink current (a) typ. min. 0.00 0.50 1.00 1.50 2.00 2.50 -50 -25 0 25 50 75 100 125 temperature (c) output source current (a) typ. min. 0 10 20 30 40 50 -50 -25 0 25 50 75 100 125 temperature (c) err pull-down current (ma) ty p. min. figure 34a. output source current vs. temperature figure 34b. output source current vs. voltage figure 33a. err pull-down current vs.temperature figure 33b. err pull-down current vs. voltage figure 35a. output sink current vs.temperature figure 35b. output sink current vs. voltage 0 10 20 30 40 50 10 12 14 16 18 20 v cc logic supply voltage (v) err pull-down current (ma) max. ty p. 0.00 0.50 1.00 1.50 2.00 2.50 10 12 14 16 18 20 v bs floating supply voltage (v) output source current (a) min. typ. 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bs floating supply voltage (v) output sink current (a) min. typ.
www.irf.com 15 ir2125 ( s ) & (pbf) figure 37. maximum v s negative offset vs. supply voltage -15.00 -12.00 -9.00 -6.00 -3.00 0.00 10 12 14 16 18 20 v bs floating supply voltage (v) v s offset supply voltage (v) typ. figure 36a. turn-on time vs. input voltage figure 36b. turn-off time vs. input voltage 0 50 100 150 200 250 300 0 2 4 6 8 101214161820 input voltage (v) turn-on delay time (ns) 0 50 100 150 200 250 300 0246810121416182 0 max . ty p . input voltage (v) turn-off delay time (ns)
ir2125 ( s ) & (pbf) 16 www.irf.com 01-6014 01-3003 01 (ms-001ab) 8-lead pdip case outlines 16-lead soic (wide body) 01 6015 01-3014 03 (ms-013aa)
www.irf.com 17 ir2125 ( s ) & (pbf) leadfree part marking information order information basic part (non-lead free) 8-lead pdip ir2125 order ir2125 16-lead soic ir2125s order ir2125s leadfree part 8-lead pdip ir2125 order ir2125pbf 16-lead soic ir2125s order IR2125SPBF lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code ir world headquarters: 233 kansas st., el segundo, california 90245 tel] (310) 252-7105 this product has been qualified per industrial level data and specifications subject to change without notice. 9/12/2004


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