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? semiconductor components industries, llc, 2013 august, 2013 ? rev. 3 1 publication order number: ncp4353/d ncp4353, ncp4354 secondary side smps off mode controller for low standby power the ncp4353/4 is a secondary side smps controller designed for use in applications which require extremely low no load power consumption. the device is capable of detecting ?no load? conditions and entering the power supply into a low consumption off mode. during off mode, the primary side controller is turned off and energy is provided by the output capacitors thus eliminating the power consumption required to maintain regulation. during off mode, the output voltage relaxes and is allowed to decrease to an adjustable level. once more energy is required, the ncp4353/4 automatically restarts the primary side controller. the ncp4353/4 controls the primary side controller with an ?active off? signal, meaning that it drives optocoupler current during off mode to pull ? down the fb pin of the primary controller. during normal power supply operation, the ncp4353/4 provides integrated voltage feedback regulation, replacing the need for a shunt regulator. the a versions include a current regulation loop in addition to voltage regulation. feedback control as well as on/off signal can be provided with only one optocoupler. the ncp4354 includes a led driver pin implemented with an open drain mosfet driven by a 1 khz square wave with a 12.5% duty cycle when primary side is in regulation for indication purpose. the ncp4353 is available in tsop ? 6 package while the ncp4354 is available in soic ? 8 package. features ? operating input voltage range: 2.5 v to 36.0 v ? supply current < 100 a ? 0.5% reference voltage accuracy (t j = 25 c) ? constant voltage and constant current (a versions) control loop ? indication led pwm modulated driver (ncp4354x) ? designed for use with ncp1246 fixed frequency pwm controller ? these devices are pb ? free, halogen free/bfr free and are rohs compliant typical applications ? offline adapters for notebooks, game stations and printers ? high power ac ? dc converters for tvs, set ? top boxes, monitors, etc. device options ncp4353a ncp4353b ncp4354a ncp4354b adjustable v min no yes yes yes current regulation yes no yes no led driver no no yes yes package tsop ? 6 tsop ? 6 soic ? 8 soic ? 8 http://onsemi.com marking diagrams soic ? 8 case 751 1 8 xxxxx alyw 1 8 1 xxxayw 1 tssop ? 6 case 318g a = assembly location l = wafer lot y = year w = work week = pb ? free package see detailed ordering, marking and shipping information in the package dimensions section on page 15 of this data sheet. ordering information (*note: microdot may be in either location)
ncp4353, ncp4354 http://onsemi.com 2 sw1 v ref v cc management power reset v dd voltage regulation off mode detection i driveoff sw3 i biasv v refc current regulation ota v dd power reset ota sink only sink only v ref i biasv enabling 0.9xv ref power reset s r q q ncp4353a sw1 v ref v refm v cc management power reset v dd voltage regulation off mode detection i driveoff sw3 i biasv v dd power reset ota vcc vsns gnd offdet min output voltage drive sink only vmin v ref i biasv enabling 0.9 x v ref vcc power reset s r q q 10%v cc ncp4353b figure 1. simplified block diagrams ncp4353a and ncp4353b vcc drive gnd isns vsns offdet 10%v cc vcc
ncp4353, ncp4354 http://onsemi.com 3 sw1 v ref v refm v cc management power reset v dd voltage regulation off mode detection 1 khz, 12% d.c. oscillator i driveoff sw3 i biasv v refc current regulation ota v dd power reset ota vcc isns sw2 led vsns gnd offdet min output voltage drive sink only sink only vmin v ref i biasv enabling 0.9 x v ref vcc power reset s r q q 10%v cc ncp4354a sw1 v ref v refm v cc management power reset v dd voltage regulation off mode detection 1 khz, 12% d.c. oscillator i driveoff sw3 i biasv v dd power reset ota vcc sw2 led vsns gnd offdet min output voltage fbc sink only vmin v ref i biasv enabling 0.9 x v ref vcc power reset s r q q 10%v cc on/off ncp4354b figure 2. simplified block diagrams ncp4354a and ncp4354b
ncp4353, ncp4354 http://onsemi.com 4 pin function description ncp4353a ncp4353b ncp4354a ncp4354b pin name description 1 1 8 8 vcc supply voltage pin 2 2 7 7 gnd ground 6 6 1 1 vsns output voltage sensing pin, connected to output voltage divider 5 5 2 2 offdet off mode detection input. voltage divider provides adjustable off mode detection threshold ? 4 3 3 vmin minimum output voltage adjustment 4 ? 4 ? isns current sensing input for output current regulation, connect it to shunt resistor in ground branch. ? ? 5 4 led pwm led driver output. connected to led cath- ode with current define by external serial resist- ance ? ? ? 6 fbc output of current sinking ota amplifier or amplifi- ers driving feedback optocoupler?s led. connect here compensation network (networks) as well. ? ? ? 5 on/off off mode current sink. this output keeps primary control pin at low level in off mode. 3 3 6 ? drive combination of fbc and on/off pins absolute maximum ratings rating symbol value unit input voltage v cc ? 0.3 to 40 v drive, on/off, fbc, led voltage v drive , v onoff , v fbc , v led ? 0.3 to v cc + 0.3 v vsns, isns, offdet, vmin voltage v sns , v isns , v offdet , v min ? 0.3 to 10 v led current i led 10 ma thermal resistance ? junction ? to ? air (note 1) ncp4353a ncp4353b ncp4354a ncp4354b r ja 315 324 260 277 c/w junction temperature t j ? 40 to 150 c storage temperature t stg ? 60 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 250 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. 50 mm 2 , 1.0 oz. copper spreader. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per jesd22 ? a114f esd machine model tested per jesd22 ? a115c latchup current maximum rating tested per jedec standard: jesd78d.
ncp4353, ncp4354 http://onsemi.com 5 electrical characteristics 0 c t j 125 c; v cc = 15 v; unless otherwise noted. typical values are at t j = +25 c. parameter test conditions symbol min typ max unit maximum operating input voltage v cc 36.0 v vcc uvlo v cc rising v ccuvlo 3.3 3.5 3.7 v v cc falling 2.3 2.5 2.7 vcc uvlo hysteresis v ccuvlohys 0.8 1.0 v quiescent current in regulation ncp4353a i cc 101 125 a ncp4353b 82 105 ncp4354a 118 145 ncp4354b 95 120 quiescent current in off mode v sns < 1.12 v i cc,offmode 90 110 a voltage control loop ota transconductance sink current only gm v 1 s reference voltage 2.8 v v cc 36.0 v, t j = 25 c v ref 1.244 1.250 1.256 v 2.8 v v cc 36.0 v, t j = 0 ? 85 c 1.240 1.250 1.264 2.8 v v cc 36.0 v, t j = 0 ? 125 c 1.230 1.250 1.270 sink current capability in regulation, v drive or v fbc > 1.5 v i sinkv 2.5 ma in off mode, v drive or v fbc > 1.5 v 1.2 1.5 2.0 ma inverting input bias current in regulation, v sns = v ref i biasv ? 100 100 na in off mode, v sns > 1.12 v ? 13 ? 11 ? 10 a inverting input bias current threshold in off mode v snsbiasth 1.07 1.12 1.17 v current control loop ota (ncp435xa only) transconductance sink current only gm c 3 s reference voltage v refc 60 62.5 65 mv sink current capability v drive or v fbc > 1.5 v i sinkc 2.5 ma inverting input bias current i sns = v refc i biasc ? 100 100 na minimum voltage comparator (except ncp4353a) threshold voltage v refm 355 377 400 mv hysteresis output change from logic high to logic low v minh 40 mv off mode detection comparator threshold value 2.5 v v cc 36.0 v v offdetth 10% v cc v v cc = 15 v 1.47 1.50 1.53 hysteresis output change from logic high to logic low v offdeth 40 mv led driver (ncp4354x only) switching frequency f swled 1 khz duty cycle d led 10.0 12.5 15.0 % switch resistance i led = 5 ma r sw2 50 off mode control sink current in off mode, v drive or v onoff > 0.6 v i driveoff 140 160 180 a
ncp4353, ncp4354 http://onsemi.com 6 typical characteristics figure 3. v ref at v cc = 15 v figure 4. v ref at t j = 25 c figure 5. v refc at v cc = 15 v 1.29 1.28 1.27 1.26 1.25 1.24 1.23 1.22 ? 40 ? 20 0 20 40 60 80 100 120 v ref (v) t j , junction temperature ( c) 1.29 1.28 1.27 1.26 1.25 1.24 1.23 1.22 0 6 12 18 24 30 36 v cc (v) v ref (v) 63 ? 40 ? 20 0 20 40 60 80 100 120 v refc (mv) t j , junction temperature ( c) 62.9 62.8 62.7 62.6 62.5 62.4 62.3 62.2 62.1 62 figure 6. v refc at t j = 25 c 63 62.9 62.8 62.7 62.6 62.5 62.4 62.3 62.2 62.1 62 0 6 12 18 24 30 36 v cc (v) v refc (mv) 410 ? 40 ? 20 0 20 40 60 80 100 120 v refm (mv) t j , junction temperature ( c) figure 7. v refm at v cc = 15 v 400 390 380 370 360 350 410 400 390 380 370 360 350 0 6 12 18 24 30 36 v cc (v) v refm (mv) figure 8. v refm at t j = 25 c
ncp4353, ncp4354 http://onsemi.com 7 typical characteristics 3.8 t j , junction temperature ( c) v cc (v) 3.6 3.4 3.2 3.0 2.8 2.6 2.4 ? 40 ? 20 0 20 40 60 80 100 120 figure 9. v ccuvlo vccuvlo_r vccuvlo_f 1.53 t j , junction temperature ( c) v offdetth (v) ? 40 ? 20 0 20 40 60 80 100 120 figure 10. v offdetth at v cc = 15 v 1.52 1.51 1.50 1.49 1.48 1.47 175 t j , junction temperature ( c) i onoff ( a) ? 40 ? 20 0 20 40 60 80 100 120 170 165 160 155 150 145 140 135 figure 11. i onoff at v cc = 15 v ? 10 t j , junction temperature ( c) i biasv ( a) ? 40 ? 20 0 20 40 60 80 100 120 ? 10.2 ? 10.4 ? 10.6 ? 10.8 ? 11 ? 11.2 ? 11.4 ? 11.6 ? 11.8 ? 12 figure 12. i biasv at v cc = 15 v, v sns > v snsbiasth 150 t j , junction temperature ( c) i cc ( a) ? 40 ? 20 0 20 40 60 80 100 120 140 130 120 110 100 90 figure 13. i cc in regulation at v cc = 15 v for ncp4354a i cc ( a) 150 v cc (v) 0 6 12 18 24 30 36 140 130 120 110 100 90 figure 14. i cc in regulation at t j = 25 c for ncp4354a
ncp4353, ncp4354 http://onsemi.com 8 typical characteristics 120 t j , junction temperature ( c) i cc_offmode ( a) ? 40 ? 20 0 20 40 60 80 100 120 115 110 105 100 95 90 85 80 75 70 figure 15. i cc in off mode at v cc = 15 v, v sns < v snsbiasth , for ncp4354a v cc (v) 0 6 12 18 24 30 36 120 i cc_offmode ( a) 115 110 105 100 95 90 85 80 75 70 figure 16. i cc in off mode at t j = 25 c, v sns < v snsbiasth , for ncp4354a 120 t j , junction temperature ( c) i cc ( a) ? 40 ? 20 0 20 40 60 80 100 120 115 110 105 100 95 90 85 80 75 70 figure 17. i cc in regulation at v cc = 15 v for ncp4354b v cc (v) 0 6 12 18 24 30 36 120 i cc ( a) 115 110 105 100 95 90 85 80 75 70 figure 18. i cc in regulation at t j = 25 c for ncp4354b 120 t j , junction temperature ( c) i cc_offmode ( a) ? 40 ? 20 0 20 40 60 80 100 120 115 110 105 100 95 90 85 80 75 70 figure 19. i cc in off mode at v cc = 15 v, v sns < v snsbiasth , for ncp4354b i cc_offmode ( a) 120 115 110 105 100 95 90 85 80 75 70 v cc (v) 0 6 12 18 24 30 36 figure 20. i cc in off mode at t j = 25 c, v sns < v snsbiasth , for ncp4354b
ncp4353, ncp4354 http://onsemi.com 9 typical characteristics 3.5 t j , junction temperature ( c) i sinkv (ma) ? 40 ? 20 0 20 40 60 80 100 120 figure 21. voltage ota current sink capability in regulation ? 40 ? 20 0 20 40 60 80 100 120 2.0 t j , junction temperature ( c) i sinkv (ma) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 figure 22. voltage ota current sink capability in off mode 3.5 t j , junction temperature ( c) i sinkc (ma) ? 40 ? 20 0 20 40 60 80 100 120 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 figure 23. current ota current sink capability ? 40 ? 20 0 20 40 60 80 100 120 1.40 t j , junction temperature ( c) f swled (khz) 1.30 1.20 1.10 1.00 0.90 0.80 figure 24. led switching frequency at v cc = 15 v 100 t j , junction temperature ( c) r sw2 ( ) ? 40 ? 20 0 20 40 60 80 100 120 90 80 70 60 50 40 30 figure 25. r sw2 at v cc = 15 v
ncp4353, ncp4354 http://onsemi.com 10 application information a typical application circuit for ncp435x series is shown in figure 28, done with an imaginary ic with all features in one. pin functions are available in pin description table. simplified typical application circuit for ncp4353b that shows only available features in this ic is shown in figure 27. figure 29 shows possible connection of the ncp4353b to flyback primary controller. ic will be derived in multiple versions with different features for each of them. power supply the ncp435x is designed to operate from a single supply up to 36 v. it starts to operate when vcc voltage reaches 3.5 v and stops when vcc voltage drops below 2.5 v. v cc can be supplied by direct connection to the vout voltage of the power supply. it is highly recommended to add a rc filter (r1 and c3) in series from vout to vcc pin to reduce voltage spikes and drops that are produced at the converter?s output capacitors. recommended values for this filter are 220 and 1 f. voltage regulation path the output voltage is detected on the vsns pin by the r4, r5 and r6 voltage divider. this voltage is compared with the internal precise voltage reference. the voltage difference is amplified by gm v of the transconductance amplifier. the amplifier output current is connected to the fbc or drive pin. the compensation network is also connected to this pin to provide frequency compensation for the voltage regulation path. this fbc (drive) pin drives regulation optocoupler that provides regulation of primary side. the optocoupler is supplied via direct connection to vout line through resistor r2. regulation information is transferred through the optocoupler to the primary side controller where its fb pin is usually pulled down to reduce energy transferred to secondary output. the vsns voltage divider is shared with vmin voltage divider. the shared voltage divider can be connected in two ways as shown in figure 26. the divider type is selected based on the ratio between v min and v out . when the condition of equation 1 is true, divider type 1 should be used. v min v out v refm v ref (eq. 1) output voltage for divider type 1 can be computed by equation 2 v out v ref r4 r5 r6 r5 r6 (eq. 2) and for type 2 by equation 3. v out v ref r4 r5 r6 r6 (eq. 3) r7 vsns vmin r4 r5 r6 vout r7 vsns vmin r4 r5 r6 vout type 1 type 2 figure 26. shared dividers type current regulation path (a versions only) the output current is sensed by the shunt resistor r12 in series with the load. voltage drop on r12 is compared with internal precise voltage reference v refc at i sns transconductance amplifier input. voltage difference is amplified by gm c to output current of amplifier, connected to fbc or drive pin. compensation network is connected between this pin and isns input to provide frequency compensation for current regulation path. resistor r13 separates compensation network from sense resistor. compensation network works into low impedance without this resistor that significantly decreases compensation network impact. current regulation point is set to current given by equation 4. i outlim v refc r12 (eq. 4) off mode detection off mode operation is advantageous for ultra low or zero output current condition. the very long off time and the ultra low power mode of the whole regulation system greatly reduces the overall consumption. the output voltage is varying between nominal and minimal in off mode. when output voltage decreases below set (except ncp4353a) minimum level, primary controller is switched on until output capacitor c1 is charged again to the nominal voltage. the off mode detection is based on comparison of output voltage and voltage loaded with fixed resistances (d2, c2, r8 and r9). figure 30 shows detection waveforms. when output voltage is loaded with very low current, primary controller goes into skip mode (primary controller stops switching for some time). while output capacitor c1 is discharged very slowly (no load condition), the capacitor c2
ncp4353, ncp4354 http://onsemi.com 11 is discharged through a fixed load, by r8 and r9 faster than output voltage on c1. once offdet pin voltage is lower than v offdetth (this threshold is derived from v out ), off mode is detected. in off mode sw1 is switched on to allow i driveoff current, going through on/off pin (ncp4354b) or drive pin, to keep switch off primary controller. a higher sink current on primary fb pin is needed to keep primary controller fb below the skip level until the off mode is detected on primary side. despite output voltage on c1 may go down, the current i biasv injected into vsns pin provides the requested of fset (vsns voltage is higher than v ref ). primary ic should detect off mode before vsns is lower than 90% of v ref while i biasv is switched off to reduce consumption. this of fset, defined by r7 and the internal current source, should be large enough to secure off mode detection of the primary controller and avoid restart when v sns < v ref . minimum output voltage detection (except ncp4353a) minimum output voltage level defines primary controller restart from off mode. it can be set by shared voltage divider with voltage regulation loop. when vmin voltage drops below v refm , off mode is ended and primary controller restarts. minimum voltage level is given by equation 5 for divider type 1 v min v ref r4 r5 r6 r6 (eq. 5) and for type 2 by equation 6. v min v ref r4 r5 r6 r5 r6 (eq. 6) ncp4353a has no external adjustment and uses the internal minimum voltage level specified by minimum falling operation supply voltage. led driver (ncp4354x only) led driver is active when vcc is higher than v ccmin and output voltage is in regulation (driver is off in off mode). led driver consists of an internal power switch controlled by a pwm modulated logic signal and an external current limiting resistor r3. led current can be computed by equation 7. i led v out v f_led r3 (eq. 7) pwm modulation is used to increase efficiency of led. operation in off mode description operation waveforms in off mode and transition into off mode with ncp1246 primary controller are shown in figure 31. figure shows waveforms from the first start (1) of the convertor. at first, primary controller?s dss charges vcc capacitor over the uvlo level (2). when primary v cc is over uvlo level (3), primary controller starts to operate. vcc capacitor is charged above dss level from auxiliary winding, v out is slowly rising according to primary controller start up ramp to nominal voltage (4). primary fb pin voltage is above regulation range until v out is at set level. once v out is at set level, the secondary controller starts to sink current from optocoupler led?s and primary fb voltage is stabilized in regulation region. with nominal output power (without skip mode) offdet pin voltage is higher than v offdetth (typically 10% of v cc ). after some time, the load current decreases to low level (5) and primary convertor uses skip mode (6) to keep regulation of output voltage at set level. the skip mode consists of few switching cycles followed by missing ones to provide limited energy by light load. the number of missing cycles allows regulation for any output power. while both c1 and c2 are discharged during the missing cycles, c2 discharge will be faster than c1 without output current, v offdet drops below v offdetth and off mode is detected (7). this situation is shown in figure 30 in detail. when off mode is detected, internal pull ? up current i biasv is switch on (7), vsns voltage increases (due to i biasv ) and voltage amplifier sinks full current to keep primary fb voltage below skip level until off mode is detected by the primary side controller (8). current into onoff pin or drive pin begins to flow at the same time, when entering into off mode (7). when off mode is detected by primary side controller (8a), primary fb injected current decreases to a lower level to reduce overall power consumption. optocoupler current, can also be reduced from that time to keep the level below restart level. secondary side controller decreases optocoupler current (voltage transconductance amplifier stops to sink current) when vsns voltage drops below v ref (9) and i biasv is also switch off when v sns is lower than 90% of v ref to reduce overall consumption. this point is defined by i biasv current, r6, r4 and r5 resistors and discharging time of output capacitor c1. discharging of c1 continues (10) until output voltage drops below level set by voltage divider at vmin pin (except ncp4353a where minimum v out is defined only by vcc uvlo) (11). onoff current stops and thanks to internal pull ? up, the primary fb voltage rises above restart level (12) and primary controller starts switching (13). output capacitor c1 is recharged (14) to set voltage. if there is still light load condition primary controller goes to skip mode (15) again and after some time secondary controller detects off mode by very light or no load condition (16) and whole cycle is repeated. fast restart from off mode the ic ends off mode when a load is connected to the output and v out is discharged to v min level. there exists another connection that allows transition to normal mode faster without waiting some time for v out to discharge to v min . this schematic is shown at figure 32. the basic idea is that c3 is discharged by the ic faster than c1 by output
ncp4353, ncp4354 http://onsemi.com 12 load in off mode. when an output load is applied, capacitor c1 is discharged faster and this creates a voltage drop at d8. when there is enough voltage at d8, t2 is opened and current is injected into the offdet divider through r17. offdet voltage higher than 10% of v cc ends off mode and on/off current stops. primary controller leaves off mode because voltage at its fb pin rises above off mode end level and switching resumes. normal operation waveforms for typical load detection connection and improved load detection waveforms are shown in figure 33. sw1 feedback & on / off opto d1 c1 c2 vout off supply d2 r4 r2 r5 r6 r8 v ref v refm v cc management power reset v dd voltage regulation off mode detection c4 r10 r9 i driveoff r7 sw3 i biasv v dd power reset ota vcc vsns gnd offdet min output voltage drive sink only vmin v ref i biasv enabling 0.9 x v ref vcc power reset s r q q 10%v cc c3 r1 figure 27. typical application schematic for ncp4353b sw1 feedback & on / off opto d1 c1 c2 vout off supply d2 r4 r2 r5 r6 r8 v ref v refm v cc management power reset v dd voltage regulation off mode detection c4 r10 r9 1 khz, 12% d.c. oscillator i driveoff r 7 sw 3 i biasv v refc current regulation ota r12 v dd power reset ota c5 r11 vcc isns sw 2 on / off led r 3 led vsns gnd offdet min output voltage on/off fbc sink only sink only v min v ref r13 i biasv enabling 0.9 x v ref vcc power reset s r q q 10%v cc r1 c 3 figure 28. typical application schematic for all features
ncp4353, ncp4354 http://onsemi.com 13 d1 c 1 c2 vout d2 r4 r2 r5 r6 r8 c4 r10 r9 r7 gnd offdet drive vmin ~ v cc fb gnd drv cs hv vcc vcc opto1 c3 r14 c6 c7 c8 d3 t1 r15 d4 d5 ncp4353b vin vcc vsns d6 d7 r1 figure 29. typical application schematic for ncp4353b with flyback primary controller activity v offdet 10% v out (v cc ) i out very low or no load detected, off mode activated normal operation skip off mode figure 30. off mode detection
ncp4353, ncp4354 http://onsemi.com 14 figure 31. typical application states and waveforms in off mode with ncp1246 primary controller d1 c1 c2 vout d2 r4 r2 r5 r6 r8 c4 r10 r9 r7 r3 led vsns gnd offdet fbc vmin led1 opto1 c3 ncp4354b on/off vcc d8 r17 r16 t2 figure 32. improved load detection connection
ncp4353, ncp4354 http://onsemi.com 15 figure 33. typical and improved load detection comparison waveforms ordering information device marking adjustable v min current regulation led driver package shipping ? ncp4353asnt1g a53 no yes no tsop ? 6 (pb ? free) 3000 / tape & reel ncp4353bsnt1g b53 yes no no tsop ? 6 (pb ? free) 3000 / tape & reel NCP4354ADR2G ncp4354a yes yes yes soic ? 8 (pb ? free) 2500 / tape & reel ncp4354bdr2g ncp4354b yes no yes soic ? 8 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp4353, ncp4354 http://onsemi.com 16 package dimensions ? 6 case 318g ? 02 issue u 23 4 5 6 d 1 e b e1 a1 a 0.05 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e1 do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimensions d and e1 are determined at datum h. 5. pin one indicator must be located in the indicated zone. c *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim a min nom max millimeters 0.90 1.00 1.10 a1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 d 2.90 3.00 3.10 e 2.50 2.75 3.00 e 0.85 0.95 1.05 l 0.20 0.40 0.60 0.25 bsc l2 ? 0 1 0 1.30 1.50 1.70 e1 e recommended note 5 l c m h l2 seating plane gauge plane detail z detail z 0.60 6x 3.20 0.95 6x 0.95 pitch dimensions: millimeters m
ncp4353, ncp4354 http://onsemi.com 17 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp4353/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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