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MPQ8612 high efficiency , 12a/16a/20a, 6v sy nchronous step-down converter MPQ8612 rev. 1 . 11 www.monolithicpower.com 1 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. the future of analog ic technology descri ption the mpq86 12 is fully integrated hig h frequency synchronous rectified step-down switch mode converter. it offers very compact solutions to achieve 12a/16a/20a output current fr om a 3v to 6v input with excellent loa d and line re gulation. constant-on-time (cot) co ntrol mod e provides fast transient re sponse and eases loop s t a b i l i z a t i o n . th e mpq8 612 c a n o p e r a t e w i t h a low-cost ele c trolytic cap a citor and can support ceramic out put capacit or with external slope compensation. operating frequency is programmed by a n external resistor and is comp ensated fo r variations in v in . under volta ge lockout is internally set at 2.8 v, but can b e increase d by programming th e threshold with a resistor network on the enab le pin. the output volt age startu p ramp is controlled b y the soft start pin. a power good signal indicates the output is within its nominal voltage range. full fault pr otection including ocp, scp, ovp uvp and otp is provided by inter nal comparators. the mpq86 12 re quire s a min i mum numb e r o f read ily available sta nda rd ext e rn al compo n e n t s and are ava i lable in q f n 3 x 4 / 4 x 4 / 4 x 4 p a c k ages. features ? wide 3v to 6v operating input range ? 12a/16a/20a output cu rrent ? low r ds (on) internal power mosfets ? proprietary switching loss reduction technique ? adaptive cot for ultrafast t r ansient response ? 1% reference voltag e over -20 c to +85 c junction temperature range ? programma ble soft start time ? pre-bias start up ? programma ble switching frequen cy from 300khz to 1 m hz. ? minimu m o n time t on_min =60ns minimu m of f time t off_mi n =75ns ? non-latch ocp, non-l a tch ovp protection and thermal shutdown ? output adjustable from 0.608v to 4.5v appli c ations ? telecom system base stations ? networking systems ? server ? personal video recorders ? flat panel t e levision an d monitors ? distributed power systems al l m ps pa rts a r e lea d - fr ee an d a d h e r e to t h e ro hs d i rect i v e. f o r m p s g r e e n sta t u s , plea se v isit mps w ebsite under produ cts, quali t y assuran c e page. ?mp s ? a n d ?t he fu ture o f a n a l og ic te ch no lo gy ? a r e re gi stere d tra dem ar ks o f monolithic power systems, inc. typical application in fre q vcc en pg n d bst fb sw m p q861 2 v in on/off c1 r fr e q c5 c3 l1 r4 c4 r1 r2 c2 r3 pg agnd ss v ou t c6 v cc http://
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 2 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking MPQ8612gl-12 qfn (3x4mm) mp8612 12 MPQ8612gr-16 qfn (4x4mm) mp8612 16 MPQ8612gr-20 qfn (4x4mm) mp8612 20 * for tap e & reel, ad d suf f ix ?z (e.g. MPQ8612 gl? z); package reference top view 1 2 3 4 5 6 78 9 10 11 12 13 14 sw sw fr e q i n i n ag nd fb ss en vc c pg bs t g nd g nd exposed pad on backside part numb er*** package mpq861 2gl - 12 qfn14 (3x4 mm) *** for tape & reel, add suffix ?z (eg. MPQ8612gl?12?z) top view 1 2 3 4 5 6 78 9 11 14 15 1 6 sw sw fr e q i n i n ag nd fb ss en vc c pg bs t g n d g nd exp o sed pad on backside in 10 gn d 12 13 17 sw top view 1 2 3 4 5 6 78 9 11 14 15 16 sw sw f r e q in in ag n d fb ss en vc c pg bs t g nd g nd e x p osed pad on backside in 10 gnd 12 13 17 sw part numb er**** packag e part numb er ***** packag e mpq861 2g r-16 qfn17 (4x4mm) MPQ8612gr-20 qfn17 (4x4mm) **** for tape & reel, add suffix ?z (eg. MPQ8612gr-16?z) ***** for tape & reel, add suffix ?z (eg. MPQ8612gr-20?z)
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 3 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. absolute m a xi mum ratings (1) supply voltage v in ...................................... 6.5v v sw ........................................ -0.3v to v in + 0.3v v sw (30ns) ................................... -3v to v in + 3v v in -v sw ................................. -0.3v to v in + 0.3v v in -v sw (3 0 n s) ............................ -3v to v in + 3v v bst ...................................................... v sw + 6v all other pins .................................. -0.3v to +6v continuous power dissipation (t a =+ 25 ) (2) ?? qfn(3 x 4mm)?? ?? ???...? ????2.6 w qfn(4 x 4mm)?? ?? ???...? ????2.8 w junction te mperature ............................... 150 c lead temperature .................................... 260 c storage temperature ............... -65 c to +150 c recommended operating conditions (3) supply voltage v in ................................ 3v to 6v output voltage v out .................... 0.608v to 4.5v operating junction temp. (t j ). -40c to +125c thermal resistance (4) ja jc qfn (3 x4mm) ......................... 48 ...... 10 ... c/w qfn (4 x4mm) ......................... 44 ....... 9 .... c/w notes : 1) exceeding these ratings ma y da m age the device. 2) the ma ximum allowable po w e r dissipation is a fun c tion of the maximum junction tempe r ature t j (max), the junction-to- ambient therm a l resistance ja , a nd the a m bient t e mperatu r e t a . the ma ximu m allow able cont inuous po w e r di ssipation at an y ambient tem peratur e is calculated b y p d (max)=(t j (max)- t a )/ ja . excee d ing the maximum allow able po wer dissipation w ill cause ex cessive die temperature, and the reg u l ator w ill go into thermal sh utdo w n . inte rnal thermal shutdo w n circuitr y protects the device from perma ne nt damage. 3) the device is not guarant eed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 4 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. electri c al characteristi cs v in = 5v, t j = -40 to +125 c, unless otherw ise noted. parameters sy mbol conditio n min t y p max units supply current supply cu rre nt (shutdo wn ) i in v en = 0v 0.001 2 a v en = 2v, v fb = 1v, mpq861 2-1 2 850 1100 1300 a supply cu rre nt (quie s cent ) i in v en = 2v, v fb = 1v, mpq861 2-1 6 , mpq861 2-2 0 600 1000 1300 a mosfet mpq861 2-1 2 , t j =25 c 10 18 mpq861 2-16, t j =25 c 7.4 13 high-si de swi t ch on resi st ance hs rds-on mpq861 2-2 0 , t j =25 c 6.6 12 m ? MPQ8612-1 2 , t j =25 c 7.8 10 mpq861 2-16, t j =25 c 5.5 11 low-side swi t ch on resi st ance ls rds-on mpq861 2-2 0 , t j =25 c 4.6 9.5 m ? switch le akage sw lkg v en = 0v, v sw = 0v or 5v, t j =25 c 0.001 5 a current limit mpq861 2-12 17 21 26 mpq861 2-16 23 28 33 high-si de current limit i li m i t mpq861 2-2 0 29 35 41 a timer r freq =82 k ? ,v out =1. 2 v , mpq861 2-1 2 170 ns one-s hot on time t on r freq =82 k ? ,v out =1. 2 v , mpq861 2-1 6 , mpq861 2-2 0 200 ns mpq861 2-1 2 30 75 150 ns minimum off time t off mpq861 2-1 6 , mpq861 2-2 0 30 110 160 ns fold ba ck ti mer (5) t foldback ocp happens 2.5 s over-voltage and under-voltage protection ovp thres h old v ovp1 110 120 130 %v ref ovp delay (5) t ovp 1 s uvp thres hold (5) v uvp 50 %v ref
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 5 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. electri c al characteristi cs (continued) v in = 5v, t j = -40 to +125 c, unless otherw ise noted. parameters sy mbol conditio n min t y p max units reference and soft start t j = -20 c to + 8 5 c, mpq861 2-1 2 602 608 614 t j = -20 c to + 8 5 c, mpq861 2-1 6 , mpq861 2-2 0 604 610 616 t j = -40 c to + 125 c, mpq861 2-1 2 599 608 617 referenc e vo ltage v ref t j = -40 c to + 125 c, mpq861 2-1 6 , mpq861 2-2 0 601 610 619 mv feedb ack cu rre nt i fb v fb = 608mv 0.001 50 na soft start chargin g current i ss v ss =0v 5.5 7.5 9 a enable and uvlo enable ri sin g thre sh old en vth-hi 1.4 1.8 v enable hy ste r esi s en vth-h y 890 mv v en = 2v 1 1.5 2 enable input curre n t i en v en = 0v 0.001 a vcc uv lo vcc unde r voltage lo cko u t thre sh old ri sing vcc vth 2.3 2.8 2.95 v vcc unde r voltage lo cko u t thre sh old hy stere s i s vcc hy s 300 mv po w e r good power goo d risi ng th re shold pg vth-hi 84 90 96 %v ref powe r good falling threshold pg vth-lo 63 70 73 %v ref powe r goo d deglit ch time r pg td t ss =1m s , 1.6 2.2 ms powe r goo d sink cu rrent capability v pg sink 4ma 0.4 v powe r goo d lea kag e cu rrent i pg_l eak v pg = 3.3v 50 na thermal protection therm al shutdown t sd note 5 150 160 c therm a l shut down hyste r e s is 25 c note : 5) guar anteed b y d e sign.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 6 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical characteri s tics performance waveforms are tested on the evaluation board of the design example section. v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. 0 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 0. 7 0. 8 - 50 - 25 0 25 50 75 100 125 150 1000 1050 1100 1150 - 5 0 - 25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 - 50 0 50 100 150 - 50 0 50 100 150 20. 50 20. 60 20. 70 20. 80 20. 90 21. 00 21.10 21. 20 21. 30 21. 40 21. 50 - 5 0 - 25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 146 148 150 152 154 156 158 160 162 - 5 0 - 25 0 25 50 75 100 125 150 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 - 5 0 - 25 0 2 5 5 0 7 5 100 125 150 27 27. 2 27. 4 27. 6 27. 8 28 28. 2 28. 4 - 40 0 25 85 125 34.4 34.6 34. 8 35 35. 2 35. 4 35. 6 35. . 8 - 4 0 0 25 85 125
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 7 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical characteri s tics (conti nued) performance waveforms are tested on the evaluation board of the design example section. v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. vcc uvlo threshold vs. temperature 2.55 2. 60 2. 65 2. 70 2. 75 2. 80 2. 85 2. 90 - 50 - 25 0 25 50 75 100 125 150 vcc rising t h r e s h o l d vcc falling t h r e s h o l d soft-start/shutdown current vs. temperature en threshold vs. temperature 0.00 0. 20 0. 40 0. 60 0. 80 1. 00 1. 20 1. 40 1. 60 1. 80 - 50 - 25 0 25 50 75 100 125 150 6. 90 6. 95 7. 00 7. 05 7.10 7. 15 7. 20 7. 25 7. 30 7. 35 7. 40 - 5 0 0 50 100 150 en rising thresho l d en falling t h r e s h o l d reference voltage vs. temperature ovp threshold vs. temperature 606 607 608 609 61 0 61 1 61 2 613 614 615 - 50 0 50 100 150 119. 5 120. 0 120. 5 121. 0 121. 5 122. 0 122. 5 - 50 - 25 0 25 50 75 100 125 150 MPQ8612-12 MPQ8612-16 MPQ8612-20
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 8 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical perfo r manc e characteristics (co n tinued) performanc e w aveforms are tested on the evaluation board of the design example section. MPQ8612-12, v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherw i s e noted. output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) output current (a) 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =6v v in =5v v in =4.2v v in =3.3v 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =6v v in =5v v in =4.2v v in =3.3v 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =3.3v v in =4.2v v in =5v v in =6v 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =6v v in =5v v in =4.2v v in =3.3v 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =5v v in =6v 50 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 1 0 100 v in =4.2v v in =3.3v v in =5v v in =6v 55 60 65 70 75 80 85 90 95 100 0.01 0.1 1 1 0 100 v in =5v v in =6v v in =4.2v v in =3.3v 60 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =5v v in =6v v in =3.3v 65 70 75 80 85 90 95 100 0.01 0.1 1 10 100 v in =4.2v v in =5v v in =6v v in =3.3v
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 9 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical perfo r manc e characteristics (c ontinued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612-12, v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. 75 80 85 90 95 100 0.01 0.1 1 10 100 -1.00 -0.50 0.00 0.50 1.00 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0 2 4 6 8 10 12 3456 0 200 400 600 800 1000 1200 200 400 600 800 1000 1200 550 570 590 610 630 650 3 3.5 4 4.5 5 5.5 6 0 100 200 300 400 500 600 700 024 6 8 1 0 1 2
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 10 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical perfo r manc e characteristics (c ontinued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612gl-12, v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. v sw 200mv/div . v sw 1v/div. dead time (on) i out =12a dead time off i out =12a v sw 5v/div. v in ac coupled 10mv/div . v out ac coupled 20mv/div . i l 2.5a/div . v sw 5v/div . v in ac coupled 10mv/div . v out ac coupled 10mv/div . i l 1a/div . v sw 5v/div . v in ac coupled 100mv/div . v out ac coupled 10mv/div . i l 10a/div . v pg 1v/div . v in 2v/div . v out 1v/div . v pg 2v/div . v in 2v/div . v out 1v/div . v pg 5v/div . v en 5v/div . v out 1v/div . v pg 5v/div . v en 5v/div . v out 1v/div . input/output voltage rippl i out = 0a input/output voltage ripple i out = 0.4a input/output voltage ripple i out = 12a power good through v in start-up i out = 12a power good through v in shutdown i out = 12a power good through en start-up i out = 12a power good through en shutdown i out = 12a
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 11 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical perfo r manc e characteristics (c ontinued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612gl-12, v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. v out 1v/div . v in 5v/div . v sw 5v/div . i l 1a/div . v out 1v/div . v in 5v/div . v sw 5v/div . i l 10a/div . v out 1v/div . v en 5v/div . v sw 5v/div. i l 2.5a/div. v out 1v/div . v en 5v/div . v sw 5v/div . i l 1a/div . v out 1v/div . v en 5v/div . v sw 5v/div . i l 10a/div . v out 1v/div . v in 5v/div . v sw 5v/div . i l 10a/div . v out 1v/div . v in 5v/div . v sw 2v/div . i l 1a/div . v out 1v/div . v in 5v/div . v sw 5v/div . i l 10a/div . start-up through vin i out = 0a start-up through vin i out = 12a shutdown through vin i out = 0a shutdown through vin i out = 12a start-up through en i out = 0a start-up through en i out = 12a shutdown through en i out = 0a shutdown through en i out = 12a v out ac coupled 200mv/div . i l 5a/div.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 12 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical perfo r manc e characteristics (c ontinued) performance waveforms are tested on the evaluation board of the design example section. MPQ8612gl-12, v in =5v, v out =1.2v, l=1.0h, t a =+25c, unless otherwise noted. v out 1v/div . v sw 5v/div . i l 10a/div . v out 1v/div . v sw 5v/div . i l 10a/div . v out 1v/div . v sw 5v/div . i l 10a/div. short circuit protection thermal shutdown i out = 12a thermal recovery i out = 12a
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 13 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. pin functio n s MPQ8612gl-12 pin # name description 1 agnd analog ground. 2 fb feedback. an external resistor divider from t he output to gnd, tapped to the fb pin, sets the output voltage. it is recommended to place t he resistor divider as close to fb pin as possible. vias should be avoided on the fb traces. 3 ss soft start. c onne ct on ex ternal capa cit o r to pro g ra m the soft start time for the switch mode regulator. 4 en enable pi n. pull this pi n highe r than 1 . 25v to ena b l e the chip. for a u tomati c sta r t-u p , con n e c t en pin to vin with 100k ? re si st or. can be used to set the on/off threshold ( adjust uvlo) with two additional resistors. 5 vcc supply voltage for driver and control circuits. decouple with a minimum 4.7f ceramic capacitor as close to the pin as possible. x7r or x5r grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. 6 pg powe r good output, and it is high if the output voltage is highe r than 90% of the nomina l voltage. there is a delay from fb 90% to pgood goes high. 7 bst bootstra p. a cap a cito r con necte d bet we en sw a nd b s pins i s re q u ired to fo rm a floating supply across the high-side switch driver. 8-9 gnd system grou nd. this pin i s the refe ren c e grou nd of the reg u lated output voltag e. for this reason care must be taken in pcb layout. 10-1 1 in supply voltage. the in pin sup p lie s power for int e rnal mosf et and regu lator. the mpq861 2 op erate fro m a +3v to +6v in put rail. an in put cap a cito r is nee ded to decoupl e the input rail. use wid e pcb trace s and mu ltiple vias to make the conne ction. 12 freq freq uen cy set during ccm operation. a resi sto r conne cted b e twee n freq and in i s requi re d to set the switchi ng freque ncy. the on time is determin ed by the input voltage and the re sist or conn ecte d to the freq pin. in conn e c t thro ugh a resi stor i s u s e d for line feed-fo rward and ma ke s the frequency b a si cally con s t ant durin g inp u t voltage?s variation. a n optional 1nf decoupling capacitor can be added to improve any switching frequency jitter that may be present. 13-14 sw switch o u tpu t. conne ct this pin to the i n ducto r an d bo otstrap ca pa citor. this pi n i s drive n up to the vin voltage by the high -si de switch d u ri ng the on -time of the pwm du ty cycle. the ind u cto r curre n t drive s the sw pin n egativ e du rin g the off-time . the on -re si stan ce of the low-sid e swit ch an d the internal scho ttky diode fixes the nega tive voltage. use wi d e pcb traces t o make the conne ction.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 14 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. pin functio n s (continued) MPQ8612gr-16, MPQ8612gr-20 pin # name description 1 agnd analog ground. 2 fb feedback. an external resistor divider from t he output to gnd, tapped to the fb pin, sets the output voltage. it is recommended to place t he resistor divider as close to fb pin as possible. vias should be avoided on the fb traces. 3 ss soft start. conne ct on external ca pa citor to prog ra m the soft start time for the swit ch mode regulator. 4 en enable pin. pull this pin highe r than 1.25v to ena ble the chi p . for autom atic sta r t-up, con n e c t en pin to vin with 100k ? re si st or. can be used to set the on/off threshold ( adjust uvlo) with two additional resistors. 5 vcc supply voltage for driver and control circuits. decouple with a minimum 4.7f ceramic capacitor as close to the pin as possible. x7 r or x5r grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. 6 pg powe r goo d output, and it is high if the output voltag e is high er th an 90% of th e nomin al voltage. there is a delay from fb 90% to pgood goes high. 7 bst bootstra p. a cap a cito r co n necte d betwe en sw and b s pins is re q u ired to form a floating supply across the high-side switch driver. 8-10 gnd system grou nd. this pin is the referen c e gr o und of the regulate d output voltag e. for this reason care must be taken in pcb layout. 11-1 3 in supply voltage. the in pin sup p lie s power for int e rnal m o sf et and reg u lator. the mpq861 2 op erate from a +3v to +6v i nput rail. an input ca pa cito r is nee ded t o decouple the input rail. use wid e pcb trace s and mu ltiple vias to make the conne ction. 14 freq freq uen cy set durin g ccm operation. a resi stor conne cted b e twee n freq and in i s requi re d to set the switchi ng freque ncy. the on time is determin ed by the inp u t voltage and the re si stor con nect ed to the fre q pin. in conn e c t thro ugh a resi stor i s u s e d for lin e feed-fo rward and ma ke s th e frequ en cy b a si cally co nst ant duri ng in p u t voltage?s v a riation. a n optional 1nf decoupling capacitor can be added to improve any switching frequency jitter that may be present. 15-1 7 sw switch outp u t. conne ct this pin to the inducto r and b ootstra p ca pa citor. thi s pin is driven up to the vin voltage by the hig h -side swit ch d u rin g the on-tim e of the pwm duty cycle. the indu ctor curre n t drives the sw pin negativ e duri ng the off-time. the on-resistan ce of the low-si de swit ch a nd th e intern al schottky diod e fixes the n ega tive voltage. use wi de pcb traces t o make the conne ction.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 15 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. block diagram 0.6 08 v 0. 3v 0. 7 5 v fre q vc c en ss fb pg in bs t sw gn d agnd r sen hs - f e t hs dr i v e r ls - fe t ls dr i v e r c u rre n t modul a t or lo g i c cur r e nt s e ns e am pli f e r re f r e s h ti m e r oc o v e r- c u rre n t ti m e r xs xr q pw m bs t r e g of f tim e r ili m hs l i m i t com p a r a t o r st a r t on tim e r lo op co m p a r a t o r uv ov uv d e t e c t com p a r a t or ov d e t e c t com p a r a t or p good com p a r a t or sof t st a r t / st op re fe r e n c e 1m eg vc c figure 1?functional block diagram
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 16 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. operation pwm operation the MPQ8612 is fully integrated synchronous rectified step-down switch mode converter. constant-on-time (cot) control is employed to provide fast transient response and easy loop stabilization. at the beginning of each cycle, the high-side mosfet (hs-fet) is turned on when the feedback voltage (v fb ) is below the reference voltage (v ref ), which indicates insufficient output voltage. the on period is determined by the input voltage and the frequency-set resistor as follows: 49 . 0 ) v ( v ) k ( r 8 . 4 ) ns ( t in freq on ? = (1) after the on period elapses, the hs-fet is turned off, or becomes off state. it is turned on again when v fb drops below v ref . by repeating operation th is way, the converter r egulates th e output voltage. the inte grated low-side mosfet (ls-fet) is turned on w hen the hs-fet is in it s off state to minimize the conduction loss. the re will be a de ad short be tween input and gnd i f both hs-fet and ls-fet are turned on at th e same time. it?s calle d shoot-through. in order to avoid shoot-through, a dead-time (dt) is internally generated between hs-f et off and ls- fet on, or ls-fet off and hs-fet on. heav y - loa d operatio n figure 2?heav y loa d operatio n when the o u tput curren t is high a n d the indu ct or current is always above zero amps, it is called continuous- c onduction- mode (ccm). the ccm mode operation is shown in figure2. when v fb is below v ref , hs-mosf e t is turned on for a fixe d interval which is deter mined by o ne- shot o n - timer as equation 1 shown. when the hs- mosfet is turned off, t he ls-mosfet is t u rned on until next period. in ccm mo de operatio n, the swit ching freque nc y is fairly constant and it is called pw m mode. light-load operation with the lo ad decreasing, the ind uctor curre nt decreases too. wh en the in ductor curr ent touches zer o , the operation is tr ansited from continuous- c onduction- mode (ccm) to discontinu o us-conduct i on-mode (dcm). the light lo ad operatio n is shown in figure 3. when v fb is below v ref , hs-mosfet is turn ed on for a fixed interval which is de termined by one- shot o n -timer as equation 1 shown. wh e n the hs-mosfet is tur ned off, th e ls-mosf e t is turned o n until the inductor cur r ent reache s zero. in dcm operation, the v fb does not reach v ref when the inductor current is approaching zero. the driver of ls-fet turns into tri-st ate (high z) whenever the inductor cur r ent reaches zero. a current modulator takes over the control of ls-fet and limits th e inductor current to less than -1ma. hence, the output capacit ors discharge slowly to gnd through l s -fet. as a result, the efficiency a t light load condition is greatly improved. at light load con d ition, the hs- fet is not turned on a s frequently as at heav y load condit i on. this is called skip mode. at light loa d or no lo ad conditio n , the outp u t drops very slowly and the mpq861 2 reduce th e switching fr equency naturally and then high efficiency is achieved at light load. v ou t v in v sw i ou t v re f v fb i l c u rrent modu la tor regu la tes a r ound -1m a t on is c o ns to n t figure 3?light load operation
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 17 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. as the output current increases from the light load condition, the time period within which the current modulator regulates becomes shorter. the hs-fet is turned on more frequently. hence, the switching frequency increases correspondingly. the output current reaches the critical level when the current modulator time is zero. the critical level of the output current is determined as follows: in out out out sw in (v v ) v i 2l f v ? = ( 2 ) it turns into pwm mode once the output current exceeds the critica l level. after that, the switching frequency stays fairly constant over the output current rang e. sw itching frequenc y the selectio n of switching frequency is a trade off between efficiency an d component size. lo w frequency operation increases e fficiency b y reducing mosfet swit ching lo sses, but require s larger inductance and capacitan ce to maintai n low output voltage ripple . for mpq86 1 2 the on time can be set usin g freq pin, then the fre quency is set in steady state operation at ccm mode. adaptive constant-on-time (cot) control is u s ed in mpq861 2 and there is no dedicated oscillat or in the ic. connect freq pin to in pin t h roug h resistor r freq and th e input volt age is fee d - forwarded to the one-shot on-time timer through the resisto r r freq . when in steady state operation a t ccm, th e duty ratio is kept as v out /v in . he nce the swit ching frequ ency is fairly constant o v er the input voltage range. the switching fre quency can be set as follows: 6 sw fr e q in delay in o u t 10 f( k h z ) 4. 8 r (k ) v( v ) t( n s ) v( v ) 0 . 4 9 v ( v ) = + ? (3) where t delay is the comparator de lay. it?s about 40ns. generally, the mpq86 12 is set f o r 300khz t o 1mhz application. it is optimized to operate at high switch ing frequen cy with high efficien cy. high switch ing frequen cy makes it possib l e t o utilize small sized lc fi lter compon ents to save system pcb space. jitter and fb ramp sl ope figure 4 and figure 5 show jitter occurring in both pwm mode and s k ip mode. when there is noise in the v fb downwa r d slope, the on time o f hs-fet de viates from its intended location an d produces jitt er. it is necessary to un derstand th at there is a relationship between a system?s stability an d the steep ness of the v fb ripple?s downward slope. the slope steepne ss of the v fb ripple dominates in noise immunit y . the magnitude of the v fb ripple doesn?t affect the noise immunity directly. figure 4?jitter in pwm mode v sl o p e2 v fb v noise v ref hs driver jitter figure 5?jitter in skip mode ramp w i th large esr capacitor in the case of poscap or other types of capacitor with lager esr is applied as output capacitor, the esr ripple dominates the output ripple, and the slope on the fb is quite esr related. figure 6 shows an equivalent circuit in pwm mode with the hs-fet off and without an external ramp circuit. turn to application information section for design steps with large esr capacitors.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 18 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. r1 r2 esr poscap sw vo l fb figure 6?simplified circuit in pwm mode w i thout ext e rnal ramp compensation to realize t he stability when no external ramp is applied, usu a lly the esr value should be chosen as follow: sw on esr out tt 0. 7 2 r c + (4) t sw is the switching period. ramp w i th small esr capacitor when the output capa citors are ceramic ones, the esr ripple is not high enough t o stabilize t he system, an d external ramp co mpensation is needed. skip to application information sectio n for design st eps with small esr caps. r1 r2 ce r a m i c sw fb vo l r4 c4 i r4 i c4 i fb r9 figure 7?simplified circuit in pwm mode w i th external ramp compensation in pwm mo de, an equivalent circu i t with hs-fet off and the use of an external ramp compensation circuit ( r 4, c4) is simplified in figure 7. t he external ramp is derived from th e inductor rip p le current. if one chooses c4, r9, r1 and r2 to meet the following con d ition: 12 9 sw 4 1 2 rr 11 r 2f c 2 0 r r ?? < + ?? + ?? (5) where: r 4 c4 f b c4 ii i i = + (6) and the ramp on the v fb can then be estimated as: in o 12 ramp o n 44 1 2 9 vv r/ / r vt rc r / / r r ?? ? = ?? + ?? (7) the downward slope of the v fb ri p p l e t h en follows: out ra m p slop e 1 off 4 4 v v v tr c ? == (8) as can be seen from equation 8, if there is instability in pwm mod e , we can r educe eith e r r4 or c4. if c4 can not be reduced further due to limitation fr om equation 5, then we can only reduce r4. for a stable pwm o peration, th e v slope1 shou ld be design follow equation 9. sw on 3 esr o u t o s l ope 1 ou t ou t s w o n tt rc 0. 7 i 1 0 0.7 2 vv 2l c t t ? +? ? + ? (9) where io is the load curr ent. in skip mode, the downward slope of the v fb ripple is alm o st same whether the external ramp is used or n ot. fig.8 sh ows the simplified circuit of the skip mode when both the hs -fet and l s - fet are off. r1 r2 cout fb vo ro figure 8?simplified circuit in skip mode the downward slope o f the v fb ripple in skip mode can be determined as follows: re f sl op e 2 12 o o u t v v [( r r ) / / r ] c ? = + (10) where ro is the equivalent load resistor. as describe d in fig.5, v slope2 in the skip mode is lower than that is in t he pwm mode, so it is reasonable that the jitt er in the skip mode is
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 19 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. larger. if o ne wants a system wi th less jitte r during ultra light load co ndition, the values of the v fb resistors should not be too big, however, th at will decrease the light lo ad efficien cy. soft start/stop the mpq8 612 employs soft st art/stop (s s) mechanism to ensure smooth o u tput during power up and power down. when the en pin be comes high, an internal current source (8 a) charges up the ss capacitor c6. the ss capacitor voltage takes over the ref voltage to the pwm comparator. the outp u t voltage smoothly ramps up with the ss voltage . once the ss voltage reaches the same level a s the ref voltage, it keeps ramping up while v ref takes over the pwm comparator. at this point, the soft sta r t finishe s a nd it enters into steady state operation. when the en pin is pulled to low, the ss cap voltage is discharged through an 8ua internal current source. once the ss voltage reaches ref voltage, it takes over the pwm comparator. the output voltage will decrease smoothly with ss voltage until zero level. the ss capacitor value can be determined as follows: ss ss ss ref t( m s ) i ( a ) c( n f ) v = (1 1) if the out pu t capacitors have large capacitance value, it?s n o t recomme nded to set the ss time too small. otherwise, it?s easy to hit the curre nt limit during ss. a minimum value of 4.7nf should be used if the output capacitance value is larger than 330 f. pre-bias startup if the output is pre-bia s ed to a certain voltage during start up, the MPQ8612 will disabl e th e switching o f both high-side and low- side swit che s until the voltage on the inter nal soft-st art capacitor exceeds the sensed outp u t voltage a t the fb pin. pow e r good (pg) the mpq8 612 has po wer-good (pg) output. it can be con nected to v cc or other voltage source through a resistor (e.g. 100k). when the MPQ8612 is powered on and fb voltage reaches above 90% of ref voltage, the pg pin is pu lle d high. when the fb voltage drops to 70% of ref voltage or the part is n o t powered on, the pg pin will be pulle d low. over-cu rre nt protection (ocp) the mpq8 612 enters over-current protectio n mode when the induct o r current hit s the curren t limit, and tries to recover from o v e r-current fault with hiccup mode. th at means in over-current protection, the chip will disa ble o u tput power stage, discharge soft- start capa citor and the n automatically try to soft -start again. if the over- current con d ition still h o lds after soft-start end s, the chip re peats this operation cycle till ove r - current disappears and output rises back t o regulation level. the MPQ8612 also operates in hiccup mod e when short circuit hap pens. over/under ?voltage protection (ovp/uvp) the mpq8 612 has n on-latching over voltage protection. it monitors the output voltage through a resistor divider feedback (fb) voltage to detect over-voltage on the output. when the fb voltag e is higher than 120% of t he ref volt age (0.608v), the ls-fet will be turned on while the hs-fet will be off. the ls-fet keeps on u n til it hit s the negative current limit and turns off for 100ns. if over voltage condition st ill hold s , the chip repeat s this operati on cycle till the fb voltage drops below 110% of the ref voltage. when the fb voltage is below 50% of the ref voltage (0.608v), it is recognized as und er- voltage (uv). usually, uvp accompanies a hit in current limit and results in ocp. configurin g the en control the en pin provides electrica l on /off control of the device. set en high to turn on t he regulator and low to turn it off. do not float this pin. for automat ic start-up, t he en pin can be pulle d up to in put voltage thr ough a re sistive voltage divider. choose the values of the pull-up resist or (r up from vin pin to en pin) and the pull-dow n resistor (r dow n from en pin to gnd) t o determine the automatic start-up voltage: up down in st a r t dow n rr v1 . 4 r ? + = (12)
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 20 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. for exampl e, for r up =100k ? and r dow n =51k ? , the ? in st a r t v is set a t 4.15v. to avoid noise, a 10n f ceramic capacitor from en to gnd is recommen ded. there is a n internal ze ner diode o n the en pin, which clam ps the en pin voltage to prevent it from runnin g away. the ma ximu m pull up curren t assuming a worst case 6v internal zener clamp should be le ss than 1ma. therefore, when en is driven by an external logic signal, th e en voltage should be lo wer than 6v; when en i s connected with vin through a pull-up resistor or a resistive voltage divider, the resistance se le ction should ensure the maxi mum p u ll up curre nt less tha n 1ma. if using a resistive voltage divider and vin higher than 6v, the allowed minimum pull-up resistor r up should meet the following equation: in up d o w n v( v ) 6 6 1( m a ) r ( k) r ( k) ? ?< ? (13) as a result, when just the pull-up resistor r up is applied, th e ? in st a r t v is determined by i nput uvlo. the value of r up can be get as: in up v( v ) 6 r( k ) 1( m a ) ? > (14 ) a typical pull-up resistor is 100k ? . uvlo p r otection the MPQ8612 has under-voltage lock-out protection ( u vlo). wh en the vcc voltage is higher than the uvlo rising thre shold voltag e, the MPQ8612 will be powered up. it shut s o ff when the vcc voltage i s lower than the uvlo falling thre shold volta ge. this is non-latch protection. the mpq86 12 is disabled when the vcc voltag e falls below its uvlo fal ling threshold (2.45v). if an application requires a higher under-voltage lockout (uv l o), use th e en pin a s shown in figure 9 to adjust the input volta ge uvlo b y using two e x ternal resistors. it is re commended to use the enable re sistors to set the uvlo falling threshold (v stop ) above 2.8 v. the risin g threshold ( v start ) should be set to provide enough hysteresis to allow for any input supply variations. en comparator r up r down vc c en MPQ8612 in figure 9?adjustable uvlo thermal shutdow n thermal shutdown is e m ployed in the mpq861 2. the junctio n temperature of the i c is interna lly monitored. if the junction tempera t ure exceeds the thresh old value (minimum 150oc), the converter sh uts off. this is a non-latch protection . there is about 25oc hysteres is. once the junction te mperature drops to a bout 125oc, it initiates a so ft startup.
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 21 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. appli c ation information setting the output voltage-large esr caps for applications that ele c trolytic cap a citor or pos capacitor with a controlled output o f esr is set as output ca pacitors. th e output volt age is set by feedback r e sistors r1 and r2. as figure 10 shows. r1 r2 esr po s c ap sw vo l fb figure 10?simplified circuit of pos capacitor first, choo se a value for r2. r2 should be chosen rea s onably, a small r2 will lead to considerable quiescent current lo ss while to o large r2 makes the fb noise sensitive. it is recommend ed to choo se a value within 5k ? - 100k ? for r2, using a comparatively larger r2 when v out is low, and a smaller r2 when v out is high. then r1 is determined as follow with the output ripple considered: out o ut r e f 12 ref 1 vv v 2 rr v ? ? = (15) ou t v is the outpu t ripple dete r mined by equation 21. setting the output voltage-small esr caps r1 r2 cer a m i c sw fb vo l r9 r4 c4 figure 11?simplified circuit of ceramic capacitor when low esr ceramic capacitor is used in the output, an external voltage ramp should be added to fb through resistor r4 and capacit or c4.the output voltage is influen ced by ramp voltage v ramp besides r e sistor divid e r as shown in figure 1 1. the v ramp can be calculated as shown in equation 7. r2 should be chosen reasonably, a small r2 will lead to considerabl e quiescent current loss while too lar ge r2 makes the fb noise sensitive . it is recommended t o choose a value within 5k ? -100k ? for r2, using a comparative l y larger r2 when v out is low, and a smaller r2 when v out is high. and the value of r1 then is d e termined as follow: 2 1 fb ( avg) 2 out f b ( a v g ) 4 9 r r v r vv r r = ? ?+ (16) the v fb(avg ) is the average value on the f b . v fb(avg) varies with t he vin, vo, and load condition, et c.. its value on the skip mode woul d be lower th an that of the pwm mode, which means the load regulation is strict ly related to th e v fb(avg) . also the lin e re gulation is r e lated to th e v fb(avg) ,if o ne wants to gets a bett e r load or line regulation, a lower v ramp is sugg ested once it meets equation 9. for pwm operation, v fb(avg) value can be deduced fro m equation 17. 12 f b(avg) ref ra m p 12 9 r/ / r 1 vv v 2r / / r r =+ + (17) usually, r9 is set to 0 ? , and it can also be set following equation 18 for a better no ise immunity. it should b e set to b e 5 timers smaller than r1//r2 to mi nimize its inf l uence on v r amp. 12 9 12 rr 1 r 10 r r ? + (18) using equat ion 16 and 17 to calcu l ate the outp u t voltage can be complicated. t o simplify the calculat ion of r1 in equation 16, a dc-blocking capacitor cdc can be added to filter the dc influence fr om r4 and r9. f i gur e 12 shows a simplified circuit with external ramp compensation and a d c -blocking capacitor. with this capacit or, r1 can easily be obtained by using equation 19 for pwm mode o peration. out r ef ra m p 12 ref r amp 1 vv v 2 rr 1 vv 2 ?? = + (19) cdc is sugg ested to be at least 10 times larger than c4 for better dc blocking performance, and
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 22 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. should be not larger t han 0.47uf considerin g start up performance. in case one wants to use larger cdc for a better fb noise immunity,co m bined with reduced r1 and r2 to limit the cdc in a re asonable value withou t affecting the system start up. be noted that even when the cdc is app lied, the lo ad and lin e regulation ar e still vramp related. r1 r2 cer a m i c sw fb vo l cdc r4 c 4 figure 12?simplified circuit of ceramic capacitor w i th dc blocking capacitor input capacitor the input current to the step-down converter is discontinu o u s. therefor e, a capacit or is require d to supply t he ac current to the step-down converter while maintaining the dc input voltage. ceramic ca pacitors are recommen ded for best performance. in the layout, it?s recommended to put the inpu t capacitor s as close to t he in pin as possible. the capa citance va ries significantly over temperature. capacitors with x 5 r and x 7 r ceramic die l ectrics are recommen ded because they are fairly stable over temperature. the capacit ors must also have a ripple current rating great er than the maxi mum input ripple current of th e converter. the input r i pple curren t can be estimated as follows: out o ut ci n o u t in in vv ii ( 1 ) vv = ? (20) the worst-case conditio n occurs at v in = 2v out , where: out ci n i i 2 = (21) for simplification, cho o se the in put capacit or whose rms current rating is greate r than half of the maxi mu m load current. the input ca pacitance value determines the inpu t voltage ripple of the co nverter. if there is inp u t voltage ripple requirement in the sy stem design , choose the input cap a citor that meets th e specification the input voltage ripp le can be estimated a s follows: out o u t out in s w in in in iv v v( 1 ) fc v v = ? (22) the worst-case condit i o n occurs at vin = 2vout , where: out in sw in i 1 v 4f c = ( 23) output cap acitor the output capacitor is required to maintain the dc output voltage. ceramic or poscap capacitors a r e recomme nded. the output voltage ripple can b e estimated as: ou t ou t out e s r sw i n s w o u t vv 1 v( 1 ) ( r ) fl v 8 f c = ? + (24) in the case of ceramic capacitors, th e impedance at the switching frequency is dominated by th e capacitan ce . the outpu t voltage ripple is mainly caused by the capacit ance. for simplificat io n, the output voltage ripple can be estimated as: ou t o ut out 2 in sw o u t vv v( 1 ) v 8f l c = ? (25) the output voltage ripple caused by esr is very small. therefore, an external ramp is needed t o stabilize the system. the external ramp can be generated through resistor r4 and capacitor c4 following eq uation 5, 8 a nd 9. in the case of poscap capacitor s, the esr dominates the impedance at the switching frequency. the ramp voltage gene rated from the esr is hig h enough t o stabilize the system. therefore, an external ramp is n o t needed. a minimu m esr value around 12m ? is required to ensure stab le operation of the co nverter. for simplificat io n, the o u tput ripple can be approximate d as: ou t ou t ou t e s r sw i n vv v( 1 ) r fl v = ? (26) inductor the induct o r is re quired to sup p ly constan t current to t he output lo ad while be ing driven by the switch ing input voltage. a larger valu e
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 23 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. inductor will resu lt in less ripple current an d lower outpu t ripple voltage. however, a larg er value induct o r will have a larger p h ysical size , higher serie s resist ance , and/or lower saturatio n current. a g ood rule for determinin g the induct o r value is to allow the p eak-to-peak ripple current in the inductor to be approximatel y 10~30% of the maxi mum output current. also , make sure that the peak induct or current is below the current limit of the device. the ind u ctance value can be calculated as: out o ut sw l i n vv l( 1 ) fi v = ? (27 ) where i l is the peak-to-peak inductor ripple current. choose an inductor tha t will not sa turate under the maxi mu m inductor peak curren t. the peak inductor curr ent can be calculated a s : ou t ou t lp o u t sw i n vv ii ( 1 ) 2f l v =+ ? (28) the induct o rs listed in table 1 are highl y recommend ed for the high efficie n cy they can provide. table 1?inductor selection guide part numb er manufac ture r inducta nce (h ) dc r (m ? ) curre nt ratin g (a ) dimensions l x w x h (m m 3 ) s w i t ching freque nc y (kh z ) fdu125 0c-r50m toko 0.50 1.3 46.3 13.3 x 12.1 x5 1000 fdu125 0c-r56m toko 0.56 1. 6 42.6 13.3 x 12.1 x5 800-100 0 fdu125 0c-r75m toko 0.75 1. 7 32.7 13.3 x 12.1 x5 600-800 fdu125 0c-1 r0m toko 1.0 2.2 31.3 13.3 x 12.1 x5 600 t y pical des i gn parameter tables the following tables include r e commende d component values for typical ou tput voltages (1.0v, 1.2v, 1.8v, 3.3v) and switching frequencies (600khz, 80 0khz, and 1 m hz). refe r to tables 2 - 4 for desig n cases wit hout external ramp comp ensation an d tables 5- 7 for desig n cases wit h external ramp compensation. external ra mp is not needed when high-esr capacitors, such a s ele c trolytic or poscaps are used. external ramp is needed when low-esr capacitors, such as cer amic capacitors are use d. for cases n o t listed in t h is datashe et, a calcula t or in excel spreadsheet can also be requested through a lo cal sale s re presentative to assist wit h the calcu l ation. table 2?c out -poscap, 600khz, 5v in v out (v) l ( h) r1 (k ? ) r2 (k ? ) r7 (k ? ) 1.0 1.0 19.8 30 300 1.2 1.0 29.4 30 365 1.5 1.0 29.4 20 453 1.8 1.0 39.2 20 549 3.3 1.0 44.2 10 1000 table 3?c out -poscap, 800khz, 5vin v out (v) l ( h) r1 (k ? ) r2 (k ? ) r7 (k ? ) 1.0 0.75 20 30 210 1.2 0.75 20 20 270 1.5 0.75 30 20 330 1.8 0.75 39 20 499 3.3 0.75 44.2 10 750 table 5?c out -cerami c , 600khz, 5vin v out (v) l ( h) r1 (k ? ) r2 (k ? ) r4 (k ? ) c4 (pf) r7 (k ? ) 1.0 1 .0 21 30 240 470 309 1.2 1 .0 33 30 220 470 365 1.5 1 .0 51 30 330 390 464 1.8 1 .0 45 20 270 470 549 3.3 1 .0 62 10 160 680 953 table 6?c out -cerami c , 800khz, 5vin v out (v) l ( h) r1 (k ? ) r2 (k ? ) r4 (k ? ) c4 (pf) r7 (k ? ) 1.0 0 .75 21 30 200 470 226 1.2 0 .75 34 30 200 470 270 1.5 0 .75 34 20 220 470 324 1.8 0 .75 47.5 20 225 470 402 3.3 0 .75 57.6 10 200 560 750
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 24 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. typical application in fr e q vc c en pg n d bst fb sw MPQ8612gl-12 vin c1 a r7 c5 c3 l1 r1 r2 r5 pg agnd ss c6 33nf 22uf c1 b 22 uf c1 c 22u f c1 d 0. 1u f c1 e 2 2uf c7 1n f 360k 10 r8 r6 100k 4.7uf 100k r3 0 1uh 29 .4 k 30 k vo u t c2a c2b 0.1uf 1u f 220uf/20m + figure 13 ? t y pical application circuit w i t h no external ramp MPQ8612gl- 12, v in =5v, v out =1.2 v, i out = 12a, f sw =600khz in fr e q vc c en pg n d bst fb sw MPQ8612gl-12 vin c1 a r7 c5 c3 l1 r4 c4 r1 r2 r5 pg agnd ss c6 33nf 22uf c1 b 22u f c1 c 22 u f c1 d 0. 1uf c1e 22 u f c7 1n f 36 0k 10 r8 r6 100 k 4.7uf 100k r3 0 1uh 220 k 470pf 33 k 30k r9 0 vout c2 a 22 uf c2 b 2 2uf c3 c 22u f c2 d 0. 1uf 22uf c2 e 1u f figure 14 ? typical application circuit with low esr ceramic capacitor MPQ8612gl- 12, v in =5v, v out =1.2v, i out = 12a, f sw =600khz in fr e q vc c en pg n d bst fb sw m p q 861 2 vi n c1 a r7 c5 c3 l1 r4 c4 r1 r2 r5 pg agnd ss c6 33nf 22uf c1 b 22u f c1 c 22 u f c1 d 0. 1uf c1 e 22 u f c7 1n f 36 0k 10 r8 r6 100 k 4.7uf 100k r3 0 1uh 200 k 560pf 29 . 1k 30 k cd c 10n f vo u t c2a 22 uf c2 b 2 2uf c3 c 22u f c2 d 0. 1uf 22uf c2 e 1uf figure 15 ? t ypical application circuit with low esr ceramic capacitor and dc-blocking capacitor . MPQ8612gl- 12, v in =5v, v out =1.2v, i out = 12a, f sw =600khz
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 25 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. layout recommendation 1. the high current paths (gnd, in, and sw) should be placed very close to t he device with short, d i rect and wide traces. 2. put the input capacitor s as close to the i n and gnd pi ns as possib l e. 3. put the decoupling cap a citor as close to the vcc and gnd pins as possible. 4. keep the switching no de sw short and away from the feedback netw o rk. 5. the external feedback resistor s should be placed next to the fb pin. make sure that there is no via on the fb trace. 6. keep the b s t voltage path (bst, c3, and sw) as shor t as possible . 7. keep the in and gnd pads conn ected with large copp er to achieve better thermal performance. 8. four-layer layout is stro ngly recommended to achieve better thermal performance. in fr e q vcc en pg n d bs t fb sw mp q 8 6 1 2 v in c1 r fre q c5 c3 l1 r4 c4 r1 r2 c2 r3 pg agnd ss v out c6 r6 r5 schematic for pcb la y out guide line freq in r3 c1b r3 c1a r3 r1 r3 r2 r3 r3 r3 r4 r3 c4 r3 c6 r3 c5 r3 c2 1 sw sw fr e q in ag nd fb ss en vc c pg bs t gnd sw in in gn d gn d vin gnd sw vou t l1 top la y e r gn d inner1 la y e r gn d inner2 la y e r r3 c3 r3 r5 r3 r6 r3 r freq vin gnd vout bottom la yer figure 16?pcb la y o u t
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r MPQ8612 rev. 1 . 11 www.monolithicpower.com 26 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. package informati o n qfn (3x4mm) side view bottom view note: 1 ) a l l d i m e nsi o ns ar e i n m i l l i m et e r s . 2 ) e xpo sed pa d d l e s i z e d o e s n o t i n c l u d e m o l d fla sh . 3 ) l e ad co p l a nar i t y s h a l l be 0 . 10 m i lli m e ter s m a x . 4 ) j e dec r e f e re n c e i s m o - 2 2 0 . 5) drawing is not to scale. pin 1 id m ark i n g top view pin 1 id i n d e x ar e a recommended land pattern 0.1x45
MPQ8612 D 12a/16a/20a, 6v, synchronous st ep-down conv erte r notice: t he i n formatio n in this docum ent is subject to chang e w i t h o u t notice. please c ontact m ps for current specifi c ations. users sho u ld w a rrant a nd g u a rante e that thi r d part y inte lle ctual prop ert y rights ar e n o t infring ed u pon w h e n inte grati ng mps prod ucts into a n y app licati on. mps w i ll n o t assume an y l e g a l resp onsi b il ity for an y sa id a pplic atio ns. MPQ8612 rev. 1 . 11 www.monolithicpower.com 27 10/22/2013 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2013 mps. all rights reserved. qfn (4x4mm)

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