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general description the max5955 and max5956 are +1v to +13.2v dual hot-swap controllers with independent on/off control for complete protection of dual-supply systems. they allow the safe insertion and removal of circuit cards into live backplanes. the max5955 and max5956 operate down to 1v provided one of the inputs is above 2.7v. the discharged filter capacitors of the circuit card pro- vide low impedance to the live backplane. high inrush currents from the backplane to the circuit card can burn up connectors and components, or momentarily collapse the backplane power supply leading to a system reset. the max5955 and max5956 hot-swap controllers pre- vent such problems by gradually ramping up the output voltage and regulating the current to a preset limit when the board is plugged in, allowing the system to stabilize safely. after the startup cycle is completed, two on-chip comparators provide variablespeed/bilevel protection against short-circuit and overcurrent faults, as well as immunity against system noise and load transients. in the event of a fault condition, the load is disconnected. the max5955b and max5956b must be unlatched after a fault, and the max5955a and max5956a automatically restart after a fault. the max5955 and max5956 integrate an on-board charge pump to drive the gates of low-cost, external n- channel mosfets. the devices offer integrated fea- tures like startup current regulation and current glitch protection to eliminate external timing resistors and capacitors. these devices provide open-drain status outputs, an adjustable startup timer, and adjustable current limits. the max5955 provides output undervolt- age/overvoltage protection for each channel, while the max5956 provides undervoltage/overvoltage monitor- ing for each channel. the max5955 and max5956 are available in a space- saving 16-pin qsop package. applications features ? safe hot swap for +1v to +13.2v power supplies with v in1 or v in2 2.7v ? independent on/off control for each channel ? internal charge pumps generate n-channel mosfet gate drives ? inrush current regulated at startup ? circuit-breaker function ? adjustable circuit breaker/current-limit threshold from 25mv to 100mv ? variablespeed/bilevel circuit breaker response ? autoretry or latched fault management ? status outputs indicate fault/safe condition ? output undervoltage and overvoltage monitoring or protection max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control ________________________________________________________________ maxim integrated products 1 ordering information 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 pgood1 pgood2 on2 in2 sense2 gate2 on1 lim2 mon2 top view max5955 max5956 qsop tim in1 gnd sense1 gate1 lim1 mon1 pin configuration 19-3813; rev 0; 9/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin-package max5955 aeee -40? to +85? 16 qsop max5955aeee+ -40? to +85? 16 qsop max5955auee 0? to +85? 16 qsop max5955auee+ 0? to +85? 16 qsop max5955beee -40? to +85? 16 qsop max5955beee+ -40? to +85? 16 qsop max5955buee 0? to +85? 16 qsop max5955buee+ 0? to +85? 16 qsop variable speed/bilevel is a trademark of maxim integrated products, inc. + denotes lead-free package. ordering information continued at end of data sheet. selector guide and typical operating circuit appear at end of data sheet. base station line cards network switches, routers, hubs solid-state circuit breakers raid power-supply sequencing hot plug-in daughter cards portable computer device bays (docking stations)
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v in_ = +1v to +13.2v provided at least one supply is higher than +2.7v, v on1 = v on2 = +2.7v, t a = t min to t max , unless otherwise noted. typical values are at v in1 = +5v, v in2 = +3.3v, and t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in_ to gnd...........................................................................+14v gate_ to gnd ...........................................-0.3v to (v in_ + 6.2v) on_, pgood_, tim to gnd.......................-0.3v to the higher of (v in1 + 0.3v) and (v in2 + 0.3v) sense_, mon_, lim_ to gnd ...................-0.3v to (v in_ + 0.3v) current into any pin .........................................................?0ma continuous power dissipation (t a = +70?) 16-pin qsop (derate 8.3mw/? above +70?)...........667mw operating temperature range max59_ _ _u_ _ ...................................................0? to +85? max59_ _ _e_ _ ................................................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units power supplies in_ input voltage range v in other v in +2.7v 1.0 13.2 v supply current i in i in1 + i in2 , v in1 = +5v, v in2 = +3.3v 1.2 2.3 ma current control t a = +25 c 22.5 25 27.5 lim = gnd t a = -40 c to +85 c 20.5 27.5 slow-comparator threshold (v in _ - v sense _) (note 2) v sc,th r lim = 300k ? 80 100 130 mv 1mv overdrive 3 ms slow-comparator response time (note 3) t scd 10mv overdrive 110 ? v su,th during startup 2 x v sc , th fast-comparator threshold (v in _ - v sense _) v fc,th v in _ - v sense _; normal operation 4 x v sc , th mv fast-comparator response time (v in _ - v sense _) t fcd 10mv overdrive, from overload condition 260 ns sense input bias current i b sense v sense _ = v in _ 0.03 1a mosfet driver r ti m = 100k ? 6 10.8 16 r tim = 4k ? (minimum value) 0.31 0.45 0.58 startup period (note 4) t start tim floating 4 9 17 ms c har g i ng , v gate _ = + 5v , v in _ = + 10v ( n ote 5) 65 100 130 ? average gate current i gate discharging, triggered by a fault or when v on_ < 0.875v 3ma v in _ = 3v to 13.2v 4.8 5.4 6.0 gate-drive voltage v drive v gate_ - v in _, i gate_ < 1? v in _ = 2.7v to 3.0v 4.1 5.0 6.0 v on_ comparator low to high 0.85 0.875 0.90 v on_ threshold v on_ , th hysteresis 25 mv on_ propagation delay 10mv overdrive 50 ?
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in_ = +1v to +13.2v provided at least one supply is higher than +2.7v, v on1 = v on2 = +2.7v, t a = t min to t max , unless otherwise noted. typical values are at v in1 = +5v, v in2 = +3.3v, and t a = +25?.) (note 1) parameter symbol conditions min typ max units v on_ < 4.5v 0.03 v on_ > 4.5v 100 on_ input bias current i bon v in1 = v in2 = +13.2v v on_ = 4.5v 0.03 1 ? on_ pulse-width low t unlatch to unlatch after a latched fault 100 ? digital output (pgood_) output leakage current v pgood _ = 13.2v 1 a output voltage low v ol i sink = 1ma 0.4 v pgood_ delay t pgdly after t start , mon_ = v in_ 0.75 ms output voltage monitors (mon1, mon2) overvoltage 657 687 707 mon_ trip threshold v mon undervoltage 513 543 563 mv mon_ glitch filter 20 ? mon_ input bias current v mon_ = 600mv 0.03 ? undervoltage lockout (uvlo) startup is initiated when this threshold is reached by v in1 or v in2 , v on _ > 0.875v 2.10 2.4 2.67 v uvlo threshold v uvlo hysteresis 100 mv uvlo glitch filter reset time v in_ toggled below uvlo to unlatch after a fault 100 ? uvlo to startup delay t d , uvlo v in_ step from 0 to 2.8v 20 37.5 66 ms shutdown latch/restart autoretry delay t retry delay time to restart after fault shutdown 64 x t start ms note 1: all devices are 100% tested at t a = +25? and t a = +85?. limits at t a = 0? and -40? are guaranteed by design. note 2: the max5955/max5956 slow-comparator threshold is adjustable. v sc,th = r lim ? 0.25? + 25mv (see the typical operating characteristics ). note 3: the current-limit slow-comparator response time is weighted against the amount of overcurrent; the higher the overcurrent condition, the faster the response time (see the typical operating characteristics) . note 4: the startup period (t start ) is the time during which the slow comparator is ignored and the device acts as a current-limiter by regulating the sense current with the fast comparator (see the startup period section). note 5: the current available at gate is a function of v gate (see the typical operating characteristics ).
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control 4 _______________________________________________________________________________________ 0 0.6 0.4 0.2 1.0 0.8 1.8 1.6 1.4 1.2 2.0 02468101214 supply current vs. supply voltage max5955/56 toc01 v inx (v) i in (ma) v iny = v on1 = v on2 = 2.7v i inx + i iny i inx i iny 0 0.6 0.4 0.2 1.0 0.8 1.8 1.6 1.4 1.2 2.0 02468101214 total supply current vs. supply voltage max5955/56 toc02 v inx (v) i in (ma) v iny = 5.0v a) v on1 = v on2 = 3.3v b) v on1 = v on2 = 1.5v c) v on1 = v on2 = 0 a c b 0 0.6 0.4 0.2 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -40 10 -15 35 60 85 supply current vs. temperature max5955/56 toc03 temperature ( c) i in (ma) v on1 = v in1 v on2 = v in2 i in1 + i in2 i in2 i in1 0 2 1 4 3 5 6 068 24 10 12 14 gate-drive voltage vs. input voltage max5955/56 toc04 v inx (v) gate-drive voltage (v) v iny = 2.7v 0 60 40 20 80 100 120 140 160 180 200 020 gate charge current vs. gate voltage max5955/56 toc05 v gatex (v) gate charge current ( a) 51015 v iny = 2.7v v inx = 13.2v v inx = 5v v inx = 1v 0 60 40 20 80 100 120 140 160 180 200 -40 10 -15 35 60 85 gate charge current vs. temperature max5955/56 toc06 temperature ( c) gate charge current ( a) v inx = 13.2v v inx = 5v v inx = 1v v iny = 2.7v v gatex = 0 0 2 1 4 3 5 6 010 51520 gate strong discharge current vs. gate voltage max5955/56 toc07 v gatex (v) gate discharge current (ma) v inx = 13.2v v inx = 5v v inx = 1v v on1 = v on2 = 0 v iny = 2.7v v gatex = v inx + 6.2v 0 2 1 4 3 5 6 -40 10 -15 35 60 85 gate strong discharge current vs. temperature max5955/56 toc08 temperature ( c) gate discharge current (ma) v inx = 13.2v v inx = 5v v inx = 1v v on1 = v on2 = 0 v iny = 2.7v v gatex = v inx + 6.2v 0.0001 0.001 0.1 0.01 1 10 05075 25 100 125 150 175 200 turn-off time vs. sense voltage max5955/56 toc09 v in - v sense (mv) turn-off time (ms) slow-comp. threshold fast-comp. threshold t ypical operating characteristics (typical operating circuits, q1 = q2 = fairchild fdb7090l, v in1 = +5v, v in2 = +3.3v, v on1 = v on2 = +2.7v, t a = +25?, unless otherwise noted. channels 1 and 2 are identical in performance. where characteristics are interchangeable, channels 1 and 2 are referred to as x and y.)
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control _______________________________________________________________________________________ 5 0.1 1 10 20 30 35 25 40 45 50 55 60 65 70 75 80 turn-off time vs. sense voltage (expanded scale) max5955/56 toc10 v in - v sense (mv) turn-off time (ms) slow-comp. threshold 0 40 20 80 60 100 120 0 200 100 300 400 slow-comparator threshold vs. r lim max5955/56 toc11 r lim (k ? ) v sc,th (mv) 0 20 10 40 30 50 60 startup period vs. r tim max5955/56 toc12 r tim (k ? ) t start (ms) 0 200 300 100 400 500 600 0 0 0 v pgood 5v/div v sense - v in 100mv/div v gate 5v/div turn-off time slow-comparator fault max5955/56 toc13 1ms/div v in = 5.0v t scd 26mv step 0 0 0 v pgood 5v/div v sense - v in 100mv/div v gate 5v/div turn-off time fast-comparator fault max5955/56 toc14 400ns/div v in = 5.0v t fcd 125mv step v on 2v/div v pgood 2v/div i out 5a/div v out 5v/div v gate 5v/div startup waveforms fast turn-on max5955/56 toc15 1ms/div v in = 5.0v, r sense = 10m ? , r tim = 27k ? , c board = 1000 f v on 2v/div v pgood 2v/div i out 5a/div v out 5v/div v gate 5v/div startup waveforms slow turn-on max5955/56 toc16 1ms/div v in = 5.0v, r sense = 10m ? , r tim = 47k ? , c board = 1000 f, c gate = 22nf i out 5a/div v out 5v/div v gate 5v/div autoretry delay max5955/56 toc17 40ms/div v in = 5.0v, r sense = 10m ? , r tim = 47k ? , c board = 1000 f, r board = 1.4 ? t ypical operating characteristics (continued) (typical operating circuits, q1 = q2 = fairchild fdb7090l, v in1 = +5v, v in2 = +3.3v, v on1 = v on2 = +2.7v, t a = +25?, unless otherwise noted. channels 1 and 2 are identical in performance. where characteristics are interchangeable, channels 1 and 2 are referred to as x and y.)
max5955/max5956 detailed description the max5955 and max5956 are circuit breaker ics for hot-swap applications where a line card is inserted into a live backplane. the max5955 and max5956 operate down to 1v provided one of the inputs is above 2.7v. normally, when a line card is plugged into a live back- plane, the card? discharged filter capacitors provide low impedance that can momentarily cause the main power supply to collapse. the max5955 and max5956 reside either on the backplane or on the removable card to provide inrush current limiting and short-circuit protection. this is achieved by using external n-chan- nel mosfets, external current-sense resistors, and two on-chip comparators. the startup period and current- limit threshold of the max5955/max5956 can be adjusted with external resistors. figure 1 shows the max5955/max5956 functional diagram. the max5955/max5956 pull both pgoods low and both external fets off for an overcurrent condition. the max5955 also pulls both pgoods low and both external fets off (protection) for an undervoltage/overvoltage fault, whereas, the max5956 only pulls the corre- sponding fault channel? pgood_ low (monitoring). when the overvoltage/undervoltage fault disappears on the max5956, the corresponding pgood_ automatically goes high impedance. low-voltage, dual hot-swap controllers with independent on/off control 6 _______________________________________________________________________________________ pin description pin name function 1 pgood1 channel 1 status output (open drain, see the absolute maximum ratings ). pgood1 asserts high when hot swap is successful and channel 1 is within regulation. pgood1 asserts low during startup, when on1 is low, when channel 1 is off, or when channel 1 has any fault condition. 2 tim startup timer setting. connect a resistor from tim to gnd to set the startup period. leave tim unconnected for the default startup period of 9ms. 3 in1 channel 1 supply input. connect to a supply voltage of 1v to 13.2v. 4 sense1 channel 1 current-sense input. connect r sense1 from in1 to sense1. connect to in1 to disable circuit breaker function of channel 1. 5 gate1 channel 1 gate-drive output. connect to the gate of an external n-channel mosfet. 6 gnd ground 7 lim1 channel 1 current-limit setting. connect a resistor from lim1 to gnd to set the current trip level. connect to gnd for the default 25mv threshold (see the slow-comparator threshold, r lim section). 8 mon1 channel 1 output-voltage monitor. window comparator input. connect through a resistive divider from out1 to gnd to set the channel 1 overvoltage and undervoltage threshold. connect to in1 to disable. 9 mon2 channel 2 output-voltage monitor. window comparator input. connect through a resistive divider from out2 to gnd to set the channel 2 overvoltage and undervoltage threshold. connect to in2 to disable. 10 lim2 channel 2 current-limit setting. connect a resistor from lim2 to gnd to set the current trip level. connect to gnd for the default 25mv threshold (see the slow-comparator threshold, r lim section). 11 on1 channel 1 on/off control input. channel 1 is turned on when v on1 > 0.875v. 12 gate2 channel 2 gate-drive output. connect to the gate of an external n-channel mosfet. 13 sense2 channel 2 current-sense input. connect r sense2 from in2 to sense2. connect to in2 to disable circuit- breaker function of channel 2. 14 in2 channel 2 supply input. connect to a supply voltage of 1v to 13.2v. 15 on2 channel 2 on/off control input. channel 2 is turned on when v on2 > 0.875v. 16 pgood2 channel 2 status output (open drain, see the absolute maximum ratings ). pgood2 asserts high when hot swap is successful and channel 2 is within regulation. pgood2 asserts low during startup, when v on2 is low, when channel 2 is off, or when channel 2 has any fault condition.
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control _______________________________________________________________________________________ 7 uvlo f ast comp. slow comp. f ast discharge q1 out1 2.4v 2.4v bias and references timing oscillator startup oscillator to startup logic blocks charge pump device control logic v sc, th v fs, th r lim1 sense1 in1 gate1 r sense1 lim1 r lim2 n 3ma 687mv 543mv mon1 on1 on2 pgood2 pgood1 uvlo f ast comp. slow comp. f ast discharge q2 out2 charge-pump oscillator to startup logic blocks charge pump current control and startup logic current control and startup logic v sc, th v fs, th sense2 in2 gate2 r sense2 lim2 100 a 3ma 687mv 543mv mon2 max5955 max5956 0.875v r tim tim figure 1. functional diagram
max5955/max5956 startup period r tim sets the duration of the startup period from 0.45s to 50ms (see the setting the startup period, rtim sec- tion). the default startup period is fixed at 9ms when tim is floating. the startup period begins after the fol- lowing three conditions are met: 1) v in1 or v in2 exceeds the uvlo threshold (2.4v) for the uvlo to startup delay (37.5ms). 2) v on1 and v on2 exceed the on threshold (0.875v). 3) the device is not latched or in its autoretry delay (see the latched and autoretry overcurrent fault management section). the max5955/max5956 limit the load current if an overcurrent fault occurs during startup instead of com- pletely turning off the external mosfets. the slow comparator is disabled during the startup period and the load current can be limited in two ways: 1) slowly enhancing the mosfets by limiting the mosfet gate-charging current. 2) limiting the voltage across the external current- sense resistor. during the startup period the gate-drive current is limit- ed to 100? and decreases with the increase of the gate voltage (see the typical operating characteris- tics ). this allows the controller to slowly enhance the mosfets. if the fast comparator detects an overcur- rent, the max5955/max5956 regulate the gate voltage to ensure that the voltage across the sense resistor does not exceed v su,th . this effectively regulates the inrush current during startup. figure 2 shows the start- up waveforms. pgood_ goes high impedance 0.75ms after the startup period if no fault condition is present. variablespeed/bilevel fault protection variablespeed/bilevel fault protection incorporates two comparators with different thresholds and response times to monitor the load current (figure 3). during the startup period, protection is provided by limiting the load current. protection is provided in normal operation (after the startup period has expired) by discharging both mosfet gates with a strong 3ma pulldown cur- rent in response to a fault condition. after a fault, pgood_ is pulled low, the max5955b and max5956b stay latched off and the max5955a and max5956a automatically restart. slow-comparator startup period the slow comparator is disabled during the startup period while the external mosfets are turning on. disabling the slow comparator allows the device to ignore the higher-than-normal inrush current charging the board capacitors when a card is first plugged into a live backplane. low-voltage, dual hot-swap controllers with independent on/off control 8 _______________________________________________________________________________________ t on 4.3v to 5.8v v gate v gate pgood on v th v out v out i load t start + t pgdly c board = large c board = 0 v su,th r sense figure 2. startup waveform sense voltage (v in - v sense ) turn-off time v sc,th v fc,th (4 x v sc,th ) 3ms 110 s 260ns slow comparator fast comparator figure 3. variablespeed/bilevel response
slow-comparator normal operation after the startup period is complete, the slow compara- tor is enabled and the device enters normal operation. the comparator threshold voltage (v sc,th ) is adjustable from 25mv to 100mv. the slow-comparator response time decreases to a minimum of 100? with a large overdrive voltage. response time is 3ms for a 1mv over- drive. the variable speed response time allows the max5955/max5956 to ignore low-amplitude momentary glitches, thus increasing system noise immunity. after an extended overcurrent condition, a fault is generated, both pgoods are pulled low and the mosfet gates are discharged with a strong 3ma pulldown current. fast-comparator startup period during the startup period, the fast comparator regulates the gate voltage to ensure that the voltage across the sense resistor does not exceed the startup fast-com- parator threshold voltage (v su,th ), v su,th is scaled to two times the slow-comparator threshold (v sc,th ). fast-comparator normal operation in normal operation, if the load current reaches the fast- comparator threshold, a fault is generated, both pgoods are pulled low, and the mosfet gates are dis- charged with a strong 3ma pulldown current. this hap- pens in the event of a serious current overload or a dead short. the fast-comparator threshold voltage (v fc,th ) is scaled to four times the slow-comparator threshold (v sc,th ). this comparator has a fast response time of 260ns (figure 3). undervoltage lockout (uvlo) the uvlo prevents the max5955/max5956 from turning on the external mosfets until one input voltage exceeds the uvlo threshold (2.4v) for t d,uvlo . the max5955/ max5956 use power from the higher input voltage rail for the charge pumps. this allows for more efficient charge- pump operation. the uvlo protects the external mosfets from an insufficient gate-drive voltage. t d,uvlo ensures that the board is fully inserted into the backplane and that the input voltages are stable. any input voltage transient on both supplies below the uvlo threshold reinitiates the t d,uvlo and the startup period. latched and autoretry overcurrent fault management the max5955b/max5956b latch the external mosfets off when an overcurrent fault is detected. toggling on_ below 0.875v or one of the supply voltages below/above the uvlo threshold for at least 100? clears the fault latch and reinitiates the startup period. similarly, the max5955a/max5956a turn the external mosfets off when an overcurrent fault is detected, then automatically restart after the autoretry delay that is internally set to 64 times t start . during the autoretry delay, toggling on_ below 0.875v does not clear the fault latch. the autoretry can be overridden, causing the startup period to begin immediately by toggling one of the supply voltages below/above the uvlo thresh- old. when toggling a supply voltage to clear a fault, remember that the supply voltage must go below and then above the uvlo threshold for at least 100? regardless of the final value of the supply voltage. output overvoltage/undervoltage fault management the max5955/max5956 monitor the output voltages with the mon1 and mon2 window comparator inputs. these voltage monitors are enabled after the startup period. once enabled, the voltage monitor detects a fault if v mon _ is less than 543mv or greater than 687mv. when the max5955 protection device detects an output overvoltage/undervoltage fault on either mon1 or mon2, both external mosfet gates are discharged at 3ma and both pgoods pull low. for the max5955a, the part continuously attempts to restart after each autoretry period. the part successfully restarts after the fault is removed and after waiting the autoretry period. for the max5955b, the gates are latched off until the output voltage fault is removed and the fault latch is cleared by toggling on_ or by cycling one of the supply voltages above/below the uvlo threshold. when the max5956 monitoring device detects an out- put overvoltage/undervoltage fault on either mon1 or mon2, neither external mosfet gates are affected, but the pgood_ of the channel experiencing the fault pulls low. thus the fault is reported on the channel with the problem, but the max5956 does not allow an output overvoltage/undervoltage fault to disrupt operation by shutting down the channels. the max5956? pgood_ output immediately goes high impedance after the out- put overvoltage/undervoltage fault is removed. the voltage monitors do not react to output glitches of less than 20?. a capacitor from mon_ to gnd increas- es the effective glitch filter time. the voltage monitoring function of the max5955/max5956 can be disabled by connecting v in1 to mon1 and v in2 to mon2. status outputs (pgood_) the status output is an open-drain output that pulls low in response to one of the following conditions: overcurrent fault output undervoltage/overvoltage fault pgood_ goes low when the corresponding channel is forced off (on_ < 0.875v) (table 1). max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control _______________________________________________________________________________________ 9
max5955/max5956 applications information component selection n-channel mosfet select the external mosfets according to the applica- tion? current levels. table 2 lists some recommended components. the mosfet? on-resistance (r ds(on) ) should be chosen low enough to have a minimum volt- age drop at full load to limit the mosfet power dissi- pation. high r ds(on) causes output ripple if there is a pulsating load. determine the device power rating to accommodate a short-circuit condition on the board at startup and when the device is in automatic-retry mode (see the mosfet thermal considerations section). using the max5955b/max5956b in latched mode allows the use of mosfets with lower power ratings. a mosfet typically withstands single-shot pulses with higher dissi- pation than the specified package rating. table 3 lists some recommended manufacturers and components. sense resistor the slow-comparator threshold voltage is adjustable from 25mv to 100mv. select a sense resistor that causes a drop equal to the slow-comparator threshold voltage at a current level above the maximum normal operating current. typically, set the overload current at 1.2 to 1.5 times the full load current. the fast-comparator threshold is four times the slow-comparator threshold in normal operating mode. choose the sense-resistor power rating to be greater than (i overload ) 2 x v sc,th . slow-comparator threshold, r lim the slow-comparator threshold voltage is adjustable from 25mv to 100mv, allowing designers to fine-tune the current-limit threshold for use with standard-value sense resistors. low slow-comparator thresholds allow for increased efficiency by reducing the power dissi- pated by the sense resistor. furthermore, the low 25mv slow-comparator threshold is beneficial when operating with supply rails down to 1v because it allows a small percentage of the overall output voltage to be used for current sensing. the variablespeed/bilevel fault pro- tection feature offers inherent system immunity against load transients and noise. this allows the slow-com- parator threshold to be set close to the maximum nor- mal operating level without experiencing nuisance faults. to adjust the slow-comparator threshold, calcu- late r lim as follows: where v th is the desired slow-comparator threshold voltage. r vmv a lim th = ? 25 025 . low-voltage, dual hot-swap controllers with independent on/off control 10 ______________________________________________________________________________________ part overcurrent fault (v out1 ) overcurrent fault (v out2 ) over/under- voltage fault (v out1 ) over/under- voltage fault (v out2 ) pgood1/ pgood2 gate1/ gate2 yes x x x low/low off/off x yes x x low/low off/off xx yes x low/low off/off max5955 uv/ov protection xx x yes low/low off/off yes x x x low/low off/off x yes x x low/low off/off xx yes no low/high on/on max5956 uv/ov monitor xx no yes high/low on/on table 1. status output truth table part number manufacturer description irf7413 11m ? , 8 so, 30v irf7401 22m ? , 8 so, 20v irl3502s international rectifier 6m ? , d2pak, 20v mmsf3300 20m ? , 8 so, 30v mmsf5n02h 30m ? , 8 so, 20v mtb60n05h motorola 14m ? , d 2 pak, 50v fds6670a 10m ? , 8 so, 30v nds8426a 13.5m ? , 8 so, 20v fdb8030l fairchild 4.5m ? , d 2 pak, 30v table 2. recommended n-channel mosfets
setting the startup period, r tim the startup period (t start ) is adjustable from 0.45ms to 50ms. the adjustable startup period feature allows sys- tems to be customized for mosfet gate capacitance and board capacitance (c board ). the startup period is adjusted with the resistance connected from tim to gnd (r tim ). r tim must be between 4k ? and 500k ? . the startup period has a default value of 9ms when tim is left floating. calculate r tim with the following equation: where t start is the desired startup period. startup sequence there are two ways of completing the startup sequence. case a describes a startup sequence that slowly turns on the mosfets by limiting the gate charge. case b uses the current-limiting feature and turns on the mosfets as fast as possible while still preventing a high inrush current. the output voltage ramp-up time (t on ) is determined by the longer of the two timings, case a and case b. set the startup timer t start to be longer than t on to guarantee enough time for the output voltage to settle. case a: slow turn-on (without current limit) there are two ways to turn on the mosfets without reaching the fast-comparator current limit: if the board capacitance (c board ) is small, the inrush current is low. if the gate capacitance is high, the mosfets turn on slowly. in both cases, the turn-on time is determined only by the charge required to enhance the mosfet. the small gate-charging current of 100? effectively limits the out- put voltage dv/dt. connecting an external capacitor between gate and gnd extends turn-on time. the time required to charge/discharge a mosfet is as follows: where: c gate is the external gate to ground capacitance (figure 4). ? v gate is the change in gate voltage. q gate is the mosfet total gate charge. i gate is the gate-charging/discharging current. in this case, the inrush current depends on the mosfet gate-to-drain capacitance (c rss ) plus any additional capacitance from gate to gnd (c gate ), and on any load current (i load ) present during the startup period. example: charging and discharging times using the fairchild fdb7030l mosfet if v in1 = 5v then gate1 charges up to 10.4v (v in1 + v drive ); therefore ? v gate = 10.4v. the manufacturer? data sheet specifies that the fdb7030l has approxi- mately 60nc of gate charge and c rss = 600pf. the max5955/max5956 have a 100? gate-charging cur- rent and a 3ma strong discharging current. i c cc ii inrush board rss gate gate load = + + t cvq i gate gate gate gate = ? + r t pf tim start = 128 800 max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control ______________________________________________________________________________________ 11 component manufacturer phone website dale-vishay 402-564-3131 www.vishay.com sense resistors irc 704-264-8861 www.irctt.com fairchild 888-522-5372 www.fairchildsemi.com international rectifier 310-233-3331 www.irf.com mosfets motorola 602-244-3576 www.mot-sps.com/ppd table 3. component manufacturers gate sense gnd on_ * * required components. see the on_ comparators section. r sense v out c gate c board v in in_ r pullup pgood_ max5955 max5956 0.1 f figure 4. operating with an external gate capacitor
max5955/max5956 c board = 6? and the load does not draw any current during the startup period. with no gate capacitor the inrush current, charge, and discharge times are: with a 22nf gate capacitor the inrush current, charge, and discharge times are: case b: fast turn-on (with current limit) in applications where the board capacitance (c board ) is high, the inrush current causes a voltage drop across r sense that exceeds the startup fast-comparator threshold. the fast comparator regulates the voltage across the sense resistor to v su,th . this effectively regulates the inrush current during startup. in this case, the current charging c board can be considered con- stant and the turn-on time is: the maximum inrush current in this case is: figure 2 shows the waveforms and timing diagrams for a startup transient with current regulation (see typical operating characteristics ) . when operating under this condition, an external gate capacitor is not required. on_ comparators the on_ comparators control the on/off function of the max5955/max5956. on_ allows independent control over channel 1 and channel 2. drive on1 and on2 high (> 0.875v) to enable channel 1 and channel 2, respectively. pull on_ low (< 0.875v) to disable the respective channel. an rc time delay must be added to the on_ inputs with delay set to at least 20?. this allows the internal cicuits to stablilize after application of a steeply rising v in_ . using the max5955/max5956 on the backplane using the max5955/max5956 on the backplane allows multiple cards with different input capacitance to be inserted into the same slot even if the card does not have on-board hot-swap protection. the startup period can be triggered if in_ is connected to on_ through a trace on the card (figure 5). input transients the voltage at in1 or in2 must be above the uvlo dur- ing inrush and fault conditions. when a short-circuit con- dition occurs on the board, the fast comparator trips causing the external mosfet gates to be discharged at 3ma. the main system power supply must be able to sustain a temporary fault current, without dropping below the uvlo threshold of 2.4v, until the external mosfet is completely off. if the main system power supply collapses below uvlo, the max5955/max5956 force the device to restart once the supply has recovered. the mosfet is turned off in a very short time resulting in a high di/dt. the backplane delivering the power to the external card must have low inductance to minimize voltage transients caused by this high di/dt. mosfet thermal considerations during normal operation, the external mosfets dissi- pate little power. the mosfet r ds(on) is low when the mosfet is fully enhanced. the power dissipated in normal operation is p d = i load 2 x r ds(on) . the most power dissipation occurs during the turn-on and turn- off transients when the mosfets are in their linear regions. take into consideration the worst-case sce- nario of a continuous short-circuit fault, consider these two cases: 1) the single turn-on with the device latched after a fault (max5955b/max5956b) 2) the continuous automatic retry after a fault (max5955a/max5956a) mosfet manufacturers typically include the package thermal resistance from junction to ambient (r ja ) and thermal resistance from junction to case (r jc ), which determine the startup time and the retry duty cycle (d = t start /t start + t retry ). calculate the required transient thermal resistance with the following equation: where i start = v su,th / r sense z tt vi ja max jmax a in start () ? i v r inrush su th sense = , t cvr v on board in sense su th = , i f pf nf ama t nf v nc a ms t nf v nc ma ms inrush charge discharge = + += = + = = + = 6 600 22 100 0 26 5 22 10 4 60 100 289 22 10 4 60 3 0 096 . . . . . i f pf aa t vnc a ms t vnc ma ms inrush charge discharge = + += = + = = + = 6 600 0 100 0 1 0104 60 100 06 0104 60 3 002 . . . . low-voltage, dual hot-swap controllers with independent on/off control 12 ______________________________________________________________________________________
layout considerations to take full advantage of the switch response time to an output fault condition, it is important to keep all traces as short as possible and to maximize the high-current trace dimensions to reduce the effect of undesirable parasitic resistance and inductance. place the max5955/ max5956 close to the card? connector, and a 0.01? capacitor to gnd should be placed as close as possible to each v in pin. use a ground plane to minimize imped- ance and inductance. minimize the current-sense resis- tor trace length (< 10mm), and ensure accurate current sensing with kelvin connections (figure 6). when the output is short circuited, the voltage drop across the external mosfet becomes large. hence, the power dissipation across the switch increases, as does the die temperature. an efficient way to achieve good power dissipation on a surface-mount package is to lay out two copper pads directly under the mosfet package on both sides of the board. connect the two pads to the ground plane through vias, and use enlarged copper mounting pads on the top side of the board (refer to the max5956 ev kit data sheet). max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control ______________________________________________________________________________________ 13 part output undervoltage/overvoltage protection/monitor fault management max5955aeee protection autoretry max5955auee protection autoretry max5955beee protection latched max5955buee protection latched max5956aeee monitor autoretry max5956auee monitor autoretry max5956beee monitor latched max5956buee monitor latched selector guide on_ * * * in_ gate_ v in v out sense_ max5955 max5956 c board backplane removable card with no hot-insertion protection * required components. see the on_ comparators section. 0.1 f figure 5. using the max5955/max5956 on a backplane sense resistor high-current path max5955 max5956 figure 6. kelvin connection for the current-sense resistors
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control 14 ______________________________________________________________________________________ max5955 max5956 v in1 on1 on2 pgood1 pgood2 v in2 gnd on1 * * on2 pgood1 pgood2 gnd in1 0.1 f sense1 gate1 in2 sense2 gate2 lim2 * lim1 * tim * * * * * mon1 mon2 v out1 v out2 c board2 c board1 q1 q2 *optional * * 0.1 f * required components. see the on_ comparators section. t ypical operating circuit chip information transistor count: 3542 process: bicmos ordering information (continued) part temp range pin-package max5956 aeee -40? to +85? 16 qsop max5956aeee+ -40? to +85? 16 qsop max5956auee 0? to +85? 16 qsop max5956auee+ 0? to +85? 16 qsop max5956beee -40? to +85? 16 qsop max5956beee+ -40? to +85? 16 qsop max5956buee 0? to +85? 16 qsop max5956buee+ 0? to +85? 16 qsop + denotes lead-free package.
max5955/max5956 low-voltage, dual hot-swap controllers with independent on/off control maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 15 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. quijano package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qsop.eps e 1 1 21-0055 package outline, qsop .150", .025" lead pitch
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs m axim > p roduc ts > h ot-swap and p ower switc hing max5955, max5956 low-voltage, dual hot-swap c ontrollers with independent on/off c ontrol quickview technical documents ordering info more information all ordering information notes: other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 1. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 2. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 3. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 4. devices: 1-32 of 32 m ax5955 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max5955aeee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5955beee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5955beee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5955beee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5955beee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5955aeee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5955aeee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5955aeee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5955auee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5955auee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis max5955buee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis max5955buee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5955buee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis
max5955auee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis max5955auee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5955buee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis m ax5956 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max5956aeee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5956beee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5956beee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5956beee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5956beee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5956aeee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * -40c to +85c rohs/lead-free: no materials analysis max5956aeee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5956aeee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * -40c to +85c rohs/lead-free: lead free materials analysis max5956auee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis max5956auee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5956buee+t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5956buee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5956buee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis max5956auee+ qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16+1 * 0c to +85c rohs/lead-free: lead free materials analysis max5956auee qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis max5956buee-t qsop;16 pin;31 mm dwg: 21-0055g (pdf) use pkgcode/variation: e16-1 * 0c to +85c rohs/lead-free: no materials analysis didn't find what you need? next day product selection assistance from applications engineers parametric search applications help
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