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  r09ds0014ej0100 rev.1.00 page 1 of 13 feb 22, 2011 preliminary data sheet pd5753t7g sige/cmos integrated circuit 4 2 if switch matrix with tone/voltage controller features ? 4 independent if channels, integral switching to channel input to either channel output ? 4 2 switch matrix with integrated switch control - tone/voltage - switch?s enable/disable function is linked with pola input voltage level ? switch?s enable condition : v pola > 9.5 v ? frequency range : f = 250 mhz to 2150 mhz ? high isolation : isl d/u = 33 db typ. @worst mode ? insertion loss : l ins = 7 db typ. @ z s = z l = 50 ? insertion loss flatness : l ins = 1.0 db typ. ? 20-pin 4 4 mm square micro lead package ( 20-pin plastic qfn (0.5 mm pitch)) applications ? dbs if switching ? multiswitch, switch box ? 4 2 switching application for microwave signal ordering information part number order number package marking supplying form pd5753t7g-e1 pd5753t7g-e1-a 20-pin plastic qfn (0.5 mm pitch) (pb-free) d5753 ? embossed tape 12 mm wide ? pin 6 to 10 face the perforation side of the tape ? qty 5 kpcs/reel ? dry packing specification (msl 3 equivalent) remark to order evaluation samples, please contact your nearby sales office. part number for sample order: pd5753t7g caution observe precautions when handling because these devi ces are sensitive to electrostatic discharge. r09ds0014ej0100 rev.1.00 feb 22, 2011
pd5753t7g r09ds0014ej0100 rev.1.00 page 2 of 13 feb 22, 2011 absolute maximum ratings (t a = +25 c, unless otherwise specified) parameter symbol ratings unit supply voltage v dd +4.0 v logic mode control voltage (mo and m1) v mo , v m1 +4.0 v power dissipation note p d 325 mw storage temperature t stg ? 55 to +125 c operating ambient temperature t a ? 40 to +85 c input power p in +15 dbm pola control input voltage (pola1 and pola2) v pola +25 v tone signal input voltage v tone 1 v p-p note: mounted on double-sided copper-clad 50 50 0.51 mm laminates pwb, t a = +85 c recommended operating range (t a = +25 c, unless otherwise specified) parameter symbol min. typ. max. unit supply voltage v dd +3.0 +3.3 +3.6 v operating ambient temperature t a ? 40 +25 +85 c pola control input voltage v pola 0 ? 21 v tone signal frequency f tone 18 22 26 khz tone signal input voltage v tone 0.4 0.6 0.8 v p-p electrical characteristics (t a = +25 c, v dd = +3.3 v, z s = z l = 50 for each port, worst mode, unless otherwise specified) parameter symbol test conditi ons min. typ. max. unit supply current i dd non?rf, non control signal/voltage ? 1.9 3.0 ma insertion loss 1 l ins 1 p in = 0 dbm, f = 0.95 ghz ? 6.5 8.5 db insertion loss 2 l ins 2 p in = 0 dbm, f = 2.15 ghz ? 7.5 9.5 db isolation d/u ratio 2 note isl d/u 2 p in = 0 dbm, f = 2.15 ghz 28 33 ? db output return loss 1 rl out 1 p in = 0 dbm, f = 0.95 ghz 15 25 ? db output return loss 2 rl out 2 p in = 0 dbm, f = 2.15 ghz 10 13 ? db pola control threshold voltage, channel selection v th_pola off to on 14 14.75 15.5 v tone signal threshold voltage, channel selection v th_tone f tone = 22 khz, duty cycle = 50%, pulse wave, off to on 0.1 0.15 0.35 v p-p note: isolation d/u (d esire/u n-desire) ratio = ? (signal leakage (off-state)) ? (insertion loss (on-state)) ? at worst mode
pd5753t7g r09ds0014ej0100 rev.1.00 page 3 of 13 feb 22, 2011 standard characteristics for reference (t a = +25 c, v dd = +3.3 v, z s = z l = 50 for each port, worst mode, unless otherwise specified) parameter symbol test conditions reference value unit insertion loss flatness l ins |l ins 1-l ins 2| 1.0 db isolation d/u ratio 1 note isl d/u 1 p in = 0 dbm, f = 0.95 ghz 40 db input return loss 1 rl in 1 p in = 0 dbm, f = 0.95 ghz 20 db input return loss 2 rl in 2 p in = 0 dbm, f = 2.15 ghz 14 db pola control current i pola v pola = 21 v 230 a pola switching time t pola v pola = 18 v, off to on 0.75 s tone switching time t tone f tone = 22 khz, duty cycle = 50%, pulse wave, v tone = 600 mv p-p , off to on 220 s note: isolation d/u (d esire/u n-desire) ratio = ? (signal leakage (off-state)) ? (insertion loss (on-state)) ? at worst mode
pd5753t7g r09ds0014ej0100 rev.1.00 page 4 of 13 feb 22, 2011 pin connections (bottom view) (top view) d5753 pin 1 identifier 12345 6 7 8 9 10 15 14 13 12 11 20 19 18 17 16 gnd 20 19 18 17 16 54321 11 12 13 14 15 6 7 8 9 10 pin no. pin name pin no. pin name pin no. pin name pin no. pin name 1 tone1 6 in-b 11 gnd 16 out2 2 pola1 7 gnd 12 in-c 17 m1 3 gnd 8 gnd 13 gnd 18 v dd 4 in-a 9 gnd 14 pola2 19 m0 5 gnd 10 in-d 15 tone2 20 out1 remark heat sink (bottom side) : gnd
pd5753t7g r09ds0014ej0100 rev.1.00 page 5 of 13 feb 22, 2011 truth table switching control of out1 signal path switching cont rol of out2 signal path logic pattern select control pins for out1 out1 logic pattern select control pins for out2 out2 m0 m1 pola1 tone1 output signal m0 m1 pola2 tone2 output signal no voltage 22 khz none no voltage 22 khz none no voltage 0 none no voltage 0 none low 22 khz in-c low 22 khz in-c low 0 in-d low 0 in-d high 0 in-b high 0 in-b 0 0 high 22 khz in-a 0 0 high 22 khz in-a no voltage 22 khz none no voltage 22 khz none no voltage 0 none no voltage 0 none low 22 khz in-a low 22 khz in-a low 0 in-b low 0 in-b high 0 in-d high 0 in-d 1 1 high 22 khz in-c 1 1 high 22 khz in-c no voltage 22 khz none no voltage 22 khz none no voltage 0 none no voltage 0 none low 22 khz in-d low 22 khz in-d low 0 in-c low 0 in-c high 0 in-b high 0 in-b 0 1 high 22 khz in-a 0 1 high 22 khz in-a no voltage 22 khz none no voltage 22 khz none no voltage 0 none no voltage 0 none low 22 khz in-b low 22 khz in-b low 0 in-a low 0 in-a high 0 in-d high 0 in-d 1 0 high 22 khz in-c 1 0 high 22 khz in-c remarks m0, m1 : ?0? : 0 v dc (connected to gnd line) ?1? : v dd dc (connected to v dd line) v dd = + 3.3 v dc pola1, 2 : ?low? : 9.5 v to 14 v dc ?high? : 15.5 v to 19 v dc ?no voltage? : 0 v dc (< 5 v dc) or open switch?s enable/disable function is li nked with pola input voltage level switch?s enable condition : v pola > 9.5 v
pd5753t7g r09ds0014ej0100 rev.1.00 page 6 of 13 feb 22, 2011 functional diagram in-a gnd gnd pola1 tone1 out1 m0 v dd m1 out2 in-b gnd gnd gnd in-d in-c gnd gnd pola2 tone2 4 2 switch matrix 4 : 16 decoder switch controller enable1 enable2 1 5 6 10 11 15 16 20 (top view)
pd5753t7g r09ds0014ej0100 rev.1.00 page 7 of 13 feb 22, 2011 evaluation circuit gnd gnd m0 m1 gnd gnd gnd gnd gnd 4 2 switch matrix 4 : 16 decoder switch controller enable1 enable2 1 5 6 10 11 15 16 20 100 pf in-a rf input a 100 pf in-b rf input b 100 pf in-d rf input d 100 pf in-c rf input c 330 pf r = 0 k note pola1 pola control = 13 v/18 v tone1 10 000 pf (10 nf) tone control = 0/22 khz, 0.6 v p-p , pluse tone2 10 000 pf (10 nf) tone control = 0/22 khz, 0.6 v p-p , pluse 330 pf r = 0 k note pola2 pola control = 13 v/18 v v dd = +3.3 v 1 000 pf out2 100 pf output 2 out1 100 pf output 1 logic mode control = 0/1 (0 v dc / v dd dc) = connected to gnd line/v dd line logic mode control = 0/1 (0 v dc/v dd dc) = connected to gnd line/v dd line v dd note: r = 0 k (at pola control = 13 v/18 v) = 5.6 k (at pola control = 14 v/18 v) remarks heat sink (bottom side): gnd z s = z l = 50 switch?s enable/disable function is li nked with pola input voltage level switch?s enable condition : v pola > 9.5 v the application circuits and their parameters are for refere nce only and are not intended for use in actual design-ins.
pd5753t7g r09ds0014ej0100 rev.1.00 page 8 of 13 feb 22, 2011 typical characteristics (t a = +25 c, v dd = +3.3 v, p in = 0 dbm, z s = z l = 50 for each port, unless otherwise specified) ?5.0 ?5.5 ?6.0 ?6.5 ?7.0 ?7.5 ?8.0 ?8.5 ?9.0 ?9.5 ?10.0 0.0 0.5 1.0 1.5 2.0 2.5 insertion loss l ins (db) frequency f (ghz) insertion loss vs. frequency (in - x - out1) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - a - out1) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - c - out1) ?5.0 ?5.5 ?6.0 ?6.5 ?7.0 ?7.5 ?8.0 ?8.5 ?9.0 ?9.5 ?10.0 0.0 0.5 1.0 1.5 2.0 2.5 insertion loss l ins (db) frequency f (ghz) insertion loss vs. frequency (in - x - out2) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - b - out1) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - d - out1) remark the graphs indicate nominal characteristics.
pd5753t7g r09ds0014ej0100 rev.1.00 page 9 of 13 feb 22, 2011 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - a - out2) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - c - out2) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 0.0 0.5 1.0 1.5 2.0 2.5 output return loss rl out (db) frequency f (ghz) output return loss vs. frequency (in - x - out1) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 0.0 0.5 1.0 1.5 2.0 2.5 output return loss rl out (db) frequency f (ghz) output return loss vs. frequency (in - x - out2) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - b - out2) 0.0 ?10.0 ?20.0 ?30.0 ?40.0 ?50.0 ?60.0 ?70.0 ?80.0 ?90.0 0.0 0.5 1.0 1.5 2.0 2.5 isolation d/u ratio isl d/u (db) frequency f (ghz) isolation d/u ratio vs. frequency (in - d - out2) remark the graphs indicate nominal characteristics.
pd5753t7g r09ds0014ej0100 rev.1.00 page 10 of 13 feb 22, 2011 0.0 ?5.0 ?10.0 ?15.0 ?20.0 ?25.0 ?30.0 ?35.0 ?40.0 ?45.0 ?50.0 0.0 0.5 1.0 1.5 2.0 2.5 input return loss rl in (db) frequency f (ghz) input return loss vs. frequency (in - a - outx) 0.0 ?5.0 ?10.0 ?15.0 ?20.0 ?25.0 ?30.0 ?35.0 ?40.0 ?45.0 ?50.0 0.0 0.5 1.0 1.5 2.0 2.5 input return loss rl in (db) frequency f (ghz) input return loss vs. frequency (in - b - outx) 0.0 ?5.0 ?10.0 ?15.0 ?20.0 ?25.0 ?30.0 ?35.0 ?40.0 ?45.0 ?50.0 0.0 0.5 1.0 1.5 2.0 2.5 input return loss rl in (db) frequency f (ghz) input return loss vs. frequency (in - c - outx) 0.0 ?5.0 ?10.0 ?15.0 ?20.0 ?25.0 ?30.0 ?35.0 ?40.0 ?45.0 ?50.0 0.0 0.5 1.0 1.5 2.0 2.5 input return loss rl in (db) frequency f (ghz) input return loss vs. frequency (in - d - outx) remark the graphs indicate nominal characteristics.
pd5753t7g r09ds0014ej0100 rev.1.00 page 11 of 13 feb 22, 2011 mounting pad layout dimensions 20-pin 4 4 mm square micro lead package (20-pin plastic qfn (0.5 mm pitch)) (unit: mm) 2.15 2.15 1.65 1.65 1.35 1.35 0.5 20-0.2 2.15 2.15 1.65 1.65 1.35 1.35 remark the mounting pad layout in this document is for reference only.
pd5753t7g r09ds0014ej0100 rev.1.00 page 12 of 13 feb 22, 2011 package dimensions 20-pin 4 4 mm square micro lead package (20-pin plastic qfn (0.5 mm pitch)) (unit: mm) (bottom view) 2.70.1 0.50.1 2.70.1 40.1 40.1 0.350.075 pin 1 1.72 0.15 0.08 min. a a 1.72 0.15 (top view) (side view) remark a>0 0.57 +0.03 ?0.05 0.2 +0.07 ?0.05
pd5753t7g r09ds0014ej0100 rev.1.00 page 13 of 13 feb 22, 2011 recommended soldering conditions this product should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than those recommended below, contact your nearby sales office. soldering method soldering conditions condition symbol infrared reflow peak temperature (package surface temperature) : 260 c or below time at peak temperature : 10 seconds or less time at temperature of 220 c or higher : 60 seconds or less preheating time at 120 to 180 c : 120 30 seconds maximum number of reflow processes : 3 times maximum chlorine content of rosin flux (% mass) : 0.2%(wt.) or below ir260 partial heating peak temperature (package surface temperature) : 350 c or below soldering time (per side of device) : 3 seconds or less maximum chlorine content of rosin flux (% mass) : 0.2%(wt.) or below hs350 caution do not use different soldering methods together (except for partial heating).
all trademarks and registered trademarks are t he property of their respective owners. c - 1 revision history pd5753t7g data sheet description rev. date page summary 1.00 feb 22, 2011 ? first edition issued
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