s o t -2 2 7 isotop ? file # e145592 "ul recognized" g s s d n-channel mosfet absolute maximum ratings thermal and mechanical characteristics g d s single die mosfet unit a v mj a unit w c/w c v oz g inlbf nm ratings 58 37 270 30 1845 42 min typ max 540 0.23 0.15 -55 150 2500 1.03 29.2 10 1.1 parameter continuous drain current @ t c = 25c continuous drain current @ t c = 100c pulsed drain current 1 gate-source voltage single pulse avalanche energy 2 avalanche current, repetitive or non-repetitive characteristic total power dissipation @ t c = 25c junction to case thermal resistance case to sink thermal resistance, flat, greased surface operating and storage junction temperature range rms voltage (50-60hhz sinusoidal waveform from terminals to mounting base for 1 min.) package weight terminals and mounting screws. symbol i d i dm v gs e as i ar symbol p d r jc r cs t j ,t stg v isolation w t torque typical applications ? pfc and other boost converter ? buck converter ? two switch forward (asymmetrical bridge) ? single switch forward ? flyback ? inverters features ? fast switching with low emi/rfi ? low r ds(on) ? ultra low c rss for improved noise immunity ? low gate charge ? avalanche energy rated ? rohs compliant apt58m50j 500v, 58a, 0.065 max apt58m50j power mos 8 ? is a high speed, high voltage n-channel switch-mode power mosfet. a proprietary planar stripe design yields excellent reliability and manufacturability. low switching loss is achieved with low input capacitance and ultra low c rss "miller" capaci- tance. the intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low emi and reliable paralleling, even when switching at very high frequency. reliability in ? yback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. microsemi website - http://www.microsemi.com 050-8096 rev c 5-2009
static characteristics t j = 25c unless otherwise speci? ed source-drain diode characteristics dynamic characteristics t j = 25c unless otherwise speci? ed 1 repetitive rating: pulse width and case temperature limited by maximum junction temperature. 2 starting at t j = 25c, l = 2.08mh, r g = 2.2 , i as = 42a. 3 pulse test: pulse width < 380s, duty cycle < 2%. 4 c o(cr) is de? ned as a ? xed capacitance with the same stored charge as c oss with v ds = 67% of v (br)dss . 5 c o(er) is de? ned as a ? xed capacitance with the same stored energy as c oss with v ds = 67% of v (br)dss . to calculate c o(er) for any value of v ds less than v (br)dss, use this equation: c o(er) = -3.14e-7/v ds ^2 + 7.31e-8/v ds + 2.09e-10. 6 r g is external gate resistance, not including internal gate resistance or gate driver impedance. (mic4452) microsemi reserves the right to change, without notice, the speci? cations and information contained herein. g d s unit v v/c v mv/c a na unit a v ns c v/ns unit s pf nc ns min typ max 500 0.60 0.055 0.065 3 4 5 -10 100 500 100 min typ max 58 270 1.0 720 20 8 min typ max 65 13500 185 1455 845 425 340 75 155 60 70 155 50 test conditions v gs = 0v , i d = 250a reference to 25c, i d = 250a v gs = 10v , i d = 42a v gs = v ds , i d = 2.5ma v ds = 500v t j = 25c v gs = 0v t j = 125c v gs = 30v test conditions mosfet symbol showing the integral reverse p-n junction diode (body diode) i sd = 42a , t j = 25c, v gs = 0v i sd = 42a 3 di sd / dt = 100a/s, t j = 25c i sd 42a, di/dt 1000a/s, v dd = 100v, t j = 125c test conditions v ds = 50v , i d = 42a v gs = 0v , v ds = 25v f = 1mhz v gs = 0v , v ds = 0v to 333v v gs = 0 to 10v , i d = 42a, v ds = 250v resistive switching v dd = 333v , i d = 42a r g = 2.2 6 , v gg = 15v parameter drain-source breakdown voltage breakdown voltage temperature coef? cient drain-source on resistance 3 gate-source threshold voltage threshold voltage temperature coef? cient zero gate voltage drain current gate-source leakage current parameter continuous source current (body diode) pulsed source current (body diode) 1 diode forward voltage reverse recovery time reverse recovery charge peak recovery dv/dt parameter forward transconductance input capacitance reverse transfer capacitance output capacitance effective output capacitance, charge related effective output capacitance, energy related total gate charge gate-source charge gate-drain charge turn-on delay time current rise time turn-off delay time current fall time symbol v br(dss) v br(dss) / t j r ds(on) v gs(th) v gs(th) / t j i dss i gss symbol i s i sm v sd t rr q rr dv/dt symbol g fs c iss c rss c oss c o(cr) 4 c o(er) 5 q g q gs q gd t d(on) t r t d(off) t f 050-8096 rev c 5-2009 apt58m50j
v gs = 7,8 & 10v t j = 125c t j = 25c t j = -55c v gs = 10v 6v v ds > i d(on) x r ds(on) max. 250sec. pulse test @ <0.5 % duty cycle normalized to v gs = 10v @ 42a t j = 125c t j = 25c t j = -55c c oss c iss i d = 42a v ds = 400v v ds = 100v v ds = 250v t j = 125c t j = 25c t j = -55c t j = 150c t j = 25c t j = 125c t j = 150c c rss 5v 4.5v v gs , gate-to-source voltage (v) g fs , transconductance r ds(on) , drain-to-source on resistance i d , drain current (a) i sd, reverse drain current (a) c, capacitance (pf) i d , drain current (a) i d , drian current (a) v ds(on) , drain-to-source voltage (v) v ds , drain-to-source voltage (v) figure 1, output characteristics figure 2, output characteristics t j , junction temperature (c) v gs , gate-to-source voltage (v) figure 3, r ds(on) vs junction temperature figure 4, transfer characteristics i d , drain current (a) v ds , drain-to-source voltage (v) figure 5, gain vs drain current figure 6, capacitance vs drain-to-source voltage q g , total gate charge (nc) v sd , source-to-drain voltage (v) figure 7, gate charge vs gate-to-source voltage figure 8, reverse drain current vs source-to-drain voltage 0 5 10 15 20 25 0 5 10 15 20 25 30 -55 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 0 10 20 30 40 50 60 70 80 90 0 100 200 300 400 500 0 100 200 300 400 500 0 0.3 0.6 0.9 1.2 1.5 350 300 250 200 150 100 50 0 2.5 2.0 1.5 1.0 0.5 0 120 100 80 60 40 20 0 16 14 12 10 8 6 4 2 0 160 140 120 100 80 60 40 20 0 280 240 200 160 120 80 40 0 20,000 10,000 1000 100 10 280 240 200 160 120 80 40 0 apt58m50j 050-8096 rev c 5-2009
31.5 (1.240) 31.7 (1.248) dimensions in millimeters and (inches) 7.8 (.307) 8.2 (.322) 30.1 (1.185) 30.3 (1.193) 38.0 (1.496) 38.2 (1.504) 14.9 (.587) 15.1 (.594) 11.8 (.463) 12.2 (.480) 8.9 (.350) 9.6 (.378) hex nut m4 (4 places) 0.75 (.030) 0.85 (.033) 12.6 (.496) 12.8 (.504) 25.2 (0.992) 25.4 (1.000) 1.95 (.077) 2.14 (.084) * source drain gate * r = 4.0 (.157) (2 places) 4.0 (.157) 4.2 (.165) (2 places) w=4.1 (.161) w=4.3 (.169) h=4.8 (.187) h=4.9 (.193) (4 places) 3.3 (.129) 3.6 (.143) * source emitter terminals are shorted internally. current handling capability is equal for either source terminal. sot-227 (isotop ? ) package outline microsemi?s products are covered by one or more of u.s. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,5 03,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157, 886 6,939,743 7,342,262 and foreign patents. us and foreign patents pending. all rights reserved. peak t j = p dm x z jc + t c duty factor d = t 1 / t 2 t 2 t 1 p dm note: t 1 = pulse duration 1ms 100ms r ds(on) 0.5 single pulse 0.1 0.3 0.7 0.05 d = 0.9 scaling for different case & junction temperatures: i d = i d(t c = 25 c) *( t j - t c )/125 dc line 100s i dm 10ms 13s 100s i dm 100ms 10ms 13s r ds(on) dc line t j = 150c t c = 25c 1ms t j = 125c t c = 75c i d , drain current (a) v ds , drain-to-source voltage (v) v ds , drain-to-source voltage (v) figure 9, forward safe operating area figure 10, maximum forward safe operating area z jc , thermal impedance (c/w) 10 -5 10 -4 10 -3 10 -2 10 -1 1.0 rectangular pulse duration (seconds) figure 11. maximum effective transient thermal impedance junction-to-case vs pulse duration i d , drain current (a) 1 10 100 800 1 10 100 800 0.25 0.20 0.15 0.10 0.05 0 300 100 10 1 0.1 300 100 10 1 0.1 apt58m50j 050-8096 rev c 5-2009
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