philips semiconductors linear products product specification ne/se5018/5019 8-bit m p-compatible d/a converter 751 august 31, 1994 853-0845 13721 description the ne/se5018/19 is a complete 8-bit digital-to-analog converter subsystem on one monolithic chip. the data inputs have input latches which are controlled by a latch enable pin. the data and latch enable inputs are ultra-low loading for easy interfacing with all logic systems. the latches appear transparent when the le input is in the low state. when le goes high, the input data present at the moment of transition is latched and retained until le again goes low. this feature allows easy compatibility with most microprocessors. the chip also comprises a stable voltage reference (5v nominal) and high slew rate buffer amplifier. the voltage reference may be externally trimmed with a potentiometer for easy adjustment of full-scale while maintaining a low temperature coef ficient. the output of the buffer amplifier may be offset so as to provide bipolar as well as unipolar operation. features ? 8-bit resolution ? input latches ? low-loading data inputs ? on-chip voltage reference ? output buffer amplifier ? accurate to lsb (0.19%) ? monotonic to 8 bits ? amplifier and reference both short-circuit protected ? compatible with 8085, 6800 and many other m ps applications ? precision 8-bit d/a converters ? a/d converters ? programmable power supplies ? test equipment ? measuring instruments ? analog-digital multiplication pin configurations 1 2 3 4 5 6 7 8 9 10 11 12 13 14 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 13 14 15 16 22 21 20 19 18 17 f, n packages d package 1 note: 1. sol and non-standard pinout 11 12 digital gnd db0(lsb) db1 db2 db3 db4 db5 db6 db7(msb) nc analog gnd amp comp sum mode dac comp bipolar offset r le v cc+ v out v cc v ref in v ref out v ref adj digital gnd db0(lsb) db1 db2 db3 db4 db5 db6 db7(msb) nc analog gnd amp comp sum mode dac comp bipolar offset le v cc+ v out v cc v ref in v ref out v ref adj nc nc ordering information description temperature range order code dwg # 22-pin ceramic dual in-line package (cerdip) 0 to +70 c ne5018/5019f 0585b 22-pin ceramic dual in-line package (cerdip) -55 c to +125 c se5018/5019f 0585b 22-pin plastic dual in-line package (dip) 0 to +70 c ne5018/5019n 0409b 22-pin plastic dual in-line package (dip) -55 c to +125 c se5018/5019n 0409b 24-pin small outline large (sol) package 0 to +70 c ne5018/5019d 0173d
philips semiconductors linear products product specification ne/se5018/5019 8-bit m p-compatible d/a converter august 31, 1994 752 block diagram (13) (12) (20) (18) (21) (22) (14) (15) bipolar offset v ref in analog gnd amp comp sum node dac current output latches and switch drivers dac switches 5k 5k 15k (19) (10) msb lsb (1) digital gnd 5k v cc+ int v ref (9) db7 (8) db6 (7) db5 (6) db4 (5) db3 (4) db2 (3) db1 (2) db0 le v cc (16) v out 5k 5k + + + dac comp v ref out v ref adj (17) absolute maximum ratings symbol parameter rating unit v cc + positive supply voltage 18 v v cc - negative supply voltage -18 v v in logic input voltage 0 to 18 v v ref in voltage at v ref input 12 v v ref adj voltage at v ref adjust 0 to v ref v v sum voltage at sum node 12 v i ref sc short-circuit current to ground at v ref out continuous i outsc short-circuit current to ground or either supply at v out continuous p d maximum power dissipation, t a =25 c (still-air) 1 f package 1740 mw n package 2190 mw d package 1600 mw t a operating temperature range se5018 -55 to +125 c ne5018 0 to +70 c t stg storage temperature range -65 to +150 c t sold lead soldering temperature (10 seconds) 300 c notes: 1. derate above 25 c at the following rates: f package at 13.9mw/ c n package at 17.5mw/ c d package at 12.8mw/ c
philips semiconductors linear products product specification ne/se5018/5019 8-bit m p-compatible d/a converter august 31, 1994 753 dc electrical characteristics v cc +=+15v, v cc -=-15v, se5018. -55 c t a 125 c, ne5018. 0 c t a 70 c, unless otherwise specified. 1 typical values are specified at 25 c. symbol parameter test conditions ne/se5018 ne/se5019 unit symbol parameter test conditions min typ max min typ max unit resolution 8 8 8 8 8 8 bits monotonicity 8 8 8 8 8 8 bits relative accuracy 0.19 0.1 %fs v cc + positive supply voltage 11.4 15 11.4 15 v v cc - negative supply voltage -11.4 -15 -11.4 -15 v v in(1) logic a1o input voltage pin 1=0v 2.0 2.0 v v in(0) logic a0o input voltage pin 1=0v 0.8 0.8 v i in(1) logic a1o input current pin 1=0v, 2v philips semiconductors linear products product specification ne/se5018/5019 8-bit m p-compatible d/a converter august 31, 1994 754 ac electrical characteristics 1 v cc = 15v, t a = 25 c symbol parameter to from test conditions ne/se5018/19 unit symbol parameter to from test conditions min typ max unit t slh settling time 1/2lsb input all bits low-to-high 2 1.8 m s t shl settling time 1/2lsb input all bits high-to-low 3 2.3 m s t plh propagation delay output input all bits switched low-to-high 2 300 ns t phl propagation delay output input all bits switched high-to-low 3 150 ns t plsb propagation delay output input 1 lsb change 2, 3 150 ns t plh propagation delay output le low-to-high transition 4 300 ns t phl propagation delay output le high-to-low transition 5 150 ns t s setup time le input 1, 6 100 ns t h hold time input le 1, 6 50 ns t pw latch enable pulse width 1, 6 150 ns notes: 1. refer to figure 2. 2. see figure 5. 3. see figure 6. 4. see figure 7. 5. see figure 8. 6. see figure 9. 7. for reference currents>3ma, use of an external buf fer is required. figure 1. dc parametric test configuration 0.47 m f msb lsb 9 8 7 6 5 4 3 2 19 1 22 18 20 21 15 17 16 12 13 14 10 dac comp 5018 comp amp sum ana gnd dig gnd le v ref in v ref out v out v cc+ 0.01 m f 0.1 m f v cc output 2k 22pf 1n914 100pf 5.000v figure 2. ac parametric test configuration msb lsb 9 8 7 6 5 4 3 2 19 1 22 18 20 21 15 17 16 12 13 14 10 dac comp 5018 comp amp sum ana gnd dig gnd output 2k 22pf 1n914 100pf 0.47 m f le v out v cc+ 0.01 m f 0.1 m f v cc v ref in figure 3. full-/zero-scale adjust e unipolar output (010v) 0.47 m f msb lsb 10k 10t 80k 9 8 7 6 5 4 3 2 19 1 22 18 20 21 15 17 16 12 13 14 10 dac comp 5018 comp amp sum ana gnd dig gnd le v ref out v ref adj v out v cc+ 0.01 m f 0.1 m f v cc output 2k 22pf 1n914 100pf 1m v cc+ 20k 10t zero scale adjust v cc full scale adjust
philips semiconductors linear products product specification ne/se5018/5019 8-bit m p-compatible d/a converter august 31, 1994 755 0.47 m f figure 4. bipolar output operation (5 to +5v) msb lsb 10k 10t 80k 9 8 7 6 5 4 3 2 19 1 22 18 20 21 15 17 16 12 13 14 10 dac comp bip offset 5018 comp amp sum ana gnd dig gnd le v ref in v ref out v ref adj v out v cc+ 0.01 m f 0.1 m f v cc output 2k 22pf 1n914 100pf 1m v cc+ 20k 10t zero scale adjust v cc output figure 5. settling time and propagation delay, low-to-high data t slh t plh 1lsb data 10v 0v le = low figure 6. settling time and propagation delay, high-to-low data le = low t shl output 10v 0v 1lsb t phl data figure 7. propagation delay, latch enable to output le data t plh output 10v 0v figure 8. propagation delay, latch enable to output le data t phl t phl output 10v 0v
philips semiconductors linear products product specification ne/se5018/5019 8-bit m p-compatible d/a converter august 31, 1994 756 figure 9. latch pulse width, setup and hold times le data t pw t s t h
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