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613 magnetic disk ics fdd spindle motor driver BA6482AK the BA6482AK is an fdd spindle motor driver that employs a 3-phase, full-wave, soft switching drive system. this high- performance ic contains a digital servo, an index amplifier, and a power save circuit. applications floppy disk drives features 1) 3-phase, full-wave, soft switching drive system. 2) digital servo circuit. 3) power save circuit. 4) hall power supply switch. 5) motor speed changeable. 6) index amplifier. absolute maximum ratings (ta = 25 c) recommended operating conditions (ta = 25 c)
614 magnetic disk ics BA6482AK block diagram
615 magnetic disk ics BA6482AK pin descriptions
616 magnetic disk ics BA6482AK input / output circuits
617 magnetic disk ics BA6482AK
618 magnetic disk ics BA6482AK electrical characteristics (unless otherwise noted, ta = 25 c, v cc = 5v)
619 magnetic disk ics BA6482AK circuit operation (1) motor drive circuits the motor driver employs a 3-phase, full-wave, soft switching current drive system, in which the rotor position is sensed by hall devices. the motor drive current is sensed by a small resistor (r nf ). the total drive current is controlled and limited by sensing the voltage devel- oped across this resistor. the motor drive circuit consists of hall amplifiers, an amplitude control circuit, a driver, an error amplifier, a current feedback amplifier, and a satu- ration prevention amplifier (fig. 15). the waveforms of different steps along the signal path from the hall devices to the motor driver output are shown in fig. 16. the hall amplifiers receive the hall de- vice voltage signals as differential inputs. next, by de- ducting the voltage signal of hall device 2 from the volt- age signal of hall device 1, current signal h1, which has a phase 30 degrees ahead of hall device 1, is created. current signals h2 and h3 are created likewise. the am- plitude control circuit then amplifies the h1, h2, and h3 signals according to the current feedback amplifier sig- nal. then, drive current signals are produced at a1, a2, and a3 by applying a constant magnification factor. be- cause a soft switching system is employed, the drive cur- rent has low noise and a low total current ripple. the total drive current is controlled by the error amplifier input voltage. the error amplifier has a voltage gain of about 11db (a factor of 0.28). the current feedback am- plifier regulates the total drive current, so that the error amplifier output voltage (v1) becomes equal to the v rnf voltage, which has been voltage-converted from the total drive current through the r nf pin. if v1 exceeds the cur- rent limiter voltage (vcl), the constant voltage vcl takes precedence, and a current limit is provided at the level of vcl / r nf . the current feedback amplifier tends to oscillate be- cause it receives all the feedback with a gain of 0db. to prevent this oscillation, connect an external capacitor to the c nf pin for phase compensation and for reducing the high frequency gain. (2) speed control circuit the speed control circuit is a non-adjustable digital servo system that uses a frequency locked loop (fll). the cir- cuit consists of an 1 / 2 frequency divider, an fg amplifier, and a speed discriminator (fig. 17). an internal reference clock is generated from an external clock signal input or an oscillator (clock signal input.). the 1 / 2 frequency divider reduces the frequency of the osc signal. the fg amplifier amplifies the minute volt- age generated by the motor fg pattern and produces a rectangular-shaped speed signal. the fg amplifier gain (g fg = 42db, typical) is determined by the internal resis- tance ratio. for noise filtering, a high-pass filter is given by c3 and a resistor of 1.6k w (typical), and a low-pass filter is given by c4 and a resistor of 200k w (typical). the cutoff fre- quencies of high-pass and low-pass filters (f h and f l , re- spectively) are given by: the c3 and c4 capacitances should be set so as to satis- fy the following relationship: f h f fg f l where f fg is the fg frequency. note that the fg amplifier inputs have a hysteresis. the speed discriminator divides the reference clock and compares it with the reference frequency, and then out- puts an error pulse according to the frequency difference. the motor rotational speed n is given by: fosc is the reference clock frequency, n is (speed discriminator count) 2, z is the fg tooth number. the discriminator count depends on the speed control pin voltage. the integrator flattens out the error pulse of the speed discriminator and creates a control signal for the motor drive circuit (fig. 18). (3) index amplifier the index amplifier receives the hall device signals as differential inputs and amplifies the signals. the hall in- puts have a hysteresis. the delay time can be set arbi- trarily in the delay circuit with the external constants. f h = 1 2 p 1.6k w c3 f l = 1 2 p 200k w c4 (1) n = 60 f osc n 1 z
620 magnetic disk ics BA6482AK (4) other circuits start / stop circuit the start / stop circuit puts the ic to the operational state when the control pin is low, and to the standby state (cir- cuit current is nearly zero) when the control pin is high. the hall device bias switch, which is linked to the start / stop circuit, is turned off during the standby state, so that the hall device current is shut down. thermal shutdown circuit this circuit shuts down the ic currents when the chip junction temperature is increased to about 170 c (typi- cal). the thermal shutdown circuit is deactivated when the temperature drops to about 140 c (typical). circuit operation
621 magnetic disk ics BA6482AK
622 magnetic disk ics BA6482AK application example
623 magnetic disk ics BA6482AK operation notes (1) thermal shutdown circuit this circuit shuts down all the ic currents when the chip junction temperature is increased to about 170 c (typi- cal). the circuit is deactivated when the temperature drops to about 140 c (typical). (2) hall devices connection hall devices can be connected in either series or parallel. when connecting in series, care must be taken not to al- low the hall output to exceed the hall common-mode in- put range. (3) hall input level switching noise may occur if the hall input voltage (pins 13 18) is too high. differential inputs of about 100mv (peak to peak) are recommended. (4) ceramic oscillator external constants the appropriate external constants vary with ceramic os- cillator types. consult with the ceramic oscillator manufacturer when determining the constants. (5) oscillator external input an external clock can be directly input to the ic from osc2 (pin 26) without a coupling capacitor. leave osc1 (pin 27) open in this case. the osc2 voltage should be more than the v cc voltage and less than the ground volt- age. (6) relationship between the hall input signal and the motor output signal the 3-phase hall input signal is amplified by the amplifi- er, and further amplified and combined in the matrix cir- cuit. the signal is then converted to current in the ampli- tude control circuit and sent to the output driver to provide the motor drive current. the phase of the motor output signal is 30 degrees (typical) ahead of the phase of the hall input signal. (7) although the quality of this ic is rigorously con- trolled, the ic may be destroyed when the supply voltage or the operating temperature exceeds its absolute maxi- mum rating. because short mode or open mode cannot be specified when the ic is destroyed, be sure to take physical safety measures, such as fusing, if any of the absolute maximum ratings might be exceeded. electrical characteristic curves
624 magnetic disk ics BA6482AK external dimensions (units: mm)

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