january 21, 2000 (v2.0) 7-1 1 2 3 4 5 6 7 8 9 10 11 12 13 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm the high-reliability programmable logic leader xilinx is the leading supplier of high-reliability programma- ble logic devices to the aerospace and defense markets. these devices are used in a wide range of applications such as electronic warfare, missile guidance and targeting, radar, sonar, communications, signal processing, avi- onics and satellites. the xilinx qpro family of ceramic and plastic qml products (qualified manufacturers listing), certified to mil-prf-38585, provide system designers with advanced programmable logic solutions for next generation designs. the qpro family also includes select products that are radiation hardened for use in satellite and other space applications. the xilinx qpro family addresses the issues that are criti- cal to the aerospace and defense market: q ml/best commercial practices. commercial manufacturing strengths result in more efficient process flows p erformance-based solutions, including cost-effective plastic packages. r eliability of supply. controlled mask sets and processes insure the same quality devices, every time, without variation, which remain in production for an extended time. o ff-the-shelf asic solutions. standard devices readily available, no need for custom logic and gate arrays. unmatched product offering the qpro family provides a wide variety of devices, deliv- ering the industry?s fastest and biggest devices. the virtex members of the qpro family offers fpgas with densities greater than 1,000,000 system gates, and even larger devices planned for the future. this broad range of devices is available in a wide variety of speed and package options. both military temperature and full qml/smd versions are available as standard off-the-shelf products. select soft- ware cores, such as complete powerpc peripherals, is also available. products for space applications xilinx offers the industry?s only radiation hardened reconfig- urable fpgas for satellite and space. these devices are manufactured using an epitaxial wafer process, and have guaranteed total dose, latch up immunity, and low soft upset rates. these products allow for the ultimate in design and mission flexibility in a cost-effective manner. qml certification part of overall quality platform being certified to mil-prf-38535 qml complemented by iso-9000 certification results in an overall product quality platform that makes xilinx a world-class supplier of pro- grammable logic devices. designers can confidently design with xilinx for high-reliability systems with the knowledge they are getting unsurpassed quality and reliability, and long-term commitment to the aerospace and defense mar- ket. commitment to the aerospace and defense market xilinx understands that our customers need to be able to count on their suppliers to be around for the long-term. xil- inx is committed to the long-term support of the aerospace and defense market, and we are continually expanding our product portfolio. because our focus is in the form of a ver- tical market concept, we are able to provide emphasis on all of our customer?s product requirements. 0 qpro? high-reliability qml certified and radiation hardened products for aerospace and defense applications january 21, 2000 (v2.0) 07* r
r qpro ? high-reliability qml certified and radiation hard- 7-2 january 21, 2000 (v2.0) revision control table 1: high density high performance and radiation hardened products family devices features xc/xq4000/e/ex xc4005/e xc4010/e xc4013/e xc4025e xq4028ex 5,000-28,000+ gates up to 256 user-definable i/os extensive system features include on-chip user ram, built-in 1149.1 test support and fast carry logic xq4000xl xq4013xl xq4036xl xq4062xl up to 130,000 system gates 3.3 v, 5v-compatible i/o xqr4000xl radiation hardened xqr4013xl xqr4036xl xqr4062xl up to 130,000 system gates 60k rads total dose, latchup immune virtex xqv100 xqv300 xqv600 xqv1000 up to 1,000,000 system gates, 2.5v virtex radiation hardened xqvr300 xqvr600 XQVR1000 100k rads total dose, latchup immune date version description 1/98 1.1 version 1.1 -- high-reliability and qml military products, correct erroneous information page 2 ? xc3000 products ? , delete last page, table - ? mil-prf-3853 qml, xilinx m grade and plastic commercial flows ? 11/98 1.2 version 1.2 - added new products, corrected xc3000, xc4000 products. 02/02/00 2.0 updated introduction and product listing.
ds002 (v1.0) october 4, 1999 7-3 1 2 3 4 5 6 7 8 9 10 11 12 13 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm features certified to mil-prf-38535 (qualified manufacturer listing) guaranteed over the full military temperature range ( ? 55 c to +125 c) ceramic and plastic packages fast, high-density field-programmable gate arrays - densities from 100k to 1m system gates - system performance up to 200 mhz - hot-swappable for compact pci multi-standard selecti/o ? interfaces - 16 high-performance interface standards - connects directly to zbtram devices built-in clock-management circuitry - four dedicated delay-locked loops (dlls) for advanced clock control - four primary low-skew global clock distribution nets, plus 24 secondary global nets hierarchical memory system - luts configurable as 16-bit ram, 32-bit ram, 16-bit dual-ported ram, or 16-bit shift register - configurable synchronous dual-ported 4k-bit rams - fast interfaces to external high-performance rams flexible architecture that balances speed and density - dedicated carry logic for high-speed arithmetic - dedicated multiplier support - cascade chain for wide-input functions - abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset - internal 3-state bussing - ieee 1149.1 boundary-scan logic - die-temperature sensing device supported by fpga foundation ? and alliance development systems - complete support for unified libraries, relationally placed macros, and design manager - wide selection of pc and workstation platforms sram-based in-system configuration - unlimited reprogrammability - four programming modes 0.22 m 5-layer metal process 100% factory tested description the qpro ? virtex ? fpga family delivers high-perfor- mance, high-capacity programmable logic solutions. dra- matic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 5-layer-metal 0.22 m cmos pro- cess. these advances make qpro virtex fpgas powerful and flexible alternatives to mask-programmed gate arrays. the virtex family comprises the four members shown in ta b l e 1 . building on experience gained from previous generations of fpgas, the virtex family represents a revolutionary step forward in programmable logic design. combining a wide variety of programmable system features, a rich hierarchy of fast, flexible interconnect resources, and advanced pro- cess technology, the qpro virtex family delivers a high-speed and high-capacity programmable logic solution that enhances design flexibility while reducing time-to-mar- ket. refer to the ? virtex ? 2.5v field programmable gate arrays ? commercial data sheet for more information on device architecture and timing specifications. 0 qpro virtex 2.5v qml high-reliability fpgas ds002 (v1.0) october 4, 1999 07* preliminary product specification r table 1: qpro virtex field-programmable gate array family members. device system gates clb array logic cells maximum available i/o block ram bits max select ram bits xqv100 108,904 20x30 2,700 180 40,960 38,400 xqv300 322,970 32x48 6,912 316 65,536 98,304 xqv600 661,111 48x72 15,552 316 98,304 221,184 xqv1000 1,124,022 64x96 27,648 404 131,072 393,216
ds028 (v1.0) february 9, 2000 7-4 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm features radiation hardened fpgas for space and satellite applications guaranteed total ionizing dose to 100k rad(si) latch-up immune to let = 125 mev cm 2 /mg seu immunity achievable with recommended redundancy implementation guaranteed over the full military temperature range ( ? 55 c to +125 c) fast, high-density field-programmable gate arrays - densities from 100k to 1m system gates - system performance up to 200 mhz - hot-swappable for compact pci multi-standard selecti/o ? interfaces - 16 high-performance interface standards - connects directly to zbtram devices built-in clock-management circuitry - four dedicated delay-locked loops (dlls) for advanced clock control - four primary low-skew global clock distribution nets, plus 24 secondary global nets hierarchical memory system - luts configurable as 16-bit ram, 32-bit ram, 16-bit dual-ported ram, or 16-bit shift register - configurable synchronous dual-ported 4k-bit rams - fast interfaces to external high-performance rams flexible architecture that balances speed and density - dedicated carry logic for high-speed arithmetic - dedicated multiplier support - cascade chain for wide-input functions - abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset - internal 3-state bussing - ieee 1149.1 boundary-scan logic - die-temperature sensing device supported by fpga foundation ? and alliance development systems - complete support for unified libraries, relationally placed macros, and design manager - wide selection of pc and workstation platforms sram-based in-system configuration - unlimited reprogrammability - four programming modes 0.22 m 5-layer epitaxial process description the qpro virtex fpga family delivers high-performance, high-capacity programmable logic solutions. dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploit- ing an aggressive 5-layer-metal 0.22 m cmos process. these advances make qpro virtex fpgas powerful and flexible alternatives to mask-programmed gate arrays. the virtex radiation hardened family comprises the three mem- bers shown in ta b l e 1 . building on experience gained from previous generations of fpgas, the virtex family represents a revolutionary step forward in programmable logic design. combining a wide variety of programmable system features, a rich hierarchy of fast, flexible interconnect resources, and advanced pro- cess technology, the qpro virtex family delivers a high-speed and high-capacity programmable logic solution that enhances design flexibility while reducing time-to-mar- ket. refer to the ? virtex ? 2.5v field programmable gate arrays ? commercial data sheet for more information on device architecture and timing specifications. 0 qpro ? virtex ? 2.5v radiation hardened fpgas ds028 (v1.0) february 9, 2000 07* advance product specification r table 1: qpro virtex radiation hardened field-programmable gate array family members. device system gates clb array logic cells maximum available i/o block ram bits max select ram bits xqvr300 322,970 32x48 6,912 316 65,536 98,304 xqvr600 661,111 48x72 15,552 316 98,304 221,184 XQVR1000 1,124,022 64x96 27,648 404 131,072 393,216
may 19, 1998 (version 2.1) 7-5 1 2 3 4 5 6 7 8 9 10 11 12 13 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm xq4000e/ex high-reliability features certified to mil-prf-38535, appendix a qml (qualified manufacturers listing) system featured field-programmable gate arrays - selectram tm memory: on-chip ultra-fast ram with - synchronous write option - dual-port ram option - abundant flip-flops - flexible function generators - dedicated high-speed carry logic - wide edge decoders on each edge - hierarchy of interconnect lines - internal 3-state bus capability - 8 global low-skew clock or signal distribution networks system performance beyond 60 mhz flexible array architecture low power segmented routing architecture systems-oriented features - ieee 1149.1-compatible boundary scan logic support - individually programmable output slew rate - programmable input pull-up or pull-down resistors - 12-ma sink current per xq4000e/ex output configured by loading binary file - unlimited reprogrammability readback capability - program verification - internal node observability backward compatible with xc4000 devices development system runs on most common computer platforms - interfaces to popular design environments - fully automatic mapping, placement and routing - interactive design editor for design optimization available speed grades: - xq4000e -3 for plastic packages only - -4 for ceramic packages only - xq4028ex -4 for all packages more information for more information refer to xilinx xc4000e and xc4000x series field programmable gate arrays product specification. this datasheet contains pinout tables for xq4010e only. refer to xilinx 1998 databook for pinout tables for other devices. (pinouts for xq4000e/ex are iden- tical to xc4000e/ex.) note: max values of typical gate range include 20-30% of clbs used as ram. 0 qpro ? xq4000e/ex qml high reliability fpgas may 19, 1998 (version 2.1) 07* product specification r table 1: xq4000e/ex field programmable gate arrays device max. logic gates (no ram) max. ram bits (no logic) typical gate range (logic and ram)* clb matrix total clbs number of flip-flops max. decode inputs per side max. user i/o packages xq4005e 5,000 6,272 3,000 - 9,000 14 x 14 196 616 42 112 pg156, cb164 xq4010e 10,000 12,800 7,000 - 20,000 20 x 20 400 1,120 60 160 pg191, cb196, hq208 xq4013e 13,000 18,432 10,000 - 30,000 24 x 24 576 1,536 72 192 pg223, cb228, hq240 xq4025e 25,000 32,768 15,000 - 45,000 32 x 32 1,024 2,560 96 256 pg299, cb228 xq4028ex 28,000 32,768 18,000 - 50,000 32 x 32 1024 2560 96 256 pg299, cb228, hq240, bg352
ds029 (v1.2) february 9, 1999 7-6 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm xq4000x series features certified to mil-prf-38535 appendix a qml (qualified manufacturer listing) ceramic and plastic packages also available under the following standard microcircuit drawings (smd) - xq4013xl 5962-98513 - xq4036xl 5962-98510 - xq4062xl 5962-98511 - xq4085xl 5962-99575 for more information contact the defense supply center columbus (dscc) http://www.dscc.dla.mis/v/va/smd/smdsrch.html available in -3 speed system featured field-programmable gate arrays - selectram ? memory: on-chip ultra-fast ram with - synchronous write option - dual-port ram option - abundant flip-flops - flexible function generators - dedicated high-speed carry logic - wide edge decoders on each edge - hierarchy of interconnect lines - internal 3-state bus capability - eight global low-skew clock or signal distribution networks system performance beyond 50 mhz flexible array architecture low power segmented routing architecture systems-oriented features - ieee 1149.1-compatible boundary scan logic support - individually programmable output slew rate - programmable input pull-up or pull-down resistors - 12 ma sink current per xq4000xl output configured by loading binary file - unlimited reprogrammability readback capability - program verification - internal node observability development system runs on most common computer platforms - - interfaces to popular design environments - - fully automatic mapping, placement and routing - - interactive design editor for design optimization highest capacity ? over 130,000 usable gates additional routing over xq4000e - almost twice the routing capacity for high-density designs buffered interconnect for maximum speed new latch capability in configurable logic blocks improved versaring ? i/o interconnect for better fixed pinout flexibility - virtually unlimited number of clock signals optional multiplexer or 2-input function generator on device outputs 5v tolerant i/os 0.35 m sram process introduction xq4000x series high-performance, high-capacity field programmable gate arrays (fpgas) provide the benefits of custom cmos vlsi, while avoiding the initial cost, long development cycle, and inherent risk of a conventional masked gate array. the result of thirteen years of fpga design experience and feedback from thousands of customers, these fpgas com- bine architectural versatility, on-chip select-ram memory with edge-triggered and dual-port modes, increased speed, abundant routing resources, and new, sophisticated soft-ware to achieve fully automated implementation of complex, high-density, high-performance designs. refer to the complete commercial xc4000x series field programmable gate arrays data sheet for more informa- tion on device architecture and timing, and the latest xilinx databook for package pinouts other than the cb228 (included in this data sheet). (pinouts for xq4000xl device are identical to xc4000xl.) 0 qpro ? xq4000xl series qml high-reliability fpgas ds029 (v1.2) february 9, 1999 07* r
october 5, 1998 (version 1.0) 7-7 1 2 3 4 5 6 7 8 9 10 11 12 13 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm xqr4000xl series features radiation hardened fpgas for space and satellite applications guaranteed total ionizing dose latch-up immune low soft upset rate guaranteed to meet full electrical specifications over ? 55 o c to +125 o c available in -3 speed system featured field-programmable gate arrays - select-ram tm memory: on-chip ultra-fast ram with - synchronous write option - dual-port ram option - abundant flip-flops - flexible function generators - dedicated high-speed carry logic - wide edge decoders on each edge - hierarchy of interconnect lines - internal 3-state bus capability - eight global low-skew clock or signal distribution networks system performance beyond 60 mhz flexible array architecture low power segmented routing architecture systems-oriented features - ieee 1149.1-compatible boundary scan logic support - individually programmable output slew rate - programmable input pull-up or pull-down resistors - 12 ma sink current per output configured by loading binary file - unlimited reprogrammability readback capability - program verification - internal node observability development system runs on most common computer platforms - interfaces to popular design environments - fully automatic mapping, placement and routing - interactive design editor for design optimization highest capacity ? over 130,000 usable gates buffered interconnect for maximum speed new latch capability in configurable logic blocks improved versaring ? i/o interconnect for better fixed pinout flexibility - virtually unlimited number of clock signals optional multiplexer or 2-input function generator on device outputs 5v tolerant i/os advanced 0.35 process processed on xilinx ? s qml line note: max values of typical gate range include 20-30% of clbs used as ram. 0 qpro ? xqr4000xl radiation hardened field programmable gate arrays october 5, 1998 (version 1.0) 07* preliminary product specification r table 1: xqr4000x series radiation hardened field programmable gate arrays device logic cells max. logic gates (no ram) max. ram bits (no logic) typical gate range (logic and ram)* clb matrix total clbs number of flip-flops max. user i/o packages xqr4013xl 1,368 13,000 18,432 10,000 - 30,000 24 x 24 576 1,536 192 cb228 xqr4036xl 3,078 36,000 41,472 22,000 - 65,000 36 x 36 1,296 3,168 288 cb228 xqr4062xl 5,472 62,000 73,728 40,000 - 130,000 48 x 48 2,304 5,376 384 cb228
july 8, 1999 (version 2.3) 7-8 for a complete data sheet, go to cd-rom or xilinx web site: www.xilinx.com/partinfo/databook.htm features serial configuration one-time programmable (otp) read-only memory designed to store configuration bitstreams of xilinx fpga devices simple interface to the fpga; requires only one user i/o pin cascadable for storing longer or multiple bitstreams programmable reset polarity (active high or active low) for compatibility with different fpga solutions supports xc4000ex/xl/xla/xv fast configuration mode (15.0 mhz) low-power cmos floating gate process xc1704l, xc1702l, xc1701l, xq1701l and the xc17512l are 3.3v devices xc1701 is a 5v device only available in compact plastic packages: 8-pin pdip, 20-pin soic, 20-pin plcc, 44-pin plcc or 44-pin vqfp. qpro tm parts available in 44-pin ceramic lcc and 20-pin soic. programming support by leading programmer manufacturers. design support using the xilinx alliance and foundation series software packages. description the xc1704l, xc1702l, xc1701l, and the xc17512l are xilinxs 3.3v series of high density serial configuration proms (sproms). included within this family are the xc1701 (5v) and the xq1701l (3.3v) sproms to provide an easy-to-use, cost-effective method for storing large xilinx fpga configuration bitstreams. when the fpga is in master serial mode, it generates a configuration clock that drives the sprom. a short access time after the rising clock edge, data appears on the sprom data output pin that is connected to the fpga din pin. the fpga generates the appropriate number of clock pulses to complete the configuration. once config- ured, it disables the sprom. when the fpga is in slave serial mode, the sprom and the fpga must both be clocked by an incoming signal. multiple devices can be concatenated by using the ceo output to drive the ce input of the following device. the clock inputs and the data outputs of all sproms in this chain are interconnected. all devices are compatible and can be cascaded with other members of the family. for device programming, either the xilinx alliance or foun- dation series development system compiles the fpga design file into a standard hex format, which is then trans- ferred to most commercial prom programmer. 0 xc1700l series high density serial configuration proms including xq1701l qpro tm series july 8, 1999 (version 2.3) 07* product specification r figure 1: simplified block diagram (does not show programming circuit) eprom cell matrix address counter ce reset/ oe or oe/ reset data ceo oe output clk v cc v pp gnd x3185 tc
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