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april 2011 doc id 18080 rev 2 1/13 13 spv1040 high efficiency solar batter y charger with embedded mppt features 0.3 v to 5.5 v operating input voltage 140 m internal synchr onous rectifier 120 m internal power active switch 100 khz fixed pwm frequency duty cycle controlled by mppt algorithm output voltage regulation, overcurrent and overtemperature protection input source reverse polarity protection built in soft-start up to 95% efficiency 3 mm x 4.4 mm tssop8 package applications smart phones and gps systems wireless headsets small appliances, sensors portable media players digital still cameras toys and portable healthcare description the spv1040 is a high efficiency, low power and low voltage monolithic step-up converter that operates over a 0.3 v to 5.5 v input voltage range which allows providing power supply to products using even down to one photovoltaic cell or fuel cells where the capabilit y of handling low input voltages is of utmost importance. despite the variation of several conditions over the day (like irradiation, dirt, temperature, etc.) the spv1040 allows to ac hieve the maximum efficiency in terms of power harvested from the cells and transferred to the output thanks to the embedded mppt algorithm. it employs an input voltage regulation loop, which fixes the charging battery voltage, set with a resistor divider and a maximum output current set with a current sense re sistor according to charging current constraints. the spv1040 guarantees safety of application devices and of the converter itself stopping the pwm switching in case either of reached maximum input current peak threshold set up to 1.8 a or maximum temperature limit set up to 155 c. as additional feature the ic build-in an input source reverse polarity protection which prevents damaging in case of reverse connection of solar panel at the input. table 1. device summary order codes package packaging spv1040t tssop8 tube spv1040ttr tape and reel tssop8 www.st.com
contents spv1040 2/13 doc id 18080 rev 2 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.1 soft-start mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2 start-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.3 mppt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.4 constant voltage regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.5 constant current regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.6 over current protection ovc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.7 over temperature protection ovt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.8 shut-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.9 under voltage lock-out (uvlo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.10 reverse polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.11 burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.12 sleep-in mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
spv1040 block diagram doc id 18080 rev 2 3/13 1 block diagram figure 1. block diagram figure 2. simplified application circuit /[ ;6 +87 *1' 0336(7 9287 ,&75/b3/86 9&75/ ,&75/b0,186 9ej ,rxw 5hj 0336(7 9lqbuhi 9lq5hj 9r xw 5hj 033%/2&. $1$/2*%/2&. %xuvw5hi &/2&. &/2&. %856702'( '$&&2'( ',*,7$/ &25( 67$576,*1$/ 9ej 9lqbuhi 29(5&855(17 29(57(03(5$785( 5(9(56( 32/$5,7< 3:0 '5,9(56 &21752/ =(52&5266,1* '(7(&725 am02612v1 lx xshut gnd vout ictrl_plus ictrl_minus vctrl v batt r s r 1 r2 c in c out l mpp-set r 3 r 4 v pv
pin description spv1040 4/13 doc id 18080 rev 2 2 pin description figure 3. pin connection (top view) table 2. pin description pin name type description 1 mpp-set i non-inverting input to sense the pv cell voltage. it cannot be left floating. 2 gnd ground power ground reference. 5 xshut i shutdown input pin: xshut=low => device in power off mode xshut=high => device enabled for operating mode this pin cannot be left floating. 3 lx i booster inductor connection. 7 ictrl_plus i non-inverting input of constant curr ent control loop. it cannot be left floating. 8 ictrl_minus i inverting input of constant current control loop. it cannot be left floating. vctrl i non-inverting input of cons tant voltage control loop. it cannot be left floating. 4 vout o booster output voltage vctrl gnd lx vout x s hut mpp- s et 8 7 ictrl_plu s 1 2 6 3 4 5 ictrl_minu s am0261 3 v1
spv1040 maximum ratings doc id 18080 rev 2 5/13 3 maximum ratings 3.1 absolute maximum ratings 3.2 thermal data note: r thja was measured on a 2 layers pcb, fr4, 35m cu thickness, 2.8 cm 2 table 3. absolute maximum ratings symbol parameter range [min, max] unit mpp-set analog input [-5.5, vout] v gnd ground 0 v xshut analog input [ -5.5, vout] v lx analog input [-5.5, vout] v ictrl_plus analog input [-0.3, vout] v ictrl_minus analog input [-0.3, vout] v vctrl analog input [-0.3, vout] v vout analog output [-0.3, 5.5] v table 4. tssop8 thermal data symbol parameter value unit r th j-amb thermal resistance, junction-to-ambient 135 c/w tj op junction operating temperature -40 to 125 c tstg storage temperature -40 to 150 c
electrical charac teristics spv1040 6/13 doc id 18080 rev 2 4 electrical characteristics v mpp-set = 0.5 v, v ctrl = ictrl+ = ictrl- = gnd, xshut = 0.5 v, t a = -40c to 85c and t j < 125c, unless otherwise specified. table 5. electrical characteristics symbol parameter test condition min typ max unit input source section v mpp-set low boost voltage threshold v out = 3.3v 0.4 0.45 0.50 v i q quiescent current iload=0ma, v ctrl =2v, v out =3.3v, tj = t a 60 80 a i sd shut-down current v out = 3.3v, iload = 0ma, xshut = gnd 0.7 5 a i rev reverse input source current v mpp-set =-4v, tj = t a, v out = 1.5v 1 5 a v uvlo under voltage lock-out threshold for turn on @v out = 3.3v v mpp-set increasing 0.27 0.34 v under voltage lock-out threshold for turn off @v out = 3.3v v mpp-set decreasing 0.14 0.24 v power section r ds_on-n n-channel power switch on resistance 120 m r ds_on-p p-channel synchronous rectifier on resistance 140 m control section v mppt-thr mppt-mode threshold vout increasing, v mpp-set = 1.5v 2 v v out output voltage range 2 5.2 (1) v p out (2) maximum output power 3w i lx maximum inductor current peak 1.8 a f pwm pwm signal frequency 70 100 130 khz v ref internal v ctrl reference voltage v out 1.4v, v ctrl > 0 1.2 1.25 1.3 v v ictrl sensing current offset 40 50 60 mv xshut xshut logic low 0.27 0.34 v xshut logic high 0.14 0.24 v
spv1040 electrical characteristics doc id 18080 rev 2 7/13 symbol parameter test condition min typ max unit thermal shutdown t shutdown over temperature threshold for turn off temperature increasing 155 c over temperature threshold for turn on temperature decreasing 130 c 1. in order to increase the vout as much as possible up to 5.2 v a scho ttky diode has to be placed between lx and vout pins as shown on figure 2 . 2. being t j = t a + r thja x p d , and assuming that it is r thja = 135c/w and that in order to avoid device destruction it must be tjmax 125c and that in worst conditions t a = 85c, the power dissipated inside the device is given by:. hence if in the worst case it is s upposed to be efficiency at 90%, then p in-max = 3.3 w and p out-max = 3 w. table 5. electrical characteristics (continued) p d t j t a ? r thja ---------------- - 295mw =
detailed description spv1040 8/13 doc id 18080 rev 2 5 detailed description the spv1040 is a monolithic, high efficiency, low voltage, self-powered dc/dc converter that operates over 0.3 v to 5.5 v dc input voltage range and provides a single output voltage. the spv1040 provides regulated output voltage and current by sensing the vctrl feedback of the external resistor divider and the voltage drop on the external sense resistor rs respectively. the high efficiency is ensured by the low power consumption in any working mode and by the embedded perturb&observe mppt algorithm. the spv1040 guarantees its own and application safety by stopping the n-channel power switch in case either of over-current or over-temperature condition. 5.1 soft-start mode in order to guarantee the power-up even when vout is very low (battery completely discharged) a proper start-up strategy has been implemented. taking into account that the device is powered by the vout voltage, if vout is lower than 0.8v, the device moves from power off to soft-start mode and the current flows from the input to output through the intrinsic body diode of the synchronous rectifier. in such a condition vout follows the lx voltage. the ic leaves the start-up mode when vout reaches 0.8v. 5.2 start-up mode when vout goes above 0.8 v but it is still lowe r than 2 v, a proper bi asing of both mosfet is not yet guaranteed. in such conditions the n-channel power switch is forced on with fixed duty cycle and the energy is transferred to the load via the intrinsic body diode of the p- channel synchronous switch. if the shut-down over-current limit is overtaken the power switch is immediately turned off. the spv1040 leaves the start-up mode as soon as vout goes above 2 v. 5.3 mppt mode once left the start-up mode the spv1040 enters th e mppt mode to search for maximum power point. the perturb&observe algorithm is based on monitoring either the voltage or the current supplied by the dc power source unit so that the pwm signal duty-cycle is increased or decreased step by step according to the input power trend. please refer to the figure 4 that shows the mppt working principle. 5.4 constant voltage regulation the constant voltage control loop consists of an internal voltage reference, an op-amp and an external resistor divider that senses the battery voltage and fixes the voltage regulation set-point at the value as specified by the user.
spv1040 detailed description doc id 18080 rev 2 9/13 5.5 constant current regulation the constant current control loop consists of an op-amp and an external sense resistor that feeds the current sensing circuit with a voltage proportional to the dc output current. this resistor determines the current regulation set point and must be adequately rated in terms of power dissipation. it gives th e user the capability of fixing the maximum output current in order to protect the battery. 5.6 over current protection ovc when the current that flows through the inductor reaches 1.8 a (over-current shutdown limit), the n-channel power switch is immediately forced off and the p-channel synchronous rectifier is switched on. once the over-current condition is expired, that is the inductor current goes below 1.8 a the n-channel power switch is turned on back. 5.7 over temperature protection ovt when the temperature se nsed at silicon level reaches 1 55c (over-temperature shutdown limit), the n-channel power switch is immediately forced off and the p-channel synchronous rectifier is switched on . the device becomes operative again as soon as the silicon temperature goes below 130c. 5.8 shut-down mode the xshut pin low drives off all the internal circuitry achieving the lowest power consumption mode . 5.9 under voltage lock-out (uvlo) in order to prevent batteries from over-discharging, the device turns off in case of mpp- set voltage lower than 0.24 v (no irradiation). a hysteresis has been implemented to avoid unpredictable on-off switching. 5.10 reverse polarity in order to avoid device permanent damages and battery discharge when the solar panel connection is reversely inserted a dedicated circuit for the purpose has been implemented. in such a condition the spv1040 stays off un til a wrong insertion of panel is detected.
detailed description spv1040 10/13 doc id 18080 rev 2 figure 4. mppt working principle 5.11 burst mode when the output voltage reaches the battery charge voltage or the mpp-set voltage drops below 450 mv or the output current reaches the output maximum current limit, the duty- cycle d drops down to 10% and the device evolves from operating mode to burst mode. the converter doesn?t work at constant frequency anymore but at frequency gradually lower (1 ton over 1 pwm cycle, 1 ton over 2 pwm cycles, ?,1 ton over 16 pwm cycles) prior to enter the sleep-in mode. 5.12 sleep-in mode once entered the sleep -in mode no current is provided to the load. the device will come out from this mode once the cause which forced it in such a state is not present anymore.
spv1040 package mechanical data doc id 18080 rev 2 11/13 6 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 5. tssop8 package mechanical drawing table 6. tssop8 package mechanical data symbol millimeters min. typ. max. a 1.200 a1 0.050 0.150 a2 0.800 1.000 1.050 b 0.190 0.300 c 0.090 0.200 cp 0.100 d 2.900 3.000 3.100 e ? 0.650 ? e 6.200 6.400 6.600 e1 4.300 4.400 4.500 l 0.450 0.600 0.750 l1 1.000 0 8
revision history spv1040 12/13 doc id 18080 rev 2 7 revision history table 7. document revision history date revision changes 08-oct-2010 1 initial release 06-apr-2011 2 updated coverpage, dfn8 information deleted, chapter 3 , chapter 4 and chapter 5
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