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  ram ( 8-bit) rom ( 8-bit) type package qfp100-p-1818b *lead-free mn101d10f , mn101d10g minimum instruction execution time with main cloc k operated 0.1397 s (at 4.0 v to 5.5 v, 14.32 mhz) 71.5 s (at 2.7 v to 5.5 v fixed to 14.32 mhz internal frequency division) when sub-clock operated 61 s (at 2.5 v to 5.5 v, 32.768 khz) interrupts ? reset  runaway  external 0  external 1  external 2  external 3  external 4  timer 0  timer 1  timer 2  timer 3  timer 6  capstan fg  control  hsw  cylinder(drum) fg  servo v-sync  synchronous output  osd  xds  serial 0  serial 1  serial 2  pwm 4  osdv-sync timer counter timer counter 0: 8-bit 1 (timer function) clock source 1/4, 1/16 of system clock frequency interrupt source overflow of timer counter 0 timer counter 1: 8-bit 1 (timer function, linear timer counter function) clock source 1/4 of system clock frequency; ctl signal interrupt source overflow of timer counter 1 timer counter 2: 16-bit 1 (timer function, input capture,duty judgment of ctl signal(viss/vass detection function), generation of remote control output carrier frequency) clock source 1/4, 1/16, 1/24 of system clock frequency interrupt source overflow of timer counter 2; input of ctl specified edge; underflow of timer 2 shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift register compare register timer counter 3: 16-bit 1 (timer function, generation of serial transmission clock) clock source 1/4, 1/16 of system clock frequency interrupt source overflow of timer counter 3 timer counter 5: 19-bit 1 (watchdog, stable oscillation waiting function) clock source system clock watchdog interrupt source 1/2 16 , 1/2 19 of timer counter 5 frequency clear by stable oscillation after 256 counts by timer counter 5 (2 18 counts of osc oscillation clock) timer counter 6: 16-bit 1 (clock function [max. 2 s]) clock source 1/512 of osc oscillation clock frequency; xi oscillation clock; 1/8, 1/128 of system clock frequency interrupt source 1/2 13 , 1/2 14 , 1/2 15 overflow of timer counter 6 serial interface 128 k mn101d10f mad00043bem 2.5 k serial 0: 8-bit 1 (synchronous type) (transfer direction of msb/lsb selectable, start condition function) clock source 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; nsbt0 pin input serial 1: 8-bit 1 (synchronous type/remote control transmission) (transfer direction of msb/lsb selectable, start condition function) clock source 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; 2-division timer 3 output; nsbt1 pin input remote control clock 2-division timer 3 output serial 2: 8-bit 1 (i 2 c) (master transmission/reception, slave transmission/reception) clock source 1/144 to 1/252 of system clock; sck pin input 3.5 k 96 k mn101d10g 106
mn101d10f, mn101d10g osd display mode : men u(intermal synchronized) display, superimpose(externally synchronized) display applicable broadcasting system : ntsc, pal, pal-m, pal-n screen configuration : 24 characters 2n rows (n = 1 to 6) character type : max. 256 character types (variable, include special characters) character size : 12 18 dots (vertical direction: 1 dot for 2h at not enlargement) enlarged characters : each 2 settings in horizontal and vertical character interpolation : none line background color : 8-hue settable in the row unit at menu display line background intensity : 8 gradations settable in the row unit screen background color : : 8-huesettable at menu display character color : white character intensity : 8 gradations settable in the row unit border function : 1-dot border in 8 directions border brightness : 4 gradations settable in the row unit blinking : none (covered by software) inverted character : settable in the character unit halftone : none input : composite video signal input (output level: 1 v[p-p] / 2 v[p-p]) clamp method : sync tip clamp, clamp level in 4 levels output : com posite video output measure against image fluctuation : built-in afc circuit dot clock : 1/2 of osc oscillation clock (automatic phase adjustment) mesecam compatibility : subcarrier leak function for superimpose display see the next page for electrical characteristics, pin assignment and support tool. mad00043bem xds built-in u.s. closed caption data slicer (optional 1 line data can be extracted.) rom correction correcting address designation: up to 3 addresses possible correction method: correction program being saved in internal ram i/o pins 76  common use: 56 i/o 1  common use: 1 input a/d inputs 8-bit 12-ch. (without s/h) pwm 13-bit 2-ch. (at repetition cycle 572 s at 14.32 mhz), 8-bit 1-ch. (at repetition cycle 35.7 s, 0.572 ms, 1.14 ms, 2.29 ms at 14.32 mhz) icr 16-bit 2-ch.(speed system), 18-bit 4-ch.(phase system) ocr 16-bit 3 (synchronous output 2, rec ctl 1 ) special ports 3-state output (pto) vlp pin; ctl input;capstan fg input; cylinder(drum) pg/fg inputs; hsw output; head amp/ rotary outputs; built-in fg amp; output of 1/4 osc oscillation clock (1 v[p-p]) notes 107
electrical characteristics supply current limit symbol condition min typ max unit parameter idd1 14.32 mhz operation without load, vdd = 5 v 50 100 ma idd2 1/1024 of 14.32 mhz operation without load, vdd = 2.7 v 2 5 ma idd3 stop of 14.32 mhz oscillation, vdd = 2.7 v 50 100 a 32 khz oscillation operation without load idsp stop of oscillation without load, vdd = 5 v, ta = 55 c10 a idht0 14.32 mhz oscillation without load, vdd = 5 v 5 15 ma idht1 stop of 14.32 mhz oscillation, vdd = 2.7 v 520 a 32 khz oscillation operation without load (ta = 25 c 2 c , vss = 0 v) operating supply current supply current at stop supply current at halt a/d converter performance limit symbol condition min typ max unit parameter ? nlad 3 lsb tad fosc = 14.32 mhz 8 s 5v (ta = 25 c 2 c , vdd = 5.0 v, vss = 0 v) conversion relative error a/d conversion time analog input voltage mad00043bem 108
mn101d10f, mn101d10g mn101d10g mn101d10f qfp100-p-1818b * lead-free pin assignment type mn101df10gaf rom ( 8-bit) 128 k ram ( 8-bit) 4 k minimum instruction execution time 0.1397 s (at 4.0 v to 5.5 v, 14.32 mhz) 71.5 s (at 2.7 v to 5.5 v, fixed to 14.32 mhz internal division) 61 s (at 2.5 v to 5.5 v, 32.768 khz) package qfp100-p-1818b *lead-free support tool flash memory built-in type in-circuit emulator px-ice101c / d + px-prb101d10-qfp100-p-1818b-cn-m mad00043bem 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 co p90 ad11(  pc3) ad10(  pc2) ad9(  pc1) ad8(  pc0) ad7(  p87) ad6(  p86) ad5(  p85) ad4(  p84) ad3(  p83) ad2(  p82) ad1(  p81) ad0(  p80) p77 p76 p75 p74 p73 p72 p71 p70 rota(  p67) hamp(  p66) denv(  p65) irq0(p64) irq1(p63) irq2(p62) irq3(p61) irq4(p60) p54 p53 p52 p51 nsdo(p50) nsbt1(p07) nsbi1(p06) nsbo1(p05) nsbt0(p02) nsbi0(p01) nsbo0(p00) sda(p27) sck(p26) hbufd6(p46) hbufd4(p44) hbufd2(p42) hbufd0(p40) hsw vlp nrst(p04) 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 cvin2(pb4  ) cvin(pb5  ) v ss2 cvout(pb6  ) pb7 p20 p21 p22 sxi xo(p23  ) xi(p24  ) v ss osci osco v dd sbufd0(p25/pwm4  ) pwm0 pwm1 sbufd1(p11  ) sbufd2(p12  ) sbufd3(p13  ) sbufd4(p14/tc6o  ) sbufd5(p15  ) sbufd6(osdh/p16/xdsck  ) sbufd7(osdv/p17/oscdiv/xdsdat  rctln rctlp av dd ctla av ss vri vro afg fgf ypg(p91) yfg(pfg) p92 pa0 pa1 pa2 pa3 pa4 pa5 pa6 secam(pa7 ) fsclpf(pb0 ) fsci(pb1) afclpf(pb 2 afcc(pb3) v dd2 109


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