? 2004 fairchild semiconductor corporation ds006228 www.fairchildsemi.com october 1986 revised july 2004 dm74als576a octal d-type edge-triggered flip-flop with 3-state outputs dm74als576a octal d-type edge-triggered flip-flop with 3-state outputs general description these 8-bit registers feature totem-pole 3-state outputs designed specifically for driving highly-capacitive or rela- tively low-impedance loads. the high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for inter- face or pull-up components. they are particularly attractive for implementing buffer registers, i/o ports, bidirectional bus drivers, and working registers. the eight flip-flops of the dm74als576a are edge-trig- gered inverting d-type flip-flops. on the positive transition of the clock, the q outputs will be set to the complement of the logic states that were set up at the d inputs. a buffered output control input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. in the high-imped- ance state the outputs neither load nor drive the bus lines significantly. the output control does not affect the internal operation of the flip-flops. that is, the old data can be retained or new data can be entered even while the outputs are off. features switching specifications at 50 pf switching specifications guaranteed over full tempera- ture and v cc range advanced oxide-isolated, ion-implanted schottky ttl process 3-state buffer-type outputs drive bus lines directly ordering code: note 1: device also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. connection diagram order number package number package description dm74als576awm (note 1) m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide dm74als576sjx m20d 20-lead small outline package (sop), eiaj type ii, 5.3mm wide dm74als576an n20a 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide
www.fairchildsemi.com 2 dm74als576a function table l = low state h = high state x = don?t care = positive edge transition z = high impedance state q 0 = previous condition of q logic diagram output clock d output control q l hl l lh llxq 0 hxxz
3 www.fairchildsemi.com dm74als576a absolute maximum ratings (note 2) note 2: the ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum ratings. the ? recommended operating conditions ? table will define the conditions for actual device operation. recommended operating conditions note 3: the ( ) arrow indicates the positive edge of the clock is used for reference. electrical characteristics over recommended operating free air temperature range. all typical values are measured at v cc = 5v, t a = 25 c. supply voltage 7v input voltage 7v voltage applied to disabled output 5.5v operating free air temperature range 0 c to + 70 c storage temperature range ? 65 c to + 150 c typical ja n package 56.0 c/w m package 75.0 c/w symbol parameter min nom max units v cc supply voltage 4.5 5 5.5 v v ih high level input voltage 2 v v il low level input voltage 0.8 v i oh high level output current ? 2.6 ma i ol low level output current 24 ma f clock clock frequency 0 30 mhz t w width of clock pulse high 16.5 ns low 16.5 t su data setup time (note 3) 15 ns t h data hold time (note 3) 0 ns t a free air operating temperature 0 70 c symbol parameter conditions min typ max units v ik input clamp voltage v cc = 4.5v, i i = ? 18 ma ? 1.2 v v oh high level v cc = 4.5v i oh = max 2.4 3.2 v output voltage v il = v il max v cc = 4.5v to 5.5v i oh = ? 400 av cc ? 2v v ol low level v cc = 4.5v i ol = 24 ma 0.35 0.5 v output voltage v ih = 2v i i input current @ maximum v cc = 5.5v, v ih = 7v 0.1 ma input voltage i ih high level input current v cc = 5.5v, v ih = 2.7v 20 a i il low level input current v cc = 5.5v, v il = 0.4v ? 0.2 ma i o output drive current v cc = 5.5v, v o = 2.25v ? 30 ? 112 ma i ozh off-state output current v cc = 5.5v, v ih = 2v 20 a high level voltage applied v o = 2.7v i ozl off-state output current v cc = 5.5v, v ih = 2v ? 20 a low level voltage applied v o = 0.4v i cc supply current v cc = 5.5v outputs high 10 18 ma outputs open outputs low 15 24 ma outputs disabled 16 30 ma
www.fairchildsemi.com 4 dm74als576a switching characteristics over recommended operating free air temperature range symbol parameter conditions from to min max units f max maximum clock frequency v cc = 4.5v to 5.5v 30 mhz t plh propagation delay time r l = 500 ? clock any q 414ns low-to-high level output c l = 50 pf t phl propagation delay time clock any q 414ns high-to-low level output t pzh output enable time output any q 418ns to high level output control t pzl output enable time output any q 418ns to low level output control t phz output disable time output any q 210ns from high level output control t plz output disable time output any q 315ns from low level output control
5 www.fairchildsemi.com dm74als576a physical dimensions inches (millimeters) unless otherwise noted 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide package number m20b
www.fairchildsemi.com 6 dm74als576a physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m20d
7 www.fairchildsemi.com dm74als576a octal d-type edge-triggered flip-flop with 3-state outputs physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide package number n20a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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