dimension mm type cl1l5 (single) cl2la (differential) cl1l5bt time delay 20 to 200 ps in 20 ps steps 40 to 200 ps in 20 ps steps 250 ps to 400 ps in 50 ps steps impedance 50 10% 100 ohm 10% 50 ohms 10% dc resistance 3 ohm/ns max 1 ohm max <3.0 ohms/ns rise time < 100 ps <100 ps <100 ps distortion 10% time delay tolerance 10 ps temp coefficient of td 100 ppm/c rated current 100 ma insertion loss <0.5db @ 1ghz insulation resistance >100 mohm @ 50v operating temperature -40 to +85c thin film chip delay lines us patent 5,808,241 jp 2,944,962 7 cl1l5 / cl2l / cl1l5bt series 1.0 description 2.0 mechanical 3.0 electrical these high frequency, precision thin film chip delay lines are offered in a 1210 form factor, making them the ideal choice for mcm's and other applications with severe size restrictions. useful for phase locked loop (pll) cir - cuits, they are tape and reel packaged for automated assembly. typical applications for the differential chip with 100 ohm differential impedance are transceiver data/clock alignment and physical deskew. the chip-coil is designed in a pb-free (95.5sn/3.8ag/0.7cu), surface mount format. ideal for applications with severe size restrictions. 4.0 part number manufacturer(s) of the products described on this page are indicated by their respective logos. -please refer to page 37 for land pattern specification subject to change - please call factory. cl1l5 - single cl2la - differential cl 1l 5 2 m 010 s serial code (s = cl1l), (d = cl2l) time delay (010 = 100 ps) termination (m = cl1l), (t = cl2l), (t = 200 ps values) height code (2 = cl1l), (a = cl2l), (b = 200 ps values) impedance (5 = 50 ohm), (a = 100 ohm) product designator circuit/element qualifier (1 = cl1l), (2 = cl2l) cl1l5bt - chip coil
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