cmos sram k6x0808t1d family revision 2.0 march 2005 1 document title 32kx8 bit low power cmos static ram revision history revision no. 0.0 0.1 0.2 1.0 2.0 remark preliminary preliminary preliminary final final history initial draft revised - errata : corrected 28-sop-525 to 28-sop-450 in pakage type revised - added commercial product. finalized - changed i cc from 3ma to 2ma - changed i cc2 from 25ma to 20ma - changed i sb from 3ma to 0.4ma - changed i sb1 for k6x0808t1d-f from 10 a to 6 a - changed i sb1 for k6x0808t1d-f from 20 a to 10 a - changed i dr for k6x0808t1d-f 10 a to 6 a - changed i dr for k6x0808t1d-q 20 a to 10 a - errata correction revised - changed i sb 1 of automotive product from 10 a to 25 a - changed i dr of automotive product from 10 a to 25 a - added lead free products draft data october 09, 2002 november 08, 2002 march 27, 2003 december 16, 2003 march 27, 2005 the attached datasheets are provided by samsung electronics. samsu ng electronics co., ltd. reserves the right to change the spe cifications and products. samsung electronics will answer to your questions. if you have any questions, please contact the samsung branch offic es.
cmos sram k6x0808t1d family revision 2.0 march 2005 2 32kx8 bit super low power and low voltage full cmos static ram general description the k6x0808t1d families are fabricated by samsung s advanced cmos process tec hnology. the families support verious operating temperature ranges and have various pack- age types for user flexibility of system design. the families also support low data retention voltage for battery back-up operation with low data retention current. features ? process technology: full cmos28- ? organization: 32k x 8 ? power supply voltage: 2.7~3.6v ? low data retention voltage: 1.5v(min) ? three state outputs ? package type: 28-sop-450, 28-tsop1-0813.4f/r product family 1. the parameters are tested with 30pf test load product family operating temperature vcc range speed power dissipation pkg type standby (i sb1 , max) operating (i cc2, max) k6x0808t1d-b industrial(0~70 c) 2.7~3.6v 70 1) /85ns 6 a 25ma 28-sop-450, 28-tsop1-0813.4f/r k6x0808t1d-f industrial(-40~85 c) k6x0808t1d-q automotive(-40~125 c) 25 a 28-sop-450, 28-tsop1-0813.4f samsung electronics co., ltd. reserves the right to change produc ts and specificatio ns without notice. functional block diagram precharge circuit. memory array i/o circuit column select clk gen. row select i/o 1 data cont data cont i/o 8 cs 1 we oe control logic row addresses column addresses pin description pin name function pin name function a 0 ~a 14 address inputs i/o 1 ~i/o 8 data inputs/outputs we write enable input vcc power cs chip select input vss ground oe output enable input nc no connect a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 vss vcc we a13 a8 a9 a11 oe a10 cs i/o8 i/o7 i/o6 i/o5 i/o4 28-sop 15 16 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 a11 a9 a8 a13 we vcc a3 a14 a12 a7 a6 a5 a4 a10 cs i/o8 i/o7 i/o6 i/o5 i/o4 vss i/o3 i/o2 i/o1 a0 a1 a2 28-tsop type1 - forward 1 2 3 4 5 6 7 8 9 10 11 12 13 14 27 26 28 25 24 23 22 21 20 19 18 17 16 15 oe 28-tsop a11 a9 a8 a13 we vcc a3 a14 a12 a7 a6 a5 a4 a10 cs i/o8 i/o7 i/o6 i/o5 i/o4 vss i/o3 i/o2 i/o1 a0 a1 a2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 27 26 28 25 24 23 22 21 20 19 18 17 16 15 oe type1 - reverse
cmos sram k6x0808t1d family revision 2.0 march 2005 3 product list 1.lead free products (lf) commercial temp. products(0~70 c) industrial temp. products(-40~85 c) atomotive temp. products(-40~125 c) part name function part name function part name function k6x0808t1d-gb70 k6x0808t1d-gb85 k6x0808t1d-bb70 1) k6x0808t1d-bb85 1) k6x0808t1d-yb70 k6x0808t1d-yb85 k6x0808t1d-lb70 1) k6x0808t1d-lb85 1) k6x0808t1d-nb70 k6x0808t1d-nb85 28-sop, 70ns, ll 28-sop, 85ns, ll 28-sop, 70ns, ll, lf 28-sop, 85ns, ll, lf 28-stsop-f, 70ns, ll 28-stsop-f, 85ns, ll 28-stsop-f, 70ns, ll, lf 28-stsop-f, 85ns, ll, lf 28-stsop-r, 70ns, ll 28-stsop-r, 85ns, ll k6x0808t1d-gf70 k6x0808t1d-gf85 k6x0808t1d-gf70 1) k6x0808t1d-gf85 1) k6x0808t1d-yf70 k6x0808t1d-yf85 k6x0808t1d-lf70 1) k6x0808t1d-lf85 1) k6x0808t1d-nf70 k6x0808t1d-nf85 28-sop, 70ns, ll 28-sop, 85ns, ll 28-sop, 70ns, ll, lf 28-sop, 85ns, ll, lf 28-stsop-f, 70ns, ll 28-stsop-f, 85ns, ll 28-stsop-f, 70ns, ll, lf 28-stsop-f, 85ns, ll, lf 28-stsop-r, 70ns, ll 28-stsop-r, 85ns, ll k6x0808t1d-gq70 k6x0808t1d-gq85 k6x0808t1d-gq70 1) k6x0808t1d-gq85 1) k6x0808t1d-yq70 k6x0808t1d-yq85 k6x0808t1d-lq70 1) k6x0808t1d-lq85 1) 28-sop, 70ns, l 28-sop, 85ns, l 28-sop, 70ns, l, lf 28-sop, 85ns, l, lf 28-stsop-f, 70ns, l 28-stsop-f, 85ns, l 28-stsop-f, 70ns, l, lf 28-stsop-f, 85ns, l, lf absolute maximum ratings 1) 1. stresses greater than those listed under "absolute maximum ra tings" may cause permanent damage to the device. functional ope ration should be restricted to recommended operating condition. exposure to absolute maximum rating conditions for extended periods may affect reliability. item symbol ratings unit remark voltage on any pin relative to vss v in ,v out -0.2 to v cc +0.3v(max. 3.9v) v - voltage on vcc supply relative to vss v cc -0.2 to 3.9 v - power dissipation p d 1.0 w - storage temperature t stg -65 to 150 c- operating temperature t a -40 to 85 c k6x0808t1d-f -40 to 125 c k6x0808t1d-q functional description 1. x means don't care (must be in high or low states) cs oe we i/o mode power h x 1) x 1) high-z deselected standby l h h high-z output disabled active l l h dout read active l x 1) l din write active
cmos sram k6x0808t1d family revision 2.0 march 2005 4 recommended dc operating conditions 1) note: 1. industrial product: t a =-40 to 85 c, otherwise specified a utomotive product: t a =-40 to 125 c, otherwise specified 2. overshoot: vcc+3.0v in case of pulse width 30ns. 3. undershoot: -3.0v in case of pulse width 30ns. 4. overshoot and undershoot are sampled, not 100% tested. item symbol min typ max unit supply voltage vcc 2.7 3.0/3.3 3.6 v ground vss 0 0 0 v input high voltage v ih 2.2 - vcc+0.2 2) v input low voltage v il -0.2 3) -0.6v capacitance 1 ) (f=1mhz, ta=25 c) 1. capacitance is sampled, not 100% tested item symbol test condition min max unit input capacitance c in v in =0v - 8 pf input/output capacitance c io v io =0v - 10 pf dc and operating characteristics item symbol test conditions min typ max unit input leakage current i li v in =vss to vcc -1 - 1 a output leakage current i lo cs =v ih or oe =v ih or we =v il , v io =v ss to vcc -1 - 1 a operating power supply current i cc i io =0ma, cs =v il, v in =v ih or v il , read - - 2 ma average operating current i cc1 cycle time=1 s, 100% duty, i io =0ma, cs 0.2v, v in 0.2v in vcc -0.2v --3ma i cc2 cycle time=min,100% duty, i io =0ma, cs =v il, v in =v ih or v il --20ma output low voltage v ol i ol =2.1ma - - 0.4 v output high voltage v oh i oh =-1.0ma 2.4 - - v standby current(ttl) i sb cs =v ih , other inputs=v ih or v il --0.3ma standby current(cmos) i sb1 cs vcc-0.2v, other inputs=0~vcc k6x0808t1d-f - - 6 a k6x0808t1d-q - - 25 a
cmos sram k6x0808t1d family revision 2.0 march 2005 5 ac characteristics (v cc =2.7~3.6v, industrial product:t a =-40 to 85 c, automotive product:t a =-40 to 125 c ) parameter list symbol speed bins units 70ns 85ns min max min max read read cycle time t rc 70 - 85 - ns address access time t aa - 70 - 85 ns chip select to output t co - 70 - 85 ns output enable to valid output t oe - 35 - 40 ns chip select to low-z output t lz 10 - 10 - ns output enable to low-z output t olz 5-5-ns chip disable to high-z output t hz 0 25 0 25 ns output disable to high-z output t ohz 0 25 0 25 ns output hold from address change t oh 10 - 15 - ns write write cycle time t wc 70 - 85 - ns chip select to end of write t cw 60 - 70 - ns address set-up time t as 0-0-ns address valid to end of write t aw 60 - 70 - ns write pulse width t wp 50 - 60 - ns write recovery time t wr 0-0-ns write to output high-z t whz 0 25 0 30 ns data to write time overlap t dw 25 - 35 - ns data hold from write time t dh 0-0-ns end write to output low-z t ow 5-5-ns c l 1) 1. including scope and jig capacitance ac operating conditions test conditions ( test load and input/output reference) input pulse level: 0.4 to 2.2v input rising and falling time: 5ns input and output reference voltage:1.5v output load(see right): c l =100pf+1ttl c l =30pf+1ttl data retention characteristics item symbol test condition min typ max unit vcc for data retention v dr cs 1 vcc-0.2v 2.0 - 3.6 v data retention current i dr vcc=3.0v, cs 1 vcc-0.2v k6x0808t1d-f -- 6 a k6x0808t1d-q 25 a data retention set-up time t sdr see data retention waveform 0- - ms recovery time t rdr 5- -
cmos sram k6x0808t1d family revision 2.0 march 2005 6 address data out previous data valid data valid timing diagrams timing waveform of read cycle(1) (address controlled , cs =oe =v il , we =v ih ) t aa t rc t oh timing waveform of read cycle(2) (we =v ih ) data valid high-z cs address oe data ou t notes ( read cycle) 1. t hz and t ohz are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 2. at any given temperature and voltage condition, t hz (max.) is less than t lz (min.) both for a given devic e and from device to device interconnection. t oh t aa t olz t lz t ohz t hz t rc t oe t co
cmos sram k6x0808t1d family revision 2.0 march 2005 7 timing waveform of write cycle(2) (cs controlled) address cs t wc t wr(4) t as(3) t dw t dh data valid we data in data out high-z high-z t cw(2) t wp(1) t aw notes (write cycle) 1. a write occurs during the overlap of a low cs and a low we . a write begins at the latest transition among cs going low and we going low : a write end at the earliest transition among cs going high and we going high, t wp is measured from the begining of write to the end of write. 2. t cw is measured from the cs going low to the end of write. 3. t as is measured from the address valid to the beginning of write. 4. t wr is measured from the end or write to the address change. t wr applied in case a write ends as cs or we going high. timing waveform of write cycle(1) (we controlled) address cs t cw(2) t wr(4) t wp(1) t dw t dh t ow t whz data undefined data valid we data in data out t wc t aw t as(3) data retention wave form cs controlled v cc 3.0v/2.7v 2.2v v dr cs gnd data retention mode cs v cc - 0.2v t sdr t rdr
cmos sram k6x0808t1d family revision 2.0 march 2005 8 package dimensions units: millimeter(inch) 28 pin plastic small outline package(450mil) 0~8 #28 11.81 0.30 0.465 0.012 18.29 0.20 0.720 0.008 max 18.69 0.736 max 2.59 0.20 0.102 0.008 3.00 0.118 min 0.002 0.05 0.004 max 0.10 max #15 0.41 0.10 0.016 0.004 #1 #14 0.89 ( ) 0.035 11.43 0.450 8.38 0.20 0.330 0.008 1.02 0.20 0.040 0.008 +0.10 0.15 -0.05 +0.004 0.006 -0.002 1.27 0.050
cmos sram k6x0808t1d family revision 2.0 march 2005 9 package dimensions 28 pin thin small outlin e package type1 (0813.4f) #28 1.00 0.10 0.039 0.004 max 8.40 0.331 0.004 max 0.10 max #1 13.40 0.20 0.528 0.008 #15 #14 +0.10 0.20 -0.05 +0.004 0.008 -0.002 0.55 0.0217 0.425 ( ) 0.017 min 0.05 0.002 max 1.20 0.047 8.00 0.315 #28 1.00 0.10 0.039 0.004 max 8.40 0.331 0.004 max 0.10 max #1 0.50 ( ) 0.020 11.80 0.10 0.465 0.004 0.45 ~0.75 0.018 ~0.030 13.40 0.20 0.528 0.008 #15 #14 +0.10 0.15 -0.05 +0.004 0.006 -0.002 0~8 0.425 ( ) 0.017 min 0.05 0.002 max 1.20 0.047 8.00 0.315 typ 0.25 0.010 0.55 0.0217 +0.10 0.20 -0.05 +0.004 0.008 -0.002 28 pin thin small outline package type1 (0813.4r) 0.50 ( ) 0.020 11.80 0.10 0.465 0.004 0.45 ~0.75 0.018 ~0.030 +0.10 0.15 -0.05 +0.004 0.006 -0.002 0~8 typ 0.25 0.010 units: millimeter(inch)
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