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irl1104spbf irl1104lpbf hexfet ? power mosfet pd -95576 advanced process technology surface mount (irl1104s) low-profile through-hole (irl1104l) 175c operating temperature fast switching fully avalanche rated lead-free parameter typ. max. units r jc junction-to-case ??? 0.9 r ja junction-to-ambient(pcb mounted,steady-state)** ??? 40 thermal resistance parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 104 i d @ t c = 100c continuous drain current, v gs @ 10v 74 a i dm pulsed drain current 416 p d @t a = 25c power dissipation 2.4 w p d @t c = 25c power dissipation 167 w linear derating factor 1.1 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy 340 mj i ar avalanche current 62 a e ar repetitive avalanche energy 17 mj dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c absolute maximum ratings fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the d 2 pak is a surface mount power package capable of accommodating die sizes up to hex-4. it provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. the d 2 pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0w in a typical surface mount application. the through-hole version (irl1104l) is available for low- profile applications. description v dss = 40v r ds(on) = 0.008 ? i d = 104a 2 d pak to-262 s d g 07/19/04 logic-level gate drive www.irf.com 1
irl1104s/lpbf 2 www.irf.com

v (br)dss drain-to-source breakdown voltage 40 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.04 ??? v/c reference to 25c, i d =1ma ??? ??? 0.008 v gs = 10v, i d = 62a ??? ??? 0.012 w v gs = 4.5v, i d = 52a v gs(th) gate threshold voltage 1.0 ??? v v ds = v gs , i d = 250a g fs forward transconductance 53 ??? ??? s v ds = 25v, i d = 62a ??? ??? 25 a v ds =40v, v gs = 0v ??? ??? 250 v ds = 32v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 v gs = 16v gate-to-source reverse leakage ??? ??? -100 na v gs = -16v q g total gate charge ??? ??? 68 i d =62a q gs gate-to-source charge ??? ??? 24 nc v ds = 32v q gd gate-to-drain ("miller") charge ??? ??? 34 v gs = 4.5v, see fig. 6 and 13 t d(on) turn-on delay time ??? 18 ??? v dd = 20v t r rise time ??? 257 ??? i d =54a t d(off) turn-off delay time ??? 32 ??? r g = 3.6 ? , v gs = 4.5v t f fall time ??? 64 ??? r d = 0.4 ? , see fig. 10 between lead, ??? ??? and center of die contact c iss input capacitance ??? 3445 ??? v gs = 0v c oss output capacitance ??? 1065 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 270 ??? ? = 1.0mhz, see fig. 5

l s internal source inductance 7.5 repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) i sd 62a, di/dt 217a/s, v dd v (br)dss , t j 175c notes: v dd = 15v, starting t j = 25c, l = 0.18mh r g = 25 ? , i as = 62a. (see figure 12) pulse width 300s; duty cycle 2%. ** when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. uses irl1104 data and test conditions. source-drain ratings and characteristics parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s =62a, v gs = 0v t rr reverse recovery time ??? 84 126 ns t j = 25c, i f =62a q rr reverse recovery charge ??? 223 335 nc di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) 104 416 s d g calculated continuous current based on maximum allowable junction temperature;for recommended current-handling of the package refer to design tip # 93-4
irl1104s/lpbf www.irf.com 3 fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 104a 1 10 100 1000 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 10v 7.0v 5.5v 4.5v 4.0v 3.5v 2.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.7v 1 10 100 1000 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 7.0v 5.5v 4.5v 4.0v 3.5v 2.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 2.7v 1 10 100 1000 2.0 4.0 6.0 8.0 10.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j 25
irl1104s/lpbf 4 www.irf.com fig 7. typical source-drain diode forward voltage fig 5. typical capacitance vs. drain-to-source voltage fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage 0 20 40 60 80 0 2 4 6 8 10 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 62 a v = 20v ds v = 32v ds 1 10 100 1000 10000 1 10 100 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 1 10 100 0 1000 2000 3000 4000 5000 6000 v , drain-to-source voltage (v) c, capacitance (pf) ds v c c c = = = = 0v, c c c f = 1mhz + c + c c shorted gs iss gs gd , ds rss gd oss ds gd c iss c oss c rss 0.1 1 10 100 1000 0.2 0.8 1.4 2.0 2.6 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 175 c j t = 25 c j
irl1104s/lpbf www.irf.com 5 fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case
1 0.1 % + - 25 50 75 100 125 150 175 0 20 40 60 80 100 120 t , case temperature ( c) i , drain current (a) c d limited by package 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
irl1104s/lpbf 6 www.irf.com fig 13a. basic gate charge waveform d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit q g q gs q gd v g charge fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 10v 5 25 50 75 100 125 150 175 0 200 400 600 800 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 25a 44a 62a
irl1104s/lpbf www.irf.com 7 peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets * v gs = 5v for logic level devices ? dv/dt controlled by r g ? driver same type as d.u.t. ? i sd controlled by duty factor "d" ? d.u.t. - device under test

circuit layout considerations ? low stray inductance ? ground plane ? low leakage inductance current transformer *
irl1104s/lpbf 8 www.irf.com

dimensions are shown in millimeters (inches) note: "p" in ass embly line pos ition indicates "l ead-f ree" f 530s this is an irf530s with lot code 8024 as s e mble d on ww 02, 2000 in the assembly line "l" assembly lot code int e rnational rect ifie r logo part number dat e code year 0 = 2000 wee k 02 line l f 530s a = as s e mb l y s i t e code we e k 02 p = de s i gnat e s l e ad-f r e e product (optional) rectifier int e r nat ional logo lot code as s e mb l y year 0 = 2000 dat e code par t nu mb e r
irl1104s/lpbf www.irf.com 9 to-262 part marking information to-262 package outline dimensions are shown in millimeters (inches) assembly lot code rectifier int ernat ional as s e mb le d on ww 19, 1997 note: "p" in as s embly line pos i tion indicates "l ead-f ree" in the assembly line "c" logo t his is an irl3103l lot code 1789 example: line c dat e code week 19 ye ar 7 = 1997 part number part number logo lot code assembly int ernat ional re ct if ie r product (optional) p = designates lead-free a = assembly site code week 19 ye ar 7 = 1997 dat e code or
irl1104s/lpbf 10 www.irf.com data and specifications subject to change without notice. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 07/04

dimensions are shown in millimeters (inches) 3 4 4 trr f eed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl f eed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957 ) 23.90 (.941 ) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362 ) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge.
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/

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